You are here: Home / Projects / OSADL QA Farm Real-time / CPUs under test / 
2025-11-08 - 22:30

Dates and Events:

OSADL Articles:

2024-10-02 12:00

Linux is now an RTOS!

PREEMPT_RT is mainline - What's next?


2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Number of cores/hyperthreads and bogoMIPS (by arch) - (x86 CPU strings)

BoxArch ↑CoresMHzBogo​MIPSEffective
ras3aarch​648 x 12,0004,00006.05. 03:01
rfs5saarch​644 x 11,2006427.08. 03:49
ras6aarch​648 x 12,0003,20008.11. 14:57
r7s2aarch​642 x 11,7009608.11. 14:29
ras4aarch​648 x 12,40038408.11. 14:55
res3saarch​640 x 1 x 11,0001,60008.11. 15:30
r4s5saarch​644 x 11,60020008.11. 14:03
r2s6saarch​644 x 11,3506408.11. 13:39
rfs5aarch​644 x 11,2006408.11. 15:43
r2s7aarch​644 x 12,40043208.11. 13:40
res6saarch​644 x 101,60008.11. 15:34
rbs5saarch​644 x 11,6006408.11. 15:05
r1s5aarch​644 x 11,20079608.11. 13:31
rfs1aarch​644 x 11,50043208.11. 15:38
rfs1saarch​644 x 11,50043208.11. 15:38
ras4saarch​648 x 12,40038429.09. 03:02
r2s7saarch​644 x 11,50043208.11. 13:41
r3s4aarch​646 x 11,3009608.11. 13:46
r2s1arm​v5tejl1 x 120019908.11. 13:35
r1s7arm​v6l1 x 120053008.11. 13:33
r7s3arm​v6l1 x 1700508.11. 14:31
r2s3arm​v7l0 x 1 x 162462408.11. 13:36
ras6sarm​v7l1 x 11,0001,98708.11. 14:57
r9s8sarm​v7l1 x 180079608.11. 14:52
r2s2arm​v7l1 x 172049908.11. 13:35
r1s4arm​v7l2 x 11,2004808.11. 13:30
r4s2sarm​v7l1 x 180053008.11. 13:56
r7s8arm​v7l1 x 11,00099508.11. 14:37
ras5arm​v7l2 x 11,0002408.11. 14:56
r7s4arm​v7l1 x 153634808.11. 14:34
r4s2arm​v7l1 x 180079608.11. 13:55
rbs3arm​v7l4 x 19962408.11. 15:01
r7s3sarm​v7l4 x 11,40035608.11. 14:32
r7s4sarm​v7l4 x 11,5001,08008.11. 14:34
r4s8sarm​v7l1 x 140039808.11. 14:07
rfs4sarm​v7l1 x 180080008.11. 15:42
r4s1sarm​v7l4 x 11,50086408.11. 13:54
r7s6arm​v7l1 x 11,00039828.02. 14:10
ras5sarm​v7l2 x 11,0002408.11. 14:56
r4s1arm​v7l4 x 11,50072008.11. 13:53
res7arm​v7l0 x 1 x 11,0001208.11. 15:35
rfs8arm​v7l1 x 11,00012004.03. 03:47
rfs4arm​v7l1 x 180080008.11. 15:41
rbs7sarm​v7l4 x 19962408.11. 15:06
r7s8sarm​v7l1 x 11,00099608.11. 14:37
ras3sarm​v7l1 x 11,30084008.11. 14:55
r9s7arm​v7l2 x 11,000008.11. 14:52
rfs6sarm​v7l1 x 16671,33208.11. 15:44
res7sarm​v7l0 x 1 x 11,0001208.11. 15:36
r8s6arm​v7l1 x 150049804.11. 14:42
r1s4sarm​v7l2 x 14004808.11. 13:31
r5s5sarm​v7l1 x 160060008.11. 14:15
r2s3sarm​v7l0 x 2 x 16001,20008.11. 13:36
rbs3sarm​v7l4 x 11,40035608.11. 15:02
r5s7arm​v7l1 x 15286408.11. 14:18
rfs6arm​v7l1 x 16671,33208.11. 15:44
r9s1sarm​v7l1 x 101,25014.04. 18:03
rbs7arm​v7l4 x 19961205.11. 15:04
r5s5arm​v7l1 x 160059708.11. 14:13
rbs8arm​v7l2 x 16662,65008.11. 15:07
r4s5arm​v7l1 x 1500008.11. 14:02
r4s6sarm​v7l0 x 1 x 11,0006608.11. 14:04
r4s8arm​v7l1 x 140039808.11. 14:07
r5s7sarm​v7l1 x 15284808.11. 14:20
r2s5sarm​v7l4 x 11,20015208.11. 13:38
r4s3i5861 x 150099608.11. 13:58
r8s1i5861 x 135070108.11. 14:39
r3s5i5861 x 113326508.11. 13:47
r9s4i6861 x 21,0003,99008.11. 14:49
rbs5i6864 x 2049,41508.11. 15:04
r3s8i6864 x 13,20027,36908.11. 13:52
r6s6i6861 x 11,6003,19208.11. 14:26
r2s6i6861 x 11,5002,99908.11. 13:39
r6s5i6861 x 11,5002,99208.11. 14:25
rbs0i6862 x 22,50017,60008.11. 15:00
ras1i6861 x 11,4002,79908.11. 14:54
r4s3si6861 x 11,4662,93228.07. 02:17
r7s5i6861 x 11,3002,59308.11. 14:35
r3s0i6864 x 23,50055,99208.11. 13:42
r1s8i6861 x 21,6006,39808.11. 13:33
r6s7i6862 x 12,3009,17608.11. 14:27
r8s5i6864 x 23,40054,40008.11. 14:41
rcs3i6862 x 11,4005,58606.11. 15:10
r3s1i6864 x 12,40019,12708.11. 13:43
r3s7i6861 x 15331,06608.11. 13:51
r4s7i6864 x 11,83314,66408.11. 14:05
r2s4mips​641 x 180053129.09. 13:34
r5s6ppc1 x 153313308.11. 14:18
r2s8ppc1 x 14006608.11. 13:41
ras7ppc1 x 13966508.11. 14:58
r2s5ppc1 x 13966608.11. 13:37
r4s4ppc4 x 11,20049808.11. 13:59
r3s5sppc2 x 11,20040008.11. 13:49
r3s2sriscv644 x 1028408.11. 13:44
r3s2riscv641 x 11,00028408.11. 13:43
r7s2sriscv644 x 1028408.11. 14:30
rds3x86_​644 x 11,60012,74808.11. 15:24
r0s5sx86_​648 x 23,600115,20008.11. 13:18
ras0x86_​642 x 22,30018,41808.11. 14:53
r9s3x86_​644 x 11,60012,74808.11. 14:48
r0s4x86_​648 x 23,600115,20008.11. 13:15
r6s0x86_​642 x 10 x 21,700136,18008.11. 14:22
rbs8sx86_​644 x 22,40038,70408.11. 15:07
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r9s2x86_​644 x 11,60012,74808.11. 14:47
r9s5sx86_​642 x 13,30013,19808.11. 14:51
r1s0x86_​644 x 13,10024,80008.11. 13:26
rcs7sx86_​644 x 11,50011,98008.11. 15:17
r1s8sx86_​644 x 11,90015,19608.11. 13:34
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s0x86_​644 x 23,60057,60008.11. 14:46
rds6x86_​644 x 11,60012,74808.11. 15:26
rfs0x86_​6416 x 22,000127,96808.11. 15:38
res8sx86_​644 x 11,90015,05208.11. 15:37
rfs3x86_​644 x 11,60012,74808.11. 15:39
rfs2sx86_​642 x 13,00011,99808.11. 15:39
r5s3x86_​644 x 22,00031,87208.11. 14:09
ras8sx86_​644 x 11,60012,74808.11. 14:59
r0s7x86_​648 x 23,600115,20008.11. 13:23
r0s2sx86_​6410 x 13,70073,99008.11. 13:12
r5s2x86_​644 x 12,70021,69908.11. 14:09
r0s8x86_​648 x 23,600115,20008.11. 13:25
rcs6x86_​644 x 23,50063,99208.11. 15:16
rbs4sx86_​644 x 11,60012,74808.11. 15:03
r9s4sx86_​642 x 11,3335,34708.11. 14:50
r1s3x86_​644 x 12,80022,42408.11. 13:29
res2x86_​644 x 11,60014,40008.11. 15:29
r8s7sx86_​642 x 13,00011,98008.11. 14:44
r5s1x86_​646 x 13,33340,08608.11. 14:08
r0s0sx86_​644 x 23,40054,39208.11. 13:10
ras2sx86_​644 x 11,90015,05230.10. 14:54
rcs1x86_​646 x 23,46783,37608.11. 15:10
rfs3sx86_​644 x 11,60012,74808.11. 15:40
r0s1sx86_​644 x 23,30052,79208.11. 13:11
r0s0x86_​644 x 22,50040,00008.11. 13:10
res8x86_​644 x 11,90015,05208.11. 15:36
res1x86_​644 x 11,60014,40008.11. 15:28
r6s8x86_​642 x 22,30018,35608.11. 14:27
r0s2x86_​644 x 23,50055,86408.11. 13:11
rds8x86_​644 x 11,60012,74808.11. 15:27
rfs7sx86_​644 x 17006,44808.11. 15:46
rbs4x86_​644 x 11,2009,60008.11. 15:03
r4s6x86_​644 x 23,40054,25608.11. 14:03
r3s6sx86_​642 x 22,66721,33208.11. 13:50
rbs2x86_​644 x 12,00015,97208.11. 15:01
r0s3x86_​648 x 23,600115,20008.11. 13:13
res4sx86_​644 x 11,90015,05208.11. 15:31
r4s7sx86_​642 x 11,8337,33208.11. 14:06
r0s7sx86_​642 x 23,70029,53223.05. 13:21
res6x86_​644 x 11,1008,75208.11. 15:33
r0s5x86_​648 x 23,500115,20008.11. 13:17
r8s0x86_​642 x 22,30018,40008.11. 14:38
r5s3sx86_​644 x 11,60012,74808.11. 14:10
r6s3x86_​644 x 22,20035,12008.11. 14:24
r7s1x86_​644 x 11,60012,83908.11. 14:28
rbs1x86_​644 x 12,00015,97208.11. 15:00
rds4x86_​644 x 11,60012,74808.11. 15:24
rcs8sx86_​644 x 23,30052,80008.11. 15:22
r6s2x86_​642 x 11,6679,57808.11. 14:23
rcs8x86_​6416 x 23,700217,15208.11. 15:21
r8s4x86_​644 x 21,60028,80008.11. 14:40
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rcs0x86_​648 x 22,40076,60808.11. 15:09
r9s3sx86_​644 x 13,00024,00008.11. 14:48
r1s1x86_​642 x 22,60021,69608.11. 13:27
res4x86_​644 x 11,90015,05208.11. 15:31
r8s7x86_​644 x 13,20025,49608.11. 14:44
r5s8x86_​644 x 12,00015,97208.11. 14:21
r0s8sx86_​646 x 23,47083,37608.11. 13:26
r5s4sx86_​644 x 11,60012,74808.11. 14:12
r8s8x86_​642 x 11,3005,14408.11. 14:45
r7s7sx86_​642 x 22,30018,39608.11. 14:36
ras2x86_​642 x 11,0674,26608.11. 14:54
rds2x86_​644 x 11,60012,74808.11. 15:23
r4s0x86_​642 x 22,30018,40008.11. 13:52
res3x86_​644 x 12,00015,97208.11. 15:30
rbs6x86_​644 x 11,91515,32408.11. 15:05
rfs7x86_​644 x 22,60041,60008.11. 15:45
r0s1x86_​644 x 22,30055,99208.11. 13:11
r3s3x86_​646 x 23,33379,99208.11. 13:45
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rcs5sx86_​642 x 12,80011,19808.11. 15:15
res0x86_​644 x 23,40054,39208.11. 15:27
r5s0x86_​642 x 22,20017,58208.11. 14:08
r8s4sx86_​644 x 21,60028,80008.11. 14:41
rcs3sx86_​644 x 13,30026,39608.11. 15:11
r9s1x86_​642 x 12,0003,99208.11. 14:46
r3s3sx86_​644 x 13,40011,98008.11. 13:46
r7s7x86_​644 x 11,60012,76708.11. 14:36
res5sx86_​642 x 22,20019,20008.11. 15:32
r1s6x86_​642 x 22,13017,06408.11. 13:31
r9s6x86_​642 x 23,00023,94408.11. 14:51
rcs7x86_​642 x 21,80014,39608.11. 15:16
r1s2sx86_​644 x 12,30028,00008.11. 13:28
rcs5x86_​642 x 12,80011,19808.11. 15:13
r0s6sx86_​6410 x 23,700147,98008.11. 13:20
r3s6x86_​641 x 21,6606,66608.11. 13:49
r1s6sx86_​642 x 21,66713,33208.11. 13:32
rds0x86_​644 x 21,80031,99208.11. 15:22
res1sx86_​644 x 11,60014,40008.11. 15:29
rds7x86_​644 x 11,60012,74808.11. 15:26
r8s6sx86_​644 x 13,30026,41608.11. 14:43
r5s2sx86_​644 x 24,00063,86312.04. 01:34
rfs2x86_​644 x 13,00023,99608.11. 15:39
rcs2x86_​642 x 12,80011,23208.11. 15:11
r5s4x86_​642 x 22,53020,26408.11. 14:11
rcs4x86_​642 x 11,1004,37608.11. 15:12
r8s3x86_​644 x 12,66721,28008.11. 14:40
r2s0x86_​644 x 13,10024,80008.11. 13:34
r1s2x86_​644 x 12,30028,00008.11. 13:27
r0s3sx86_​644 x 23,60067,20008.11. 13:14
r6s1x86_​642 x 12,0007,97808.11. 14:22
r7s0x86_​642 x 22,30018,40008.11. 14:28
rds1x86_​644 x 11,60012,74808.11. 15:23
r0s6x86_​648 x 23,600115,20008.11. 13:19
r0s4sx86_​648 x 23,600115,20008.11. 13:16
rbs2sx86_​641 x 13,500007.09. 15:06
r6s4x86_​642 x 11,1004,37608.11. 14:24
rds5x86_​644 x 11,60012,74808.11. 15:25
ras8x86_​644 x 11,60014,40008.11. 14:58
res5x86_​642 x 22,20019,20008.11. 15:32
 

Valid XHTML 1.0 Transitional