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2024-04-23 - 22:21

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OSADL Articles:

2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCores ↑MHzBogo​MIPSEffective
res7sarm​v7l0 x 1 x 11,0001212.01. 05:12
r2s3sarm​v7l0 x 1 x 16001,20023.04. 13:48
r4s6sarm​v7l0 x 1 x 11,0006623.04. 14:23
r2s3arm​v7l0 x 1 x 162462423.04. 13:47
res3saarch​640 x 1 x 11,0001,60023.04. 16:25
res7arm​v7l0 x 1 x 11,0001223.04. 16:30
rfs4arm​v7l1 x 180080023.04. 16:35
r8s6arm​v7l1 x 150049823.04. 15:12
r5s7sarm​v7l1 x 15284823.04. 14:45
ras3sarm​v7l1 x 11,30084023.04. 03:36
r2s5ppc1 x 13966627.03. 13:43
r5s5sarm​v7l1 x 160060023.04. 14:38
r3s2riscv641 x 11,00028423.04. 13:56
r1s7arm​v6l1 x 11,00053023.04. 13:43
r5s7arm​v7l1 x 15286423.04. 14:43
r7s3arm​v6l1 x 1700523.04. 14:56
r9s1sarm​v7l1 x 101,25014.04. 18:03
r3s6x86_​641 x 11,6603,33323.04. 14:04
r5s5arm​v7l1 x 160059723.04. 14:35
ras4sarm​v7l1 x 160059707.02. 02:45
r3s5i5861 x 113326523.04. 14:01
r3s7i6861 x 15331,06623.04. 14:05
r4s5arm​v7l1 x 1500023.04. 14:20
r4s8arm​v7l1 x 140039823.04. 14:26
rbs2sx86_​641 x 13,500007.09. 15:06
ras6sarm​v7l1 x 11,0001,98723.04. 15:35
r9s8sarm​v7l1 x 180079623.04. 15:28
r2s2arm​v7l1 x 172049923.04. 13:47
r4s2sarm​v7l1 x 180053023.04. 14:12
r7s8arm​v7l1 x 11,00099523.04. 15:03
r5s6ppc1 x 153313323.04. 14:42
r7s4arm​v7l1 x 153634823.04. 14:59
r4s2arm​v7l1 x 180079623.04. 14:11
r4s3i5861 x 150099623.04. 14:15
r6s6i6861 x 11,6003,19123.04. 14:52
r2s6i6861 x 11,5002,99923.04. 13:49
r6s5i6861 x 11,5001,12223.04. 14:51
r2s8ppc1 x 14006623.04. 13:54
ras1i6861 x 11,4002,79923.04. 15:30
ras4arm​v7l1 x 150039823.04. 15:32
r4s3si6861 x 11,4662,93223.04. 14:16
r4s8sarm​v7l1 x 140039823.04. 14:26
rfs4sarm​v7l1 x 180080023.04. 16:38
r7s6arm​v7l1 x 11,00039828.02. 14:10
r8s1i5861 x 130060126.03. 02:51
r7s5i6861 x 11,3002,59323.04. 15:01
r2s1arm​v5tejl1 x 120019923.04. 13:46
r7s8sarm​v7l1 x 11,00099623.04. 15:05
r2s4mips​641 x 180053124.12. 13:46
ras7ppc1 x 13966523.04. 15:36
r9s4i6861 x 21,0003,99023.04. 15:19
rcs5x86_​642 x 12,80011,19823.04. 16:03
rbs6sx86_​642 x 11,3335,33223.04. 15:46
r1s4sarm​v7l2 x 14004823.04. 13:40
rcs3i6862 x 11,4005,58623.04. 15:57
rcs5sx86_​642 x 12,80011,19823.04. 16:06
r9s1x86_​642 x 12,0003,99223.04. 15:16
rcs2x86_​642 x 12,80011,23223.04. 15:56
rbs8arm​v7l2 x 16662,65023.04. 15:50
rcs4x86_​642 x 11,1004,37623.04. 16:00
r3s5sppc2 x 11,20040023.04. 14:03
r6s1x86_​642 x 12,0007,97823.04. 14:47
r6s4x86_​642 x 11,1004,37623.04. 14:50
r1s8i6861 x 21,6006,39823.04. 13:44
r1s4arm​v7l2 x 11,2004823.04. 13:39
r9s5sx86_​642 x 13,50013,99823.04. 15:25
r9s5x86_​642 x 12,70010,77413.07. 03:15
ras5arm​v7l2 x 11,0002423.04. 15:33
r9s4sx86_​642 x 11,3335,34723.04. 15:25
r8s7sx86_​642 x 13,30013,19823.04. 15:13
r4s7sx86_​642 x 11,8337,33223.04. 14:25
ras5sarm​v7l2 x 11,0002423.04. 15:33
r6s2x86_​642 x 11,6679,57823.04. 14:48
r8s7x86_​642 x 12,70010,77623.04. 15:12
r6s7i6862 x 12,3009,17611.01. 02:44
r8s8x86_​642 x 11,3005,14423.04. 15:14
r9s7arm​v7l2 x 11,000023.04. 15:27
ras2x86_​642 x 11,0674,26623.04. 15:31
r1s6x86_​642 x 22,13017,06423.04. 13:41
r6s8x86_​642 x 22,30018,35623.04. 14:53
r4s0x86_​642 x 22,30018,39623.04. 14:07
r8s2x86_​642 x 22,10016,76023.04. 15:06
r5s0x86_​642 x 22,20017,58223.04. 14:27
res5sx86_​642 x 22,20019,20023.04. 16:28
r9s6x86_​642 x 23,00023,94423.04. 15:26
rcs7x86_​642 x 21,80014,39623.04. 16:08
r1s6sx86_​642 x 21,66713,33223.04. 13:42
r5s4x86_​642 x 22,53020,26423.04. 14:32
r7s0x86_​642 x 22,30018,40023.04. 14:54
r8s2sx86_​642 x 22,10016,76023.04. 15:07
res5x86_​642 x 22,20019,20023.04. 16:27
ras0x86_​642 x 22,30018,41623.04. 15:29
r9s0x86_​642 x 22,30018,40023.04. 15:15
rbs0i6862 x 22,50017,60023.04. 15:38
r3s6sx86_​642 x 22,66721,33223.04. 14:05
r0s7sx86_​642 x 23,70029,52823.04. 13:31
r8s0x86_​642 x 22,30018,40023.04. 15:05
r1s1x86_​642 x 22,60021,69623.04. 13:35
r5s4sx86_​642 x 22,53020,26423.04. 14:33
r4s4ppc4 x 11,20049823.04. 14:17
r7s7sx86_​642 x 22,30018,39623.04. 15:02
r2s7saarch​644 x 11,50043223.04. 13:52
rds3x86_​644 x 11,91015,32423.04. 16:17
r2s6saarch​644 x 11,3506423.04. 13:50
rds4x86_​644 x 11,91015,32423.04. 16:18
rds2x86_​644 x 11,91015,32423.04. 16:16
res3x86_​644 x 12,00015,97223.04. 16:24
rbs6x86_​644 x 11,91515,32423.04. 15:45
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rbs3sarm​v7l4 x 11,40035623.04. 15:41
r7s7x86_​644 x 11,60012,76723.04. 15:02
r1s5aarch​644 x 11,20079623.04. 13:41
rbs7arm​v7l4 x 19961223.04. 15:47
r1s2sx86_​644 x 12,30028,00023.04. 13:37
rfs1aarch​644 x 11,50043223.04. 16:33
res1sx86_​644 x 11,60014,40023.04. 16:23
rds7x86_​644 x 11,60012,74823.04. 16:20
rfs2aarch​644 x 11,50043223.04. 16:34
r8s3x86_​644 x 12,66721,28023.04. 15:08
r2s0x86_​644 x 13,10024,80023.04. 13:45
r1s2x86_​644 x 12,30028,00023.04. 13:36
r4s7i6864 x 11,83314,66423.04. 14:24
r7s2sarm​v7l4 x 11,50072013.07. 02:16
rds1x86_​644 x 11,91015,32423.04. 16:15
rds5x86_​644 x 11,60012,74823.04. 16:18
ras8x86_​644 x 11,60014,40023.04. 15:36
r9s3x86_​644 x 11,60012,74823.04. 15:18
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r9s2x86_​644 x 11,60012,74823.04. 15:17
r1s0x86_​644 x 13,10024,79623.04. 13:34
rcs7sx86_​644 x 11,50011,98023.04. 16:09
r1s8sx86_​644 x 11,90015,19623.04. 13:45
rds6x86_​644 x 11,60012,74823.04. 16:19
res8sx86_​644 x 11,90015,05223.04. 16:32
ras8sx86_​644 x 11,60012,74823.04. 15:37
r5s2x86_​644 x 12,70021,69923.04. 14:29
rbs4sx86_​644 x 11,60012,74823.04. 15:43
rcs4sx86_​644 x 11,1008,75223.04. 16:02
r1s3x86_​644 x 12,80022,42423.04. 13:38
res2x86_​644 x 11,60014,40023.04. 16:24
rbs3arm​v7l4 x 19962420.04. 03:47
r3s2sriscv644 x 1028423.04. 13:57
res8x86_​644 x 11,90015,05223.04. 16:31
res1x86_​644 x 11,60014,40023.04. 16:22
r7s3sarm​v7l4 x 11,40035623.04. 14:57
rds8x86_​644 x 11,60012,74823.04. 16:20
rbs4x86_​644 x 11,2009,60023.04. 15:42
r7s4sarm​v7l4 x 11,5001,08023.04. 15:00
res4sx86_​644 x 11,90015,05223.04. 16:26
r4s5saarch​644 x 11,60020027.03. 14:13
res6x86_​644 x 11,1008,75223.04. 16:28
r5s3sx86_​644 x 11,60012,74823.04. 14:30
r4s1sarm​v7l4 x 11,50086423.04. 14:10
r7s1x86_​644 x 11,60012,84023.04. 14:55
rbs1x86_​644 x 13,10028,80023.04. 15:39
r4s1arm​v7l4 x 11,50086423.04. 14:08
r2s7aarch​644 x 12,40043223.04. 13:51
rbs7sarm​v7l4 x 19962423.04. 15:48
r9s3sx86_​644 x 13,00024,00023.04. 15:18
res4x86_​644 x 11,90015,05223.04. 16:25
res6saarch​644 x 101,60023.04. 16:29
rbs5saarch​644 x 11,6006423.04. 15:44
r3s4aarch​646 x 11,3009623.04. 13:59
r3s8i6866 x 13,20038,52623.04. 14:06
r5s1x86_​646 x 13,33340,09223.04. 14:28
rbs5i6864 x 2049,53923.04. 15:44
rcs6x86_​644 x 23,50063,99223.04. 16:07
r4s6x86_​644 x 23,40054,25623.04. 14:21
r8s5i6864 x 23,40054,40023.04. 15:11
r0s1x86_​644 x 22,30055,99223.04. 13:10
res0x86_​644 x 21,80031,99223.04. 16:21
r8s4sx86_​644 x 21,60028,80023.04. 15:10
rcs3sx86_​644 x 23,30052,69623.04. 15:58
rds0x86_​644 x 21,80031,99223.04. 16:15
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r0s3sx86_​644 x 23,60067,20023.04. 13:17
rbs8sx86_​644 x 22,40038,70423.04. 15:51
r5s3x86_​644 x 22,00031,87223.04. 14:30
r0s1sx86_​644 x 23,30052,67223.04. 13:11
r0s0x86_​644 x 22,50040,00023.04. 13:10
r0s2x86_​644 x 23,50055,86423.04. 13:12
rbs2x86_​644 x 23,20051,20023.04. 15:40
r6s3x86_​644 x 22,20035,12023.04. 14:49
rcs8sx86_​644 x 23,30052,79223.04. 16:14
r8s4x86_​644 x 21,60028,80023.04. 15:09
r3s0i6864 x 23,50055,99223.04. 13:54
ras3aarch​648 x 12,0004,00023.04. 15:31
ras6aarch​648 x 12,0003,20023.04. 15:34
r0s2sx86_​6410 x 13,70073,99023.04. 13:13
r3s3x86_​646 x 23,33379,99223.04. 13:58
rcs1x86_​646 x 23,46783,37623.04. 15:54
r0s8sx86_​646 x 23,47083,38823.04. 13:33
r0s6x86_​648 x 23,600115,20023.04. 13:25
r0s4sx86_​648 x 23,600115,20023.04. 13:19
r0s5sx86_​648 x 23,600115,20023.04. 13:21
r0s4x86_​648 x 23,600115,20023.04. 13:18
r0s7x86_​648 x 23,600115,20023.04. 13:28
r0s8x86_​648 x 23,600115,20023.04. 13:32
r0s3x86_​648 x 23,600115,20023.04. 13:14
r0s5x86_​648 x 23,500115,20023.04. 13:20
rcs0x86_​648 x 22,40076,60023.04. 15:53
r0s6sx86_​6410 x 23,700147,98023.04. 13:26
rfs0x86_​6416 x 22,000128,00023.04. 16:33
rcs8x86_​6416 x 23,700217,15223.04. 16:13
r6s0x86_​642 x 10 x 21,700136,18023.04. 14:46
 

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