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2026-05-17 - 07:35

Dates and Events:

OSADL Articles:

2024-10-02 12:00

Linux is now an RTOS!

PREEMPT_RT is mainline - What's next?


2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCores ↑MHzBogo​MIPSEffective
res7sarm​v7l0 x 1 x 11,0001217.05. 03:23
r4s6sarm​v7l0 x 1 x 11,0006617.05. 01:54
r2s3arm​v7l0 x 1 x 162462417.05. 01:30
r2s3sarm​v7l0 x 2 x 16001,20017.05. 01:31
res3saarch​640 x 1 x 11,0001,60017.05. 03:18
res7arm​v7l0 x 1 x 11,0001217.05. 03:22
rfs4aarch​641 x 11,4001,60017.05. 03:28
r8s6arm​v7l1 x 150049817.05. 02:32
r5s7sarm​v7l1 x 15284817.05. 02:10
ras3sarm​v7l1 x 11,30084017.05. 02:42
r2s5ppc1 x 13966625.12. 13:33
r5s5sarm​v7l1 x 160060017.05. 02:05
r3s2riscv641 x 11,00028417.05. 01:36
r1s7arm​v6l1 x 11,00053017.05. 01:27
r5s7arm​v7l1 x 15286417.05. 02:08
r7s3arm​v6l1 x 1700517.05. 02:19
rfs6arm​v7l1 x 16671,33217.05. 03:32
r9s1sarm​v7l1 x 101,25014.04. 18:03
r5s5arm​v7l1 x 160059717.05. 02:03
r3s5i5861 x 113326517.05. 01:39
r3s7i6861 x 15331,06617.05. 01:43
r4s5arm​v7l1 x 1500017.05. 01:53
r4s8arm​v7l1 x 140039817.05. 01:57
ras6sarm​v7l1 x 11,0001,98717.05. 02:45
r9s8sarm​v7l1 x 180079617.05. 02:40
r2s2arm​v7l1 x 172049917.05. 01:29
r4s2sarm​v7l1 x 180053017.05. 01:47
r7s8arm​v7l1 x 11,00099517.05. 02:25
r5s6ppc1 x 153313317.05. 02:08
r7s4arm​v7l1 x 153634817.05. 02:22
r4s2arm​v7l1 x 180079617.05. 01:46
r4s3i5861 x 150099617.05. 01:49
r6s6i6861 x 11,6003,19217.05. 02:16
r2s6i6861 x 11,5002,99917.05. 01:32
r6s5i6861 x 11,5002,99217.05. 02:15
r2s8ppc1 x 14006617.05. 01:34
ras1i6861 x 11,4002,79917.05. 02:41
r4s3si6861 x 11,4662,93228.07. 02:17
r4s8sarm​v7l1 x 140039817.05. 01:57
rfs4sarm​v7l1 x 180080017.05. 03:29
r8s1i5861 x 135070117.05. 02:28
r7s5i6861 x 11,3002,59317.05. 02:23
rfs8arm​v7l1 x 11,00012017.05. 03:34
r2s1arm​v5tejl1 x 120019917.05. 01:29
r7s8sarm​v7l1 x 11,00079617.05. 02:27
r2s4mips​641 x 180053129.09. 13:34
ras7ppc1 x 13966517.05. 02:46
rfs6sarm​v7l1 x 16671,33217.05. 03:32
r9s4i6861 x 21,0003,99017.05. 02:36
r3s6x86_​641 x 21,6606,66617.05. 01:42
rcs5x86_​642 x 12,80011,19817.05. 03:02
rbs6sx86_​642 x 11,3335,33229.08. 03:00
r1s4sarm​v7l2 x 14004817.05. 01:25
rcs3i6862 x 11,4005,58617.05. 02:59
rcs5sx86_​642 x 12,80011,19817.05. 03:03
r9s1x86_​642 x 12,0007,98412.02. 14:30
rcs2x86_​642 x 12,80011,23217.05. 02:58
rbs8arm​v7l2 x 16662,65017.05. 02:54
rcs4x86_​642 x 11,1004,37617.05. 03:00
r3s5sppc2 x 11,20040017.05. 01:42
r6s1x86_​642 x 12,0007,97812.12. 02:21
r6s4x86_​642 x 11,1004,37616.04. 14:14
r1s8i6861 x 21,6006,40017.05. 01:27
r1s4arm​v7l2 x 11,2004817.05. 01:24
r9s5sx86_​642 x 13,30013,19817.05. 02:38
r7s2aarch​642 x 11,7009617.05. 02:18
ras5arm​v7l2 x 11,0002417.05. 02:43
rfs2sx86_​642 x 13,00011,99817.05. 03:26
r9s4sx86_​642 x 11,3335,34717.05. 02:37
r8s7sx86_​642 x 13,00011,98017.05. 02:33
r4s7sx86_​642 x 11,8337,33217.05. 01:56
ras5sarm​v7l2 x 11,0002417.05. 02:44
r6s2x86_​642 x 11,6679,57817.05. 02:13
r6s7i6862 x 12,3009,17617.05. 02:16
r8s8x86_​642 x 11,3005,14417.05. 02:34
r9s7arm​v7l2 x 11,000017.05. 02:39
ras2x86_​642 x 11,0674,26617.05. 02:41
r1s6x86_​642 x 22,13017,06417.05. 01:26
r6s8x86_​642 x 22,30018,35617.05. 02:17
r4s0x86_​642 x 22,30018,39617.05. 01:44
r5s0x86_​642 x 22,20017,58417.05. 01:58
res5sx86_​642 x 22,20019,20017.05. 03:20
r9s6x86_​642 x 23,00023,94417.05. 02:38
rcs7x86_​642 x 21,80014,40017.05. 03:04
r1s6sx86_​642 x 21,66713,33217.05. 01:26
r5s4x86_​642 x 22,53020,26417.05. 02:01
r7s0x86_​642 x 22,30018,40017.05. 02:18
res5x86_​642 x 22,20019,20017.05. 03:20
ras0x86_​642 x 22,30018,41817.05. 02:41
rbs0i6862 x 22,50017,60017.05. 02:47
r3s6sx86_​642 x 22,66721,33217.05. 01:43
r0s7sx86_​642 x 23,70029,53223.05. 13:21
r8s0x86_​642 x 22,30018,40017.05. 02:27
r1s1x86_​642 x 22,60021,69617.05. 01:21
r4s4ppc4 x 11,20049817.05. 01:50
r3s1i6864 x 12,40019,12817.05. 01:35
r2s7saarch​644 x 11,50043217.05. 01:33
rds3x86_​644 x 11,60012,74817.05. 03:12
r7s7sx86_​642 x 22,30018,39617.05. 02:24
r2s6saarch​644 x 11,3506417.05. 01:32
rds4x86_​644 x 11,60012,74817.05. 03:12
r5s8x86_​644 x 12,00015,97217.05. 02:11
rds2x86_​644 x 11,60012,74817.05. 03:11
res3x86_​644 x 12,00015,97217.05. 03:17
r8s2aarch​644 x 11,4001,60017.05. 02:29
rbs6x86_​644 x 11,91515,32417.05. 02:51
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rbs3sarm​v7l4 x 11,40035617.05. 02:48
rcs3sx86_​644 x 13,30026,39617.05. 03:00
r3s3sx86_​644 x 13,40011,98017.05. 01:38
r7s7x86_​644 x 11,60012,76717.05. 02:24
r1s5aarch​644 x 11,20079617.05. 01:25
rbs7arm​v7l4 x 19961217.05. 02:52
r1s2sx86_​644 x 12,30028,00017.05. 01:23
rfs1aarch​644 x 11,50043217.05. 03:25
rfs1saarch​644 x 11,50043217.05. 03:26
res1sx86_​644 x 11,60014,40017.05. 03:16
rds7x86_​644 x 11,60012,74817.05. 03:14
r8s6sx86_​644 x 13,30026,41617.05. 02:32
rfs2x86_​644 x 13,00024,00017.05. 03:26
r8s3x86_​644 x 12,66721,28017.05. 02:30
r2s0x86_​644 x 13,10024,79617.05. 01:28
r1s2x86_​644 x 12,30027,99617.05. 01:22
r4s7i6864 x 11,83314,66417.05. 01:56
r7s2sriscv644 x 1028426.04. 02:17
rds1x86_​644 x 11,60012,74817.05. 03:11
r8s2saarch​644 x 11,4001,60014.05. 14:32
r2s5sarm​v7l4 x 11,20015212.12. 01:35
rds5x86_​644 x 11,60012,74817.05. 03:13
ras8x86_​644 x 11,60014,40017.05. 02:46
r9s3x86_​644 x 11,60012,74817.05. 02:35
rfs5saarch​644 x 11,2006417.05. 03:31
r9s2x86_​644 x 11,60012,74817.05. 02:35
r1s0x86_​644 x 13,10024,80017.05. 01:21
rcs7sx86_​644 x 11,50011,98017.05. 03:05
r1s8sx86_​644 x 11,90015,19617.05. 01:28
rds6x86_​644 x 11,60012,74817.05. 03:14
res8sx86_​644 x 11,90015,05217.05. 03:24
rfs3x86_​644 x 11,60012,74817.05. 03:26
ras8sx86_​644 x 11,60012,74817.05. 02:46
r5s2x86_​644 x 12,70021,69917.05. 01:59
rbs4sx86_​644 x 11,60012,74817.05. 02:49
r1s3x86_​644 x 12,80022,42417.05. 01:23
res2x86_​644 x 11,60014,40017.05. 03:17
ras2sx86_​644 x 11,90015,05217.05. 02:42
rbs3arm​v7l4 x 19962417.05. 02:48
rfs3sx86_​644 x 11,60012,74817.05. 03:27
r3s2sriscv644 x 1028417.05. 01:37
res8x86_​644 x 11,90015,05217.05. 03:24
res1x86_​644 x 11,60014,40017.05. 03:16
r7s3sarm​v7l4 x 11,40035616.05. 02:22
rds8x86_​644 x 11,60012,74817.05. 03:15
rfs7sx86_​644 x 17006,44817.05. 03:34
rbs4x86_​644 x 11,2009,60017.05. 02:49
r7s4sarm​v7l4 x 11,5001,08017.05. 02:22
res4sx86_​644 x 11,90015,05217.05. 03:19
r4s5saarch​644 x 11,60020017.05. 01:53
res6x86_​644 x 11,1008,75217.05. 03:21
r5s3sx86_​644 x 11,60012,74817.05. 02:00
r4s1sarm​v7l4 x 11,50086417.05. 01:45
r7s1x86_​644 x 11,60012,83917.05. 02:18
rfs5aarch​644 x 11,2006417.05. 03:30
r4s1arm​v7l4 x 11,50072017.05. 01:45
r2s7aarch​644 x 12,40043217.05. 01:33
rbs7sarm​v7l4 x 19962417.05. 02:54
r9s3sx86_​644 x 13,00024,00017.05. 02:36
res4x86_​644 x 11,90015,05217.05. 03:19
r8s7x86_​644 x 13,20025,49617.05. 02:33
res6saarch​644 x 101,60017.05. 03:22
rbs5saarch​644 x 11,6006417.05. 02:50
r5s4sx86_​644 x 11,60012,74817.05. 02:02
r3s4aarch​646 x 11,3009617.05. 01:38
r5s1x86_​646 x 13,33340,08617.05. 01:58
rbs5i6864 x 2052,36517.05. 02:50
rcs6x86_​644 x 23,50063,99217.05. 03:04
r0s0sx86_​644 x 23,40054,39217.05. 01:10
r4s6x86_​644 x 23,40054,25617.05. 01:54
r8s5i6864 x 23,40054,40017.05. 02:31
rfs7x86_​644 x 22,60041,60017.05. 03:33
r0s1x86_​644 x 22,30056,00017.05. 01:11
res0x86_​644 x 23,40054,39217.05. 03:15
r8s4sx86_​644 x 21,60028,80017.05. 02:31
rds0x86_​644 x 21,80031,99217.05. 03:10
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r0s3sx86_​644 x 23,60067,20017.05. 01:14
rbs8sx86_​644 x 22,40038,70417.05. 02:55
r9s0x86_​644 x 23,60057,60004.05. 02:36
r5s3x86_​644 x 22,00031,87217.05. 02:00
r0s1sx86_​644 x 23,30052,80017.05. 01:11
r0s0x86_​644 x 22,50039,99217.05. 01:10
r0s2x86_​644 x 23,50055,87217.05. 01:11
r6s3x86_​644 x 22,20035,12017.05. 02:13
rcs8sx86_​644 x 23,30052,80017.05. 03:09
r8s4x86_​644 x 21,60028,80017.05. 02:30
r3s0i6864 x 23,50055,99217.05. 01:35
ras4saarch​648 x 12,40038429.09. 03:02
ras3aarch​648 x 12,0004,00006.05. 03:01
ras6aarch​648 x 12,0003,20017.05. 02:44
ras4aarch​648 x 12,40038416.05. 14:42
r0s7x86_​6410 x 13,70073,99017.05. 01:20
r0s2sx86_​6410 x 13,70073,99017.05. 01:12
r3s3x86_​646 x 23,33379,99217.05. 01:37
rcs1x86_​646 x 23,46783,37617.05. 02:57
r0s8sx86_​646 x 23,47083,38817.05. 01:20
r0s6x86_​648 x 23,600115,20017.05. 01:18
r0s4sx86_​648 x 23,600115,20017.05. 01:16
r0s5sx86_​648 x 23,600115,20017.05. 01:17
r0s4x86_​648 x 23,600115,20017.05. 01:15
r0s8x86_​648 x 23,600115,20014.03. 13:20
r0s3x86_​648 x 23,600115,20017.05. 01:13
r0s5x86_​648 x 23,500115,20017.05. 01:16
rcs0x86_​648 x 22,40076,40017.05. 02:57
r0s6sx86_​6410 x 23,700147,98017.05. 01:19
rfs0x86_​6416 x 22,000128,00017.05. 03:25
rcs8x86_​6416 x 23,700217,18417.05. 03:09
r6s0x86_​642 x 10 x 21,700136,14017.05. 02:12
 

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