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2024-04-19 - 14:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Fri Apr 19, 2024 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
90421780,4sleep111951099cyclictest22:43:543
1395621750,6sleep31949899cyclictest21:39:199
2956821380,5sleep101950999cyclictest23:55:502
187842124104,15sleep100-21swapper/1019:09:102
188332118103,11sleep10-21swapper/119:09:491
2794721130,4sleep131951299cyclictest23:42:305
18794211391,18sleep140-21swapper/1419:09:146
961421090,4sleep61950299cyclictest21:59:0912
18883210773,29sleep130-21swapper/1319:10:335
18936210691,9sleep80-21swapper/819:11:1614
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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