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2024-04-20 - 07:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot2.osadl.org (updated Sat Apr 20, 2024 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
602327149,17sleep00-21swapper/019:02:370
596827047,18sleep10-21swapper/119:02:011
42712380,0sleep00-21swapper/021:27:220
202732240,0sleep00-21swapper/021:05:090
6433991716,1cyclictest6861-21ssh22:17:021
6433991716,1cyclictest6861-21ssh22:17:021
6433991716,1cyclictest25505-21ssh21:10:441
6433991615,0cyclictest7758-21mailstats20:30:191
6433991615,0cyclictest1411-21ls22:55:201
6433991614,1cyclictest89892sleep123:54:491
6433991610,6cyclictest0-21swapper/122:33:351
6433991610,6cyclictest0-21swapper/119:40:211
6433991610,1cyclictest0-21swapper/119:07:511
6432991616,0cyclictest14118-21ssh22:27:590
6432991616,0cyclictest0-21swapper/023:20:030
6432991615,0cyclictest7310-21rm22:18:040
6432991615,0cyclictest7310-21rm22:18:040
6432991614,1cyclictest232522sleep019:46:250
6432991614,1cyclictest156122sleep019:26:380
32152160,0sleep10-21swapper/122:11:541
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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