You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-06 - 05:04

Dates and Events:

OSADL Articles:

2024-10-02 12:00

Linux is now an RTOS!

PREEMPT_RT is mainline - What's next?


2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Number of cores/hyperthreads and bogoMIPS (by arch) - (x86 CPU strings)

BoxArch ↑CoresMHzBogo​MIPSEffective
ras3aarch​648 x 12,0004,00006.05. 03:01
rfs5saarch​644 x 11,2006427.08. 03:49
ras6aarch​648 x 12,0003,20006.12. 02:58
r7s2aarch​642 x 11,7009606.12. 02:29
ras4aarch​648 x 12,40038406.12. 02:56
res3saarch​640 x 1 x 11,0001,60006.12. 03:37
r4s5saarch​644 x 11,60020006.12. 02:02
r2s6saarch​644 x 11,3506406.12. 01:36
rfs5aarch​644 x 11,2006406.12. 03:49
rfs4aarch​641 x 11,4001,60006.12. 03:47
r2s7aarch​644 x 12,40043206.12. 01:36
res6saarch​644 x 101,60006.12. 03:41
rbs5saarch​644 x 11,6006406.12. 03:06
r1s5aarch​644 x 11,20079606.12. 01:27
rfs1aarch​644 x 11,50043206.12. 03:44
rfs1saarch​644 x 11,50043206.12. 03:45
ras4saarch​648 x 12,40038429.09. 03:02
r2s7saarch​644 x 11,50043206.12. 01:37
r3s4aarch​646 x 11,3009606.12. 01:43
r2s1arm​v5tejl1 x 120019906.12. 01:31
r1s7arm​v6l1 x 120053006.12. 01:29
r7s3arm​v6l1 x 1700506.12. 02:30
r2s3arm​v7l0 x 1 x 162462406.12. 01:32
ras6sarm​v7l1 x 11,0001,98706.12. 02:59
r9s8sarm​v7l1 x 180079606.12. 02:53
r2s2arm​v7l1 x 172049906.12. 01:32
r1s4arm​v7l2 x 11,2004806.12. 01:26
r4s2sarm​v7l1 x 180053006.12. 01:54
r7s8arm​v7l1 x 11,00099506.12. 02:37
ras5arm​v7l2 x 11,0002406.12. 02:57
r7s4arm​v7l1 x 153634806.12. 02:33
r4s2arm​v7l1 x 180079606.12. 01:53
rbs3arm​v7l4 x 19962405.12. 14:54
r7s3sarm​v7l4 x 11,40035606.12. 02:32
r7s4sarm​v7l4 x 11,5001,08006.12. 02:34
r4s8sarm​v7l1 x 140039806.12. 02:07
rfs4sarm​v7l1 x 180080006.12. 03:48
r4s1sarm​v7l4 x 11,50086406.12. 01:52
r7s6arm​v7l1 x 11,00039828.02. 14:10
ras5sarm​v7l2 x 11,0002406.12. 02:57
r4s1arm​v7l4 x 11,50079206.12. 01:51
res7arm​v7l0 x 1 x 11,0001206.12. 03:42
rfs8arm​v7l1 x 11,00012004.03. 03:47
rbs7sarm​v7l4 x 19962406.12. 03:10
r7s8sarm​v7l1 x 11,00079606.12. 02:37
ras3sarm​v7l1 x 11,30084006.12. 02:56
r9s7arm​v7l2 x 11,000006.12. 02:52
rfs6sarm​v7l1 x 16671,33206.12. 03:51
res7sarm​v7l0 x 1 x 11,0001206.12. 03:42
r8s6arm​v7l1 x 150049806.12. 02:42
r1s4sarm​v7l2 x 14004806.12. 01:27
r5s5sarm​v7l1 x 160060006.12. 02:14
r2s3sarm​v7l0 x 2 x 16001,20006.12. 01:33
rbs3sarm​v7l4 x 11,40035606.12. 03:03
r5s7arm​v7l1 x 15286406.12. 02:18
rfs6arm​v7l1 x 16671,33206.12. 03:50
r9s1sarm​v7l1 x 101,25014.04. 18:03
rbs7arm​v7l4 x 19961206.12. 03:08
r5s5arm​v7l1 x 160059706.12. 02:12
rbs8arm​v7l2 x 16662,65006.12. 03:11
r4s5arm​v7l1 x 1500006.12. 02:02
r4s6sarm​v7l0 x 1 x 11,0006606.12. 02:04
r4s8arm​v7l1 x 140039806.12. 02:06
r5s7sarm​v7l1 x 15284806.12. 02:20
r2s5sarm​v7l4 x 11,20015206.12. 01:34
r4s3i5861 x 150099606.12. 01:57
r8s1i5861 x 135070106.12. 02:39
r3s5i5861 x 113326506.12. 01:44
r9s4i6861 x 21,0003,99006.12. 02:49
rbs5i6864 x 2049,41506.12. 03:05
r3s8i6864 x 13,20027,36906.12. 01:50
r6s6i6861 x 11,6003,19206.12. 02:26
r2s6i6861 x 11,5002,99906.12. 01:35
r6s5i6861 x 11,5002,99206.12. 02:26
rbs0i6862 x 22,50017,60006.12. 03:01
ras1i6861 x 11,4002,79906.12. 02:54
r4s3si6861 x 11,4662,93228.07. 02:17
r7s5i6861 x 11,3002,59306.12. 02:35
r3s0i6864 x 23,50055,99206.12. 01:38
r1s8i6861 x 21,6006,39806.12. 01:29
r6s7i6862 x 12,3009,17629.11. 14:33
r8s5i6864 x 23,40054,40006.12. 02:41
rcs3i6862 x 11,4005,58806.12. 03:15
r3s1i6864 x 12,40019,12706.12. 01:39
r3s7i6861 x 15331,06606.12. 01:49
r4s7i6864 x 11,83314,66406.12. 02:05
r2s4mips​641 x 180053129.09. 13:34
r5s6ppc1 x 153313306.12. 02:17
r2s8ppc1 x 14006606.12. 01:38
ras7ppc1 x 13966506.12. 02:59
r2s5ppc1 x 13966611.11. 13:35
r4s4ppc4 x 11,20049806.12. 01:58
r3s5sppc2 x 11,20040006.12. 01:47
r3s2sriscv644 x 1028406.12. 01:41
r3s2riscv641 x 11,00028406.12. 01:40
r7s2sriscv644 x 1028422.11. 02:27
rds3x86_​644 x 11,60012,74806.12. 03:30
r0s5sx86_​648 x 23,600115,20006.12. 01:18
ras0x86_​642 x 22,30018,41806.12. 02:53
r9s3x86_​644 x 11,60012,74806.12. 02:47
r0s4x86_​648 x 23,600115,20006.12. 01:16
r6s0x86_​642 x 10 x 21,700136,18006.12. 02:22
rbs8sx86_​644 x 22,40038,70406.12. 03:12
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r9s2x86_​644 x 11,60012,74806.12. 02:47
r9s5sx86_​642 x 13,30013,19806.12. 02:50
r1s0x86_​644 x 13,10024,80006.12. 01:23
rcs7sx86_​644 x 11,50011,98006.12. 03:23
r1s8sx86_​644 x 11,90015,19606.12. 01:30
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s0x86_​644 x 23,60057,60006.12. 02:45
rds6x86_​644 x 11,60012,74806.12. 03:32
rfs0x86_​6416 x 22,000127,96806.12. 03:44
res8sx86_​644 x 11,90015,05206.12. 03:43
rfs3x86_​644 x 11,60012,74806.12. 03:46
rfs2sx86_​642 x 13,00011,99806.12. 03:46
r5s3x86_​644 x 22,00031,87206.12. 02:09
ras8sx86_​644 x 11,60012,74806.12. 03:00
r0s7x86_​648 x 23,600115,20006.12. 01:20
r0s2sx86_​6410 x 13,70073,99006.12. 01:12
r5s2x86_​644 x 12,70021,69906.12. 02:08
r0s8x86_​648 x 23,600115,20006.12. 01:21
rcs6x86_​644 x 23,50063,99206.12. 03:21
rbs4sx86_​644 x 11,60012,74806.12. 03:05
r9s4sx86_​642 x 11,3335,34706.12. 02:49
r1s3x86_​644 x 12,80022,42406.12. 01:26
res2x86_​644 x 11,60014,40006.12. 03:36
r8s7sx86_​642 x 13,00011,98006.12. 02:44
r5s1x86_​646 x 13,33340,08606.12. 02:08
r0s0sx86_​644 x 23,40054,39206.12. 01:10
ras2sx86_​644 x 11,90015,05206.12. 02:55
rcs1x86_​646 x 23,46783,37606.12. 03:14
rfs3sx86_​644 x 11,60012,74806.12. 03:47
r0s1sx86_​644 x 23,30052,79206.12. 01:11
r0s0x86_​644 x 22,50040,00006.12. 01:10
res8x86_​644 x 11,90015,05206.12. 03:43
res1x86_​644 x 11,60014,40006.12. 03:35
r6s8x86_​642 x 22,30018,35606.12. 02:27
r0s2x86_​644 x 23,50055,86406.12. 01:11
rds8x86_​644 x 11,60012,74806.12. 03:33
rfs7sx86_​644 x 17006,44806.12. 03:52
rbs4x86_​644 x 11,2009,60006.12. 03:04
r4s6x86_​644 x 23,40054,25606.12. 02:02
r3s6sx86_​642 x 22,66721,33206.12. 01:48
rbs2x86_​644 x 12,00015,97206.12. 03:02
r0s3x86_​648 x 23,600115,20006.12. 01:13
res4sx86_​644 x 11,90015,05206.12. 03:38
r4s7sx86_​642 x 11,8337,33206.12. 02:06
r0s7sx86_​642 x 23,70029,53223.05. 13:21
res6x86_​644 x 11,1008,75206.12. 03:40
r0s5x86_​648 x 23,500115,20006.12. 01:17
r8s0x86_​642 x 22,30018,40006.12. 02:38
r5s3sx86_​644 x 11,60012,74806.12. 02:10
r6s3x86_​644 x 22,20035,12006.12. 02:24
r7s1x86_​644 x 11,60012,83906.12. 02:28
rbs1x86_​644 x 12,00015,97206.12. 03:02
rds4x86_​644 x 11,60012,74806.12. 03:31
rcs8sx86_​644 x 23,30052,80006.12. 03:28
r6s2x86_​642 x 11,6679,57806.12. 02:23
rcs8x86_​6416 x 23,700217,15206.12. 03:27
r8s4x86_​644 x 21,60028,80006.12. 02:40
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rcs0x86_​648 x 22,40076,60806.12. 03:13
r9s3sx86_​644 x 13,00024,00006.12. 02:48
r1s1x86_​642 x 22,60021,69606.12. 01:24
res4x86_​644 x 11,90015,05206.12. 03:37
r8s7x86_​644 x 13,20025,49606.12. 02:43
r5s8x86_​644 x 12,00015,97206.12. 02:21
r0s8sx86_​646 x 23,47083,37606.12. 01:22
r5s4sx86_​644 x 11,60012,74806.12. 02:11
r8s8x86_​642 x 11,3005,14406.12. 02:44
r7s7sx86_​642 x 22,30018,39606.12. 02:36
ras2x86_​642 x 11,0674,26606.12. 02:54
rds2x86_​644 x 11,60012,74806.12. 03:29
r4s0x86_​642 x 22,30018,40006.12. 01:51
res3x86_​644 x 12,00015,97206.12. 03:36
rbs6x86_​644 x 11,91515,32406.12. 03:07
rfs7x86_​644 x 22,60041,60006.12. 03:51
r0s1x86_​644 x 22,30055,99206.12. 01:11
r3s3x86_​646 x 23,33379,99206.12. 01:42
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rcs5sx86_​642 x 12,80011,19806.12. 03:21
res0x86_​644 x 23,40054,39206.12. 03:34
r5s0x86_​642 x 22,20017,58206.12. 02:07
r8s4sx86_​644 x 21,60028,80006.12. 02:41
rcs3sx86_​644 x 13,30026,39606.12. 03:17
r9s1x86_​642 x 12,0003,99206.12. 02:46
r3s3sx86_​644 x 13,40011,98006.12. 01:42
r7s7x86_​644 x 11,60012,76706.12. 02:35
res5sx86_​642 x 22,20019,20006.12. 03:39
r1s6x86_​642 x 22,13017,06406.12. 01:28
r9s6x86_​642 x 23,00023,94406.12. 02:51
rcs7x86_​642 x 21,80014,39606.12. 03:22
r1s2sx86_​644 x 12,30028,00006.12. 01:25
rcs5x86_​642 x 12,80011,19806.12. 03:19
r0s6sx86_​6410 x 23,700147,98006.12. 01:19
r3s6x86_​641 x 21,6606,66606.12. 01:48
r1s6sx86_​642 x 21,66713,33206.12. 01:28
rds0x86_​644 x 21,80031,99206.12. 03:28
res1sx86_​644 x 11,60014,40006.12. 03:35
rds7x86_​644 x 11,60012,74806.12. 03:33
r8s6sx86_​644 x 13,30026,41606.12. 02:42
r5s2sx86_​644 x 24,00063,86312.04. 01:34
rfs2x86_​644 x 13,00023,99606.12. 03:45
rcs2x86_​642 x 12,80011,23206.12. 03:15
r5s4x86_​642 x 22,53020,26406.12. 02:10
rcs4x86_​642 x 11,1004,37606.12. 03:17
r8s3x86_​644 x 12,66721,28006.12. 02:40
r2s0x86_​644 x 13,10024,80006.12. 01:31
r1s2x86_​644 x 12,30028,00006.12. 01:24
r0s3sx86_​644 x 23,60067,20006.12. 01:15
r6s1x86_​642 x 12,0007,97806.12. 02:22
r7s0x86_​642 x 22,30018,40006.12. 02:28
rds1x86_​644 x 11,60012,74806.12. 03:29
r0s6x86_​648 x 23,600115,20006.12. 01:18
r0s4sx86_​648 x 23,600115,20006.12. 01:16
rbs2sx86_​641 x 13,500007.09. 15:06
r6s4x86_​642 x 11,1004,37606.12. 02:25
rds5x86_​644 x 11,60012,74806.12. 03:31
ras8x86_​644 x 11,60014,40006.12. 03:00
res5x86_​642 x 22,20019,20006.12. 03:39
 

Valid XHTML 1.0 Transitional