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2017-03-29 - 20:58

Number of cores/hyperthreads and bogoMIPS (by arch) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPSEffective
r2s1arm​v5tejl1 x 120019929.03. 13:21
r1s7arm​v6l1 x 120053029.03. 13:20
r2s8arm​v6l1 x 153253029.03. 13:23
r7s8sarm​v7l1 x 1100029829.03. 13:49
ras3sarm​v7l8 x 1130074429.03. 14:00
r9s7arm​v7l2 x 11000029.03. 13:56
rbs3sarm​v7l4 x 1120022829.03. 14:03
r8s6arm​v7l1 x 150049829.03. 13:52
r7s7arm​v7l2 x 11000118129.03. 13:45
rbs7arm​v7l4 x 19962429.03. 14:04
rbs8arm​v7l2 x 1666265029.03. 14:04
r4s5arm​v7l1 x 1500029.03. 13:32
r2s3arm​v7l1 x 160049529.03. 13:22
r9s8arm​v7l4 x 1996632429.03. 13:57
r2s2arm​v7l1 x 172049929.03. 13:22
r4s2sarm​v7l1 x 180039829.03. 13:29
r7s8arm​v7l1 x 1100079629.03. 13:48
r7s4arm​v7l1 x 153634829.03. 13:42
r4s2arm​v7l1 x 180039829.03. 13:28
r7s3sarm​v7l4 x 1120015229.03. 13:41
ras4arm​v7l1 x 150039829.03. 14:01
r7s6arm​v7l1 x 1100039829.03. 13:43
r4s3i5861 x 150099629.03. 13:31
r8s1i5861 x 130060129.03. 13:50
r3s0i6862 x 225001995229.03. 13:23
r1s8i6861 x 21600639829.03. 13:20
r6s7i6862 x 12300917629.03. 13:38
r8s8i6862 x 11900758229.03. 13:53
r8s5i6864 x 234005440029.03. 13:52
rcs3i6862 x 11400558629.03. 14:05
r3s2i6861 x 11530306129.03. 13:24
r8s4si6864 x 118331466429.03. 13:51
r3s7i6861 x 1533106629.03. 13:26
ras8i6862 x 125001077629.03. 14:01
r3s1i6864 x 124001912729.03. 13:23
r9s4i6861 x 21000399029.03. 13:55
r7s2i6861 x 1600119629.03. 13:40
r3s8i6866 x 132003852629.03. 13:26
rbs5i6862 x 12000799929.03. 14:03
r6s6i6861 x 11600319229.03. 13:38
r5s1i6864 x 233305318529.03. 13:34
r2s6i6861 x 11500299929.03. 13:22
r6s5i6861 x 11500299229.03. 13:37
rbs0i6862 x 225001995229.03. 14:02
ras1i6861 x 11400279929.03. 14:00
rbs2i6861 x 11000199929.03. 14:02
r7s1i6861 x 1800160229.03. 13:39
r7s5i6861 x 11300259329.03. 13:42
r8s4i6864 x 118331466429.03. 13:51
r5s7mips​1 x 149249229.03. 13:35
r2s4mips​641 x 180053129.03. 01:19
ras7ppc1 x 13966529.03. 14:01
r2s5ppc1 x 13966629.03. 13:22
r1s5ppc2 x 1120040029.03. 13:20
r5s6ppc1 x 153313329.03. 13:35
r4s6x86_​644 x 234005425629.03. 13:32
r1s1x86_​642 x 16 x 1210013438429.03. 13:15
r8s7x86_​642 x 127001077629.03. 13:52
r0s8sx86_​646 x 234708334729.03. 13:14
ras2x86_​642 x 11067426629.03. 14:00
r4s0x86_​642 x 223001840029.03. 13:27
r8s2x86_​642 x 129001157229.03. 13:50
r0s1x86_​642 x 223001839629.03. 13:10
r3s3x86_​646 x 233337999229.03. 13:24
r5s0x86_​642 x 222001756029.03. 13:34
r9s1x86_​642 x 12000399229.03. 13:54
r9s6x86_​642 x 230002394429.03. 13:56
r4s4x86_​642 x 11333532829.03. 13:32
rcs7x86_​642 x 218001439629.03. 14:06
r3s6x86_​641 x 21667666629.03. 13:25
r5s2sx86_​644 x 240006386229.03. 13:34
rcs2x86_​642 x 128001123329.03. 14:05
r5s4x86_​642 x 225302026829.03. 13:35
r8s3x86_​644 x 235005587229.03. 13:51
r2s0x86_​644 x 131002480029.03. 13:21
r1s6x86_​642 x 221301702029.03. 13:20
r6s1x86_​642 x 12000798029.03. 13:36
r4s7x86_​644 x 116001279629.03. 13:33
r4s8x86_​642 x 11140400029.03. 13:33
r7s0x86_​642 x 223001840029.03. 13:39
r0s6x86_​644 x 235005587229.03. 13:12
r3s4x86_​641 x 21400560029.03. 13:25
r6s4x86_​641 x 12200438925.03. 13:34
ras0x86_​642 x 223001840029.03. 14:00
r9s3x86_​644 x 225003664029.03. 13:55
r0s4x86_​642 x 237002953229.03. 13:11
r6s0x86_​648 x 136005779229.03. 13:36
r9s2x86_​644 x 227004320029.03. 13:54
r9s5sx86_​644 x 234005452829.03. 13:56
r1s0x86_​644 x 131002480029.03. 13:15
r9s5x86_​642 x 127001077629.03. 13:55
r9s0x86_​642 x 223001839629.03. 13:54
r0s7x86_​646 x 230008017229.03. 13:13
r5s2x86_​644 x 127002169829.03. 13:34
r0s8x86_​644 x 240006416129.03. 13:13
r1s3x86_​641 x 11800359029.03. 13:16
r8s7sx86_​644 x 234005452829.03. 13:53
r0s1sx86_​644 x 233005279229.03. 13:10
rcs6x86_​644 x 125001995229.03. 02:02
r0s0x86_​642 x 225001995229.03. 13:10
r0s2x86_​644 x 126672127629.03. 13:10
r0s3x86_​646 x 236008640029.03. 13:11
r0s5x86_​644 x 235005587229.03. 13:12
r8s0x86_​642 x 223001839629.03. 13:49
r6s8x86_​642 x 223001835629.03. 13:39
r6s3x86_​644 x 222003512029.03. 13:37
r4s1sx86_​642 x 221001673829.03. 13:27
rbs1x86_​644 x 131002480029.03. 14:02
r4s1x86_​642 x 227002155429.03. 13:27
 

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