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2023-09-30 - 15:06
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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHz ↑Bogo​MIPSEffective
rbs5i6864 x 2049,16830.09. 03:25
r9s1sarm​v7l1 x 101,25014.04. 18:03
res6saarch​644 x 101,60030.09. 04:01
r3s5i5861 x 113326530.09. 13:59
r2s1arm​v5tejl1 x 120019930.09. 13:48
r8s1i5861 x 130060130.09. 02:59
r2s5ppc1 x 13966623.09. 13:46
ras7ppc1 x 13966530.09. 03:20
r1s4sarm​v7l2 x 14004830.09. 13:43
r4s8arm​v7l1 x 140039830.09. 14:17
r2s8ppc1 x 14006630.09. 13:54
r4s8sarm​v7l1 x 140039830.09. 14:18
r8s6arm​v7l1 x 150049830.09. 03:06
r4s5arm​v7l1 x 1500030.09. 14:14
r4s3i5861 x 150099630.09. 14:09
ras4arm​v7l1 x 150039830.09. 03:17
r5s7sarm​v7l1 x 15286430.09. 14:31
r5s7arm​v7l1 x 15286430.09. 14:29
r3s7i6861 x 15331,06630.09. 14:03
r5s6ppc1 x 153313330.09. 14:28
r7s4arm​v7l1 x 153635130.09. 15:03
r5s5sarm​v7l1 x 160060030.09. 14:25
r5s5arm​v7l1 x 160059730.09. 14:24
ras4sarm​v7l1 x 160059707.02. 02:45
r2s3arm​v7l0 x 1 x 162462430.09. 13:52
rbs8arm​v7l2 x 16662,65030.09. 03:30
r7s3arm​v6l1 x 1700530.09. 15:00
r2s2arm​v7l1 x 172049930.09. 13:52
r9s8sarm​v7l1 x 180079630.09. 03:14
r4s2sarm​v7l1 x 180047730.09. 14:07
r4s2arm​v7l1 x 180079630.09. 14:06
r2s4mips​641 x 180053122.09. 01:44
rbs7arm​v7l4 x 19961230.09. 03:28
rbs3arm​v7l4 x 19962430.09. 03:23
rbs7sarm​v7l4 x 19962430.09. 03:29
r9s4i6861 x 21,0003,98830.09. 03:11
res7sarm​v7l0 x 1 x 11,0001230.09. 04:02
r3s2riscv641 x 11,00028430.09. 13:57
r4s6sarm​v7l0 x 1 x 11,0006630.09. 14:16
ras6sarm​v7l1 x 11,0001,98730.09. 03:19
ras6arm​v7l1 x 11,0001,98730.09. 03:19
r7s8arm​v7l1 x 11,00099530.09. 02:57
ras5arm​v7l2 x 11,0002430.09. 03:18
res3saarch​640 x 1 x 11,0001,60030.09. 03:58
r7s6arm​v7l1 x 11,00039828.02. 14:10
ras5sarm​v7l2 x 11,0002430.09. 03:18
res7arm​v7l0 x 1 x 11,0001230.09. 04:01
r7s8sarm​v7l1 x 11,00079630.09. 02:58
r9s7arm​v7l2 x 11,000030.09. 03:14
ras2x86_​642 x 11,0674,26630.09. 03:16
rcs4x86_​642 x 11,1004,37630.09. 03:37
r6s4x86_​642 x 11,1004,37630.09. 14:35
rcs4sx86_​644 x 11,1008,75230.09. 03:38
res6x86_​644 x 11,1008,75230.09. 04:00
r4s4ppc4 x 11,20049830.09. 14:11
r1s5aarch​644 x 11,20079630.09. 13:44
r3s5sppc2 x 11,20040013.09. 13:56
r1s4arm​v7l2 x 11,2004830.09. 13:43
rbs4x86_​644 x 11,2009,60030.09. 03:24
ras3sarm​v7l1 x 11,30084030.09. 03:17
r7s5i6861 x 11,3002,59330.09. 15:05
r8s8x86_​642 x 11,3005,14430.09. 03:07
rbs6sx86_​642 x 11,3335,33230.09. 03:27
r9s4sx86_​642 x 11,3335,34730.09. 03:12
r2s6saarch​644 x 11,3506430.09. 13:54
rcs3i6862 x 11,4005,58630.09. 03:34
rbs3sarm​v7l4 x 11,40035630.09. 03:23
r3s4x86_​641 x 21,4005,60010.01. 01:28
r7s3sarm​v7l4 x 11,40035630.09. 15:02
ras1i6861 x 11,4002,79930.09. 03:16
r4s3si6861 x 11,4662,93230.09. 14:10
r7s2sarm​v7l4 x 11,50072013.07. 02:16
rcs7sx86_​644 x 11,50011,98030.09. 03:42
r2s6i6861 x 11,5002,99930.09. 13:53
r6s5i6861 x 11,5001,12230.09. 14:56
r7s4sarm​v7l4 x 11,50057630.09. 15:04
r4s1sarm​v7l4 x 11,50086430.09. 14:06
r4s1arm​v7l4 x 11,50072030.09. 14:05
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r8s4sx86_​644 x 21,60028,80030.09. 03:04
r7s7x86_​644 x 11,60012,76730.09. 15:05
res1sx86_​644 x 11,60014,40030.09. 03:56
rds7x86_​644 x 11,60012,74830.09. 03:51
rds5x86_​644 x 11,60012,74830.09. 03:50
ras8x86_​644 x 11,60014,40030.09. 03:20
r9s3x86_​644 x 11,60012,74830.09. 03:10
r9s2x86_​644 x 11,60012,74830.09. 03:09
rds6x86_​644 x 11,60012,74830.09. 03:51
ras8sx86_​644 x 11,60012,74830.09. 03:21
rbs4sx86_​644 x 11,60012,74830.09. 03:25
res2x86_​644 x 11,60014,40030.09. 03:56
r6s6i6861 x 11,6003,19130.09. 14:57
res1x86_​644 x 11,60014,40030.09. 03:55
rds8x86_​644 x 11,60012,74830.09. 03:52
r4s5saarch​644 x 11,60020030.09. 14:15
r5s3sx86_​644 x 11,60012,74830.09. 14:21
r7s1x86_​644 x 11,60012,84030.09. 14:59
r8s4x86_​644 x 21,60028,80030.09. 03:02
rbs5saarch​644 x 11,6006430.09. 03:26
r1s8i6861 x 21,6006,39830.09. 13:46
r3s6x86_​641 x 21,6606,66630.09. 14:01
r1s6sx86_​642 x 21,66713,33230.09. 13:45
r6s2x86_​642 x 11,6679,57630.09. 14:33
r6s0x86_​642 x 10 x 21,700136,14030.09. 14:32
res0x86_​644 x 21,80031,99230.09. 03:52
r1s7arm​v6l1 x 11,80053030.09. 13:45
rcs7x86_​642 x 21,80014,39630.09. 03:41
rds0x86_​644 x 21,80031,99230.09. 03:47
r4s7i6864 x 11,83314,66430.09. 14:16
r4s7sx86_​642 x 11,8337,33230.09. 14:17
r1s8sx86_​644 x 11,90015,19630.09. 13:47
res8sx86_​644 x 11,90015,05230.09. 04:05
res8x86_​644 x 11,90015,05230.09. 04:02
res4x86_​644 x 11,90015,05225.10. 03:17
rds3x86_​644 x 11,91015,32430.09. 03:49
rds4x86_​644 x 11,91015,32430.09. 03:50
rds2x86_​644 x 11,91015,32430.09. 03:48
rds1x86_​644 x 11,91015,32430.09. 03:48
rbs6x86_​644 x 11,91515,32430.09. 03:26
res3x86_​644 x 12,00015,97230.09. 03:57
r9s1x86_​642 x 12,0003,99230.09. 03:09
r6s1x86_​642 x 12,0007,97830.09. 14:33
ras3aarch​648 x 12,0004,00030.09. 03:16
r5s3x86_​644 x 22,00031,87230.09. 14:20
r8s2x86_​642 x 22,10016,76030.09. 03:00
r8s2sx86_​642 x 22,10016,76030.09. 03:01
r1s6x86_​642 x 22,13017,06430.09. 13:44
r5s0x86_​642 x 22,20017,58230.09. 14:18
res5sx86_​642 x 22,20019,20030.09. 03:59
res5x86_​642 x 22,20019,20030.09. 03:59
r6s3x86_​644 x 22,20035,12030.09. 14:34
r6s8x86_​642 x 22,30018,35630.09. 14:58
r4s0x86_​642 x 22,30018,39630.09. 14:05
r0s1x86_​644 x 22,30055,99230.09. 13:11
r1s2sx86_​644 x 12,30028,00030.09. 13:41
r1s2x86_​644 x 12,30028,00030.09. 13:40
r7s0x86_​642 x 22,30018,40030.09. 14:59
ras0x86_​642 x 22,30018,41730.09. 03:15
r9s0x86_​642 x 22,30018,40030.09. 03:08
r8s0x86_​642 x 22,30018,40030.09. 02:58
r6s7i6862 x 12,3009,17630.09. 14:57
r7s7sx86_​642 x 22,30018,39630.09. 15:06
r3s1i6864 x 12,40019,12730.09. 13:56
rbs8sx86_​644 x 22,40038,70430.09. 03:30
rcs0x86_​648 x 22,40077,36830.09. 03:32
rbs0i6862 x 22,50017,60030.09. 03:21
r0s0x86_​644 x 22,50039,99230.09. 13:10
r5s4x86_​642 x 22,53020,26430.09. 14:21
r5s4sx86_​642 x 22,53020,26430.09. 14:22
r1s1x86_​642 x 22,60021,69630.09. 13:40
r8s3x86_​644 x 12,66721,27630.09. 03:01
r3s6sx86_​642 x 22,66721,33230.09. 14:02
r9s5x86_​642 x 12,70010,77413.07. 03:15
r5s2x86_​644 x 12,70021,69930.09. 14:19
r8s7x86_​642 x 12,70010,77630.09. 03:06
rcs5x86_​642 x 12,80011,19830.09. 03:39
rcs5sx86_​642 x 12,80011,19830.09. 03:40
rcs2x86_​642 x 12,80011,23230.09. 03:34
r1s3x86_​644 x 12,80022,42430.09. 13:41
r9s6x86_​642 x 23,00023,94430.09. 03:13
r9s3sx86_​644 x 13,00024,00030.09. 03:11
r2s0x86_​644 x 13,10024,79630.09. 13:47
r1s0x86_​644 x 13,10024,79630.09. 13:39
rbs1x86_​644 x 13,10028,80030.09. 03:22
r3s8i6866 x 13,20038,52030.09. 14:04
rbs2x86_​644 x 23,20051,20030.09. 03:22
rcs3sx86_​644 x 23,30052,69630.09. 03:35
r8s7sx86_​642 x 13,30013,19830.09. 03:07
r0s1sx86_​644 x 23,30052,80030.09. 13:11
rcs8sx86_​644 x 23,30052,79230.09. 03:47
r3s3x86_​646 x 23,33379,99230.09. 13:58
r5s1x86_​646 x 13,33340,09230.09. 14:19
r4s6x86_​644 x 23,40054,25630.09. 14:15
r8s5i6864 x 23,40054,39230.09. 03:05
rcs1x86_​646 x 23,46783,37630.09. 03:33
r0s8sx86_​646 x 23,47083,38830.09. 13:38
rcs6x86_​644 x 23,50063,99230.09. 03:41
rbs2sx86_​641 x 13,500007.09. 15:06
r1s3sx86_​644 x 23,50056,00026.05. 01:16
r9s5sx86_​642 x 13,50013,99830.09. 03:13
r0s2x86_​644 x 23,50055,86430.09. 13:12
r0s5x86_​648 x 23,500115,20030.09. 13:26
r3s0i6864 x 23,50055,99230.09. 13:56
r0s3sx86_​644 x 23,60067,20030.09. 13:18
r0s6x86_​648 x 23,600115,20030.09. 13:29
r0s4sx86_​648 x 23,600115,20030.09. 13:24
r0s5sx86_​648 x 23,600115,20030.09. 13:29
r0s4x86_​648 x 23,600115,20030.09. 13:21
r0s7x86_​648 x 23,600115,20030.09. 13:32
r0s8x86_​648 x 23,600115,20030.09. 13:36
r0s3x86_​648 x 23,600115,20030.09. 13:15
r0s6sx86_​6410 x 23,700147,98015.09. 13:29
r0s2sx86_​6410 x 13,70073,99030.09. 13:15
r0s7sx86_​642 x 23,70029,52830.09. 13:33
rcs8x86_​6416 x 23,700217,15230.09. 03:46
r5s2sx86_​644 x 24,00063,86312.04. 01:34
 

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