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2018-10-21 - 21:26

Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPSEffective
r3s5i5861 x 113326521.10. 13:26
r2s1arm​v5tejl1 x 120019921.10. 13:21
r8s1i5861 x 130060121.10. 14:05
r2s5ppc1 x 13966626.01. 13:22
ras7ppc1 x 13966521.10. 14:21
r5s8ppc1 x 1400263721.10. 13:51
r4s8arm​v7l1 x 140039821.10. 13:41
r2s8ppc1 x 14006613.10. 13:24
r4s8sarm​v7l1 x 140039821.10. 13:41
r8s6arm​v7l1 x 150049821.10. 14:08
r4s5arm​v7l1 x 1500021.10. 13:37
r4s3i5861 x 150099621.10. 13:35
ras4arm​v7l1 x 150039821.10. 14:18
r5s7sarm​v7l1 x 15284821.10. 13:50
r5s7arm​v7l1 x 15284821.10. 13:49
r3s7i6861 x 1533106621.10. 13:29
r5s6ppc1 x 153313321.10. 13:48
r7s4arm​v7l1 x 153634821.10. 13:59
r5s5sarm​v7l1 x 160060021.10. 13:45
r5s5arm​v7l1 x 160059721.10. 13:44
r2s3arm​v7l1 x 160049521.10. 01:23
r9s8arm​v7l1 x 160059721.10. 14:16
r7s2i6861 x 1600119721.10. 13:56
rbs8arm​v7l2 x 1666265021.10. 14:29
r7s3arm​v6l1 x 1700521.10. 13:57
r2s2arm​v7l1 x 172049921.10. 13:21
ras4sarm​v7l1 x 180039821.10. 14:18
r9s8sarm​v7l1 x 180079621.10. 14:16
r4s2sarm​v7l1 x 180039821.10. 13:33
r4s2arm​v7l1 x 180047721.10. 13:32
r2s4mips​641 x 180053121.10. 13:22
rbs3arm​v7l4 x 190015220.10. 14:22
rbs7arm​v7l4 x 19962421.10. 14:25
rbs7sarm​v7l4 x 1996632421.10. 14:26
r9s4i6861 x 21000399021.10. 14:13
ras6sarm​v7l1 x 11000198721.10. 14:21
ras6arm​v7l1 x 11000198721.10. 14:20
r7s8arm​v7l1 x 1100079621.10. 14:04
ras5arm​v7l2 x 110002421.10. 14:20
rbs2i6861 x 11000199921.10. 14:23
r7s6arm​v7l1 x 1100039821.10. 14:00
ras5sarm​v7l2 x 110002421.10. 14:20
r7s8sarm​v7l1 x 1100079621.10. 14:04
r9s7arm​v7l2 x 11000021.10. 14:16
ras2x86_​642 x 11067426621.10. 14:18
rcs4x86_​642 x 11100437821.10. 14:35
r6s4x86_​642 x 11100437621.10. 13:53
r9s1sx86_​642 x 11140399821.10. 14:11
r4s4ppc4 x 1120049821.10. 13:36
r1s5ppc2 x 1120040021.10. 13:19
rbs4x86_​644 x 11200960019.10. 02:21
r4s4sppc4 x 11200960006.08. 11:25
ras3sarm​v7l8 x 1130074421.05. 14:08
r7s5i6861 x 11300259321.10. 14:00
rbs6sx86_​642 x 11333533221.10. 14:24
r9s4sx86_​642 x 11333534721.10. 14:14
rcs3i6862 x 11400558821.10. 14:32
rbs3sarm​v7l4 x 1140035621.10. 14:23
r3s4x86_​641 x 21400560021.10. 13:26
r7s3sarm​v7l4 x 1140035621.10. 13:58
ras1i6861 x 11400279921.10. 14:17
rcs7sx86_​644 x 115001198021.10. 14:41
r2s6i6861 x 11500299921.10. 13:22
r6s5i6861 x 11500299220.10. 13:54
r3s2i6861 x 11530306121.10. 13:25
r7s7x86_​644 x 116001276721.10. 14:03
ras8sx86_​644 x 116001274821.10. 14:22
r6s6i6861 x 11600319121.10. 13:53
r4s5saarch​644 x 1160020021.10. 13:37
r5s3sx86_​644 x 116001274821.10. 13:43
r7s1x86_​644 x 116001283921.10. 13:55
r1s8i6861 x 21600639821.10. 13:20
r3s6x86_​641 x 21667666421.10. 13:28
r1s4x86_​642 x 216671333221.10. 13:18
r6s2x86_​642 x 11667957821.10. 13:52
r6s0x86_​642 x 10 x 2170013614021.10. 13:51
rcs7x86_​642 x 218001439621.10. 14:40
r1s3x86_​641 x 11800359021.10. 13:18
r8s4si6864 x 118331466421.10. 14:08
r4s7i6864 x 118331466021.10. 13:38
r4s7sx86_​642 x 11833733021.10. 13:40
r8s4i6864 x 118331466421.10. 14:07
r8s8i6862 x 11900758721.10. 14:09
rbs6x86_​644 x 119151532421.10. 14:24
r2s6sx86_​644 x 119901599221.10. 13:23
rbs5i6862 x 12000799921.10. 14:24
r9s1x86_​642 x 12000399121.10. 14:11
r6s1x86_​642 x 12000798021.10. 13:52
ras3aarch​648 x 12000400028.09. 14:16
r5s3x86_​644 x 220003187221.10. 13:42
r8s2x86_​642 x 221001676021.10. 14:06
r8s2sx86_​642 x 221001676021.10. 14:06
r4s1sx86_​642 x 221001676821.10. 13:31
r1s1x86_​642 x 16 x 1210013436821.10. 13:17
r1s6x86_​642 x 221301706821.10. 13:19
r5s0x86_​642 x 222001758421.10. 13:41
r6s3x86_​644 x 222003511221.10. 13:52
r6s8x86_​642 x 223001838221.10. 13:54
r4s0x86_​642 x 223001840021.10. 13:30
r0s1x86_​644 x 223005600021.10. 13:10
r7s0x86_​642 x 223001841721.10. 13:55
ras0x86_​642 x 223001841521.10. 14:17
r9s0x86_​642 x 223001839621.10. 14:10
r8s0x86_​642 x 223001840021.10. 14:04
r6s7i6862 x 12300917621.10. 13:54
r7s7sx86_​642 x 223001844821.10. 14:03
r3s1i6862 x 12400960021.10. 13:24
r1s2x86_​642 x 12400960021.10. 13:17
rcs0x86_​642 x 4 x 224007660021.10. 14:30
ras8i6862 x 125001077421.10. 14:21
r9s3x86_​644 x 225003670521.10. 14:12
rbs0i6862 x 225001760021.10. 14:22
r0s0x86_​644 x 225003999221.10. 13:10
r5s4x86_​642 x 225302026421.10. 13:44
r5s4si6862 x 225302026421.10. 13:44
r8s3x86_​644 x 126672127621.10. 14:07
r3s6sx86_​642 x 226672133221.10. 13:28
rcs8x86_​646 x 226706414021.10. 14:42
r9s2x86_​644 x 227004319221.10. 14:12
r9s5x86_​642 x 127001077821.10. 14:14
r5s2x86_​644 x 127002169921.10. 13:42
r4s1x86_​642 x 227002155321.10. 13:31
r8s7x86_​642 x 127001077921.10. 14:09
rcs5x86_​642 x 128001123221.10. 14:36
rcs5sx86_​642 x 128001123221.10. 14:38
r1s7arm​v6l1 x 1280053021.10. 13:19
rcs2x86_​642 x 128001123221.10. 14:32
r9s6x86_​642 x 230002396721.10. 14:15
r9s3sx86_​644 x 130002400021.10. 14:13
r2s0x86_​644 x 131002481721.10. 13:20
r1s0x86_​644 x 131002481521.10. 13:16
rbs1x86_​644 x 131002480021.10. 14:22
r3s8i6866 x 132003849821.10. 13:29
rcs3sx86_​644 x 233005269621.10. 14:33
r7s5sx86_​642 x 133001324805.02. 13:54
r8s7sx86_​642 x 133001324821.10. 14:09
r0s1sx86_​644 x 233005280021.10. 13:10
rcs8sx86_​644 x 233005280021.10. 14:42
r5s1i6864 x 233305318521.10. 13:41
r3s3x86_​646 x 233337999221.10. 13:25
r0s7x86_​646 x 233338018421.10. 13:14
r4s6x86_​644 x 234005431621.10. 13:37
r8s5i6864 x 234005440021.10. 14:08
r0s5sx86_​644 x 234005452821.10. 13:13
r9s5sx86_​644 x 234005455421.10. 14:15
rcs1x86_​646 x 234678337721.10. 14:32
r0s8sx86_​646 x 234708338821.10. 13:16
r0s6x86_​644 x 235005586421.10. 13:14
r0s2sx86_​644 x 235005586421.10. 13:11
r0s5x86_​644 x 235005587221.10. 13:13
r3s0i6864 x 235005599221.10. 13:24
r0s3x86_​646 x 236008640021.10. 13:12
r0s4x86_​642 x 237002952821.10. 13:12
r0s8x86_​6416 x 2370021715221.10. 13:15
r2s7x86_​644 x 137002960021.10. 13:23
rcs6x86_​644 x 240006412821.10. 14:39
r5s2sx86_​644 x 240006386312.04. 01:34
r0s2x86_​644 x 242006720021.10. 13:11
 

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