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2024-06-17 - 22:40

Dates and Events:

OSADL Articles:

2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHz ↑Bogo​MIPSEffective
rbs5i6864 x 2049,53917.06. 17:56
r9s1sarm​v7l1 x 101,25014.04. 18:03
r3s2sriscv644 x 1028417.06. 14:36
res6saarch​644 x 101,60017.06. 19:26
r3s5i5861 x 113326504.06. 14:45
r2s1arm​v5tejl1 x 120019917.06. 14:12
r8s1i5861 x 135070117.06. 16:42
r2s5ppc1 x 13966627.03. 13:43
ras7ppc1 x 13966517.06. 17:40
r1s4sarm​v7l2 x 14004817.06. 14:01
r4s8arm​v7l1 x 140039817.06. 15:26
r2s8ppc1 x 14006617.06. 14:28
r4s8sarm​v7l1 x 140039817.06. 15:28
r8s6arm​v7l1 x 150049817.06. 16:55
r4s5arm​v7l1 x 1500017.06. 15:17
r4s3i5861 x 150099617.06. 15:08
ras4arm​v7l1 x 150039817.06. 17:34
r5s7sarm​v7l1 x 15286417.06. 15:59
r5s7arm​v7l1 x 15286417.06. 15:56
r3s7i6861 x 15331,06617.06. 14:50
r5s6ppc1 x 153313317.06. 15:55
r7s4arm​v7l1 x 153634817.06. 16:27
r5s5sarm​v7l1 x 160060017.06. 15:47
r2s3sarm​v7l0 x 1 x 16001,20017.06. 14:19
r5s5arm​v7l1 x 160059717.06. 15:44
ras4sarm​v7l1 x 160059707.02. 02:45
r2s3arm​v7l0 x 1 x 162462417.06. 14:17
rbs8arm​v7l2 x 16662,65017.06. 18:07
rfs6arm​v7l1 x 16671,33217.06. 19:53
rfs6sarm​v7l1 x 16671,33217.06. 19:54
r7s3arm​v6l1 x 1700517.06. 16:21
r2s2arm​v7l1 x 172049917.06. 14:16
rfs4arm​v7l1 x 180080017.06. 19:37
r9s8sarm​v7l1 x 180079617.06. 17:25
r4s2sarm​v7l1 x 180053017.06. 15:03
r4s2arm​v7l1 x 180079617.06. 15:01
rfs4sarm​v7l1 x 180080017.06. 19:45
r2s4mips​641 x 180053124.12. 13:46
rbs7arm​v7l4 x 19962817.06. 18:03
rbs3arm​v7l4 x 19962817.06. 17:49
rbs7sarm​v7l4 x 19962417.06. 18:05
r9s4i6861 x 21,0003,99017.06. 17:11
res7sarm​v7l0 x 1 x 11,0001212.01. 05:12
r3s2riscv641 x 11,00028417.06. 14:34
r4s6sarm​v7l0 x 1 x 11,0006617.06. 15:20
ras6sarm​v7l1 x 11,0001,98717.06. 17:38
r7s8arm​v7l1 x 11,00099517.06. 16:37
ras5arm​v7l2 x 11,0002417.06. 17:36
res3saarch​640 x 1 x 11,0001,60017.06. 19:15
r7s6arm​v7l1 x 11,00039828.02. 14:10
ras5sarm​v7l2 x 11,0002417.06. 17:36
res7arm​v7l0 x 1 x 11,0001217.06. 19:28
r7s8sarm​v7l1 x 11,00099617.06. 16:39
r9s7arm​v7l2 x 11,000017.06. 17:23
ras2x86_​642 x 11,0674,26617.06. 17:30
rcs4x86_​642 x 11,1004,37617.06. 18:28
r6s4x86_​642 x 11,1004,37617.06. 16:11
rcs4sx86_​644 x 11,1008,75217.06. 18:30
res6x86_​644 x 11,1008,75217.06. 19:24
r4s4ppc4 x 11,20049817.06. 15:13
r1s5aarch​644 x 11,20079617.06. 14:02
r3s5sppc2 x 11,20040017.06. 14:45
r1s4arm​v7l2 x 11,2004817.06. 14:00
rbs4x86_​644 x 11,2009,60017.06. 17:54
ras3sarm​v7l1 x 11,30084017.06. 17:33
r3s4aarch​646 x 11,3009617.06. 14:39
r7s5i6861 x 11,3002,59317.06. 16:31
r8s8x86_​642 x 11,3005,14417.06. 17:00
rbs6sx86_​642 x 11,3335,33217.06. 18:01
r9s4sx86_​642 x 11,3335,34717.06. 17:17
r2s6saarch​644 x 11,3506417.06. 14:22
rcs3i6862 x 11,4005,58817.06. 18:22
rbs3sarm​v7l4 x 11,40035617.06. 17:50
r7s3sarm​v7l4 x 11,40035617.06. 16:24
ras1i6861 x 11,4002,79917.06. 17:29
r4s3si6861 x 11,4662,93217.06. 15:10
r2s7saarch​644 x 11,50043217.06. 14:26
rfs1aarch​644 x 11,50043217.06. 19:35
rfs2aarch​644 x 11,50043217.06. 19:36
r7s2sarm​v7l4 x 11,50072013.07. 02:16
rcs7sx86_​644 x 11,50011,98017.06. 18:41
r2s6i6861 x 11,5002,99917.06. 14:20
r6s5i6861 x 11,5002,99217.06. 16:13
r7s4sarm​v7l4 x 11,5001,08017.06. 16:30
r4s1sarm​v7l4 x 11,5001,08017.06. 14:57
r4s1arm​v7l4 x 11,5001,00817.06. 14:55
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r8s4sx86_​644 x 21,60028,80017.06. 16:51
r7s7x86_​644 x 11,60012,76717.06. 16:33
res1sx86_​644 x 11,60014,40017.06. 19:11
rds7x86_​644 x 11,60012,74817.06. 19:05
rds5x86_​644 x 11,60012,74817.06. 19:01
ras8x86_​644 x 11,60014,40017.06. 17:41
r9s3x86_​644 x 11,60012,74817.06. 17:07
r9s2x86_​644 x 11,60012,74817.06. 17:06
rds6x86_​644 x 11,60012,74817.06. 19:03
ras8sx86_​644 x 11,60012,74817.06. 17:43
rbs4sx86_​644 x 11,60012,74817.06. 17:55
res2x86_​644 x 11,60014,40017.06. 19:12
r6s6i6861 x 11,6003,19117.06. 16:15
res1x86_​644 x 11,60014,40017.06. 19:09
rds8x86_​644 x 11,60012,74817.06. 19:06
r4s5saarch​644 x 11,60020017.06. 15:18
r5s3sx86_​644 x 11,60012,74817.06. 15:35
r7s1x86_​644 x 11,60012,84017.06. 16:20
r8s4x86_​644 x 21,60028,80017.06. 16:50
rbs5saarch​644 x 11,6006417.06. 17:58
r1s8i6861 x 21,6006,39817.06. 14:07
r3s6x86_​641 x 11,6603,33317.06. 14:46
r1s6sx86_​642 x 21,66713,33217.06. 14:05
r6s2x86_​642 x 11,6679,57817.06. 16:07
r6s0x86_​642 x 10 x 21,700136,18017.06. 16:02
res0x86_​644 x 21,80031,99217.06. 19:07
r1s7arm​v6l1 x 11,80053017.06. 02:10
rcs7x86_​642 x 21,80014,39617.06. 18:40
rds0x86_​644 x 21,80031,99217.06. 18:52
r4s7i6864 x 11,83314,66417.06. 15:23
r4s7sx86_​642 x 11,8337,33217.06. 15:25
r1s8sx86_​644 x 11,90015,19617.06. 14:10
res8sx86_​644 x 11,90015,05217.06. 19:32
res8x86_​644 x 11,90015,05217.06. 19:31
res4sx86_​644 x 11,90015,05217.06. 19:18
res4x86_​644 x 11,90015,05217.06. 19:16
rds3x86_​644 x 11,91015,32417.06. 18:57
rds4x86_​644 x 11,91015,32417.06. 18:59
rds2x86_​644 x 11,91015,32417.06. 18:55
rds1x86_​644 x 11,91015,32417.06. 18:54
rbs6x86_​644 x 11,91515,32417.06. 17:59
rfs0x86_​6416 x 22,000128,00017.06. 19:34
res3x86_​644 x 12,00015,97217.06. 19:13
r9s1x86_​642 x 12,0003,99217.06. 17:04
r6s1x86_​642 x 12,0007,97817.06. 16:05
ras3aarch​648 x 12,0004,00017.06. 17:31
ras6aarch​648 x 12,0003,20020.05. 17:01
r5s3x86_​644 x 22,00031,87217.06. 15:34
rbs2x86_​644 x 12,00015,97217.06. 17:48
rbs1x86_​644 x 12,00015,97217.06. 17:47
r8s2x86_​642 x 22,10016,76017.06. 16:44
r8s2sx86_​642 x 22,10016,76017.06. 16:46
r1s6x86_​642 x 22,13017,06417.06. 14:03
r5s0x86_​642 x 22,20017,58117.06. 15:29
res5sx86_​642 x 22,20019,20017.06. 19:22
res5x86_​642 x 22,20019,20017.06. 19:20
r6s3x86_​644 x 22,20035,11217.06. 16:09
r6s8x86_​642 x 22,30018,35617.06. 16:17
r4s0x86_​642 x 22,30018,39617.06. 14:53
r0s1x86_​644 x 22,30055,99217.06. 13:11
r1s2sx86_​644 x 12,30028,00017.06. 13:56
r1s2x86_​644 x 12,30028,00017.06. 13:54
r7s0x86_​642 x 22,30018,40017.06. 16:19
ras0x86_​642 x 22,30018,41617.06. 17:27
r9s0x86_​642 x 22,30018,39617.06. 17:02
r8s0x86_​642 x 22,30018,40017.06. 16:40
r6s7i6862 x 12,3009,17611.01. 02:44
r7s7sx86_​642 x 22,30018,39617.06. 16:35
r3s1i6864 x 12,40019,12717.06. 14:32
rbs8sx86_​644 x 22,40038,70417.06. 18:11
rcs0x86_​648 x 22,40076,60017.06. 18:16
r2s7aarch​644 x 12,40043217.06. 14:24
rbs0i6862 x 22,50017,60017.06. 17:45
r0s0x86_​644 x 22,50040,00017.06. 13:10
r5s4x86_​642 x 22,53020,26417.06. 15:38
r5s4sx86_​642 x 22,53020,26417.06. 15:40
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r1s1x86_​642 x 22,60021,69617.06. 13:52
r8s3x86_​644 x 12,66721,28017.06. 16:48
r3s6sx86_​642 x 22,66721,33217.06. 14:47
r9s5x86_​642 x 12,70010,77413.07. 03:15
r5s2x86_​644 x 12,70021,69917.06. 15:31
r8s7x86_​642 x 12,70010,77617.06. 16:56
rcs5x86_​642 x 12,80011,19817.06. 18:32
rcs5sx86_​642 x 12,80011,19817.06. 18:36
rcs2x86_​642 x 12,80011,23217.06. 18:21
r1s3x86_​644 x 12,80022,42417.06. 13:58
r9s6x86_​642 x 23,00023,94417.06. 17:20
r9s3sx86_​644 x 13,00024,00017.06. 17:09
r2s0x86_​644 x 13,10024,80017.06. 14:10
r1s0x86_​644 x 13,10024,80017.06. 13:50
r3s8i6866 x 13,20038,52617.06. 14:51
rcs3sx86_​644 x 23,30052,69617.06. 18:25
r8s7sx86_​642 x 13,30013,19817.06. 16:58
r0s1sx86_​644 x 23,30052,67217.06. 13:13
rcs8sx86_​644 x 23,30052,79217.06. 18:50
r3s3x86_​646 x 23,33379,99217.06. 14:37
r5s1x86_​646 x 13,33340,09217.06. 15:30
r4s6x86_​644 x 23,40054,25617.06. 03:22
r8s5i6864 x 23,40054,40017.06. 16:53
rcs1x86_​646 x 23,46783,37617.06. 18:18
r0s8sx86_​646 x 23,47083,38817.06. 13:48
rcs6x86_​644 x 23,50063,99217.06. 18:38
rbs2sx86_​641 x 13,500007.09. 15:06
r9s5sx86_​642 x 13,50013,99817.06. 17:19
r0s2x86_​644 x 23,50055,86417.06. 13:15
r0s5x86_​648 x 23,500115,20017.06. 13:31
r3s0i6864 x 23,50055,99217.06. 14:30
r0s3sx86_​644 x 23,60067,20017.06. 13:25
r0s6x86_​648 x 23,600115,20017.06. 13:35
r0s4sx86_​648 x 23,600115,20017.06. 13:29
r0s5sx86_​648 x 23,600115,20017.06. 13:33
r0s4x86_​648 x 23,600115,20017.06. 13:26
r0s7x86_​648 x 23,600115,20017.06. 13:37
r0s8x86_​648 x 23,600115,20017.06. 13:45
r0s3x86_​648 x 23,600115,20017.06. 13:19
r0s6sx86_​6410 x 23,700147,98016.06. 01:36
r0s2sx86_​6410 x 13,70073,99017.06. 13:17
r0s7sx86_​642 x 23,70029,52817.06. 13:43
rcs8x86_​6416 x 23,700217,15217.06. 18:48
r5s2sx86_​644 x 24,00063,86312.04. 01:34
 

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