You are here: Home / Projects / QA Farm Realtime / CPUs under test / 
2020-07-03 - 12:45

Dates and Events:


OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPSEffective
r3s5i5861 x 113326525.05. 01:26
r2s1arm​v5tejl1 x 120019903.07. 01:20
r8s1i5861 x 130060102.01. 02:02
r2s5ppc1 x 13966626.01. 13:22
ras7ppc1 x 13966503.07. 02:19
r5s8ppc1 x 1400263715.07. 01:50
r1s4sarm​v7l2 x 14004803.07. 01:17
r7s5sarm​v7l2 x 140040012.03. 14:00
r4s8arm​v7l1 x 140039803.07. 01:37
r2s8ppc1 x 14006603.07. 01:24
r4s8sarm​v7l1 x 140039803.07. 01:38
r8s6arm​v7l1 x 150049803.07. 02:02
r4s5arm​v7l1 x 1500003.07. 01:35
r4s3i5861 x 150099603.07. 01:32
ras4arm​v7l1 x 150039826.11. 14:13
r5s7sarm​v7l1 x 15284803.07. 01:44
r5s7arm​v7l1 x 15286403.07. 01:43
r3s7i6861 x 1533106603.07. 01:28
r5s6ppc1 x 153313303.07. 01:43
r7s4arm​v7l1 x 153634816.10. 14:00
r5s5sarm​v7l1 x 160060010.06. 13:43
r5s5arm​v7l1 x 160059703.07. 01:41
ras4sarm​v7l1 x 160059707.02. 02:45
r2s3arm​v7l1 x 160049525.04. 01:23
r9s8arm​v7l1 x 160059725.06. 02:14
r7s2i6861 x 1600119619.07. 13:52
rbs8arm​v7l2 x 1666265003.07. 02:27
r7s3arm​v6l1 x 1700503.07. 01:49
r2s2arm​v7l1 x 172049924.04. 01:20
r9s8sarm​v7l1 x 180079603.07. 02:14
r4s2sarm​v7l1 x 180053024.06. 01:31
r4s2arm​v7l1 x 180053007.04. 13:30
r2s4mips​641 x 180053110.01. 01:23
rbs3arm​v7l4 x 190015203.06. 02:20
rbs7arm​v7l4 x 19962402.01. 16:34
rbs7sarm​v7l4 x 1996632409.01. 02:23
r9s4i6861 x 21000398803.07. 02:11
ras6sarm​v7l1 x 11000198703.07. 02:19
ras6arm​v7l1 x 11000198703.07. 02:18
r7s8arm​v7l1 x 1100079602.07. 14:03
ras5arm​v7l2 x 110002403.07. 02:18
rbs2i6861 x 11000199903.07. 02:21
r7s6arm​v7l1 x 1100039827.04. 01:55
ras5sarm​v7l2 x 110002403.07. 02:18
r7s8sarm​v7l1 x 1100079603.07. 01:55
r9s7arm​v7l2 x 11000003.07. 02:14
ras2x86_​642 x 11067426603.07. 02:16
rcs4x86_​642 x 11100437603.07. 02:30
r6s4x86_​642 x 11100437630.06. 13:47
r9s1sx86_​642 x 11140399812.03. 14:08
r4s4ppc4 x 1120049813.07. 13:33
r1s5aarch​644 x 1120079603.07. 01:17
r3s5sppc2 x 1120040012.04. 13:29
r1s4arm​v7l2 x 112004803.07. 01:17
rbs4x86_​644 x 11200960031.05. 02:15
r4s4sppc4 x 11200960006.08. 11:25
ras3sarm​v7l8 x 1130074421.05. 14:08
r7s5i6861 x 11300259303.07. 01:52
r8s8x86_​642 x 11300514403.07. 02:04
rbs6sx86_​642 x 11333533203.07. 02:26
r9s4sx86_​642 x 11333534703.07. 02:11
rcs3i6862 x 11400558603.07. 02:29
rbs3sarm​v7l4 x 1140035603.07. 02:24
r3s4x86_​641 x 21400560010.01. 01:28
r7s3sarm​v7l4 x 1140035603.07. 01:51
ras1i6861 x 11400279903.07. 02:16
r4s3si6861 x 11466293203.07. 01:32
r7s2sarm​v7l4 x 1150043212.06. 13:48
rcs7sx86_​644 x 115001198014.04. 14:27
r2s6i6861 x 11500299903.07. 01:23
r6s5i6861 x 11500299228.01. 13:54
r3s2i6861 x 11530306103.07. 01:26
r7s7x86_​644 x 116001276703.07. 01:54
rds7x86_​644 x 116001274803.07. 02:44
rds5x86_​644 x 116001274803.07. 02:42
r9s3x86_​644 x 116001274803.07. 02:10
rds6x86_​644 x 116001274803.07. 02:43
ras8sx86_​644 x 116001274816.04. 14:10
rbs4sx86_​644 x 116001274809.03. 14:21
r6s6i6861 x 11600319103.07. 01:47
rds8x86_​644 x 116001274803.07. 02:46
r4s5saarch​644 x 1160020003.07. 01:35
r5s3sx86_​644 x 116001274803.07. 01:39
r7s1x86_​644 x 116001283917.05. 20:00
r1s8i6861 x 21600639803.07. 01:19
r3s6x86_​641 x 21660666603.07. 01:28
r1s6sx86_​642 x 216671333203.07. 01:18
r6s2x86_​642 x 11667957802.01. 13:55
r6s0x86_​642 x 10 x 2170013614003.07. 01:46
rcs7x86_​642 x 218001439603.07. 02:36
rds0x86_​644 x 218003199203.07. 02:38
r3s2sx86_​641 x 11800359003.07. 01:26
r8s4si6862 x 11833733203.07. 02:00
r4s7i6864 x 118331466003.07. 01:36
r4s7sx86_​642 x 11833733003.07. 01:36
r8s4i6864 x 118331466409.06. 01:58
r1s8sx86_​644 x 119001518004.05. 13:19
rds3x86_​644 x 119101532403.07. 02:41
rds4x86_​644 x 119101532403.07. 02:41
rds2x86_​644 x 119101532403.07. 02:40
rds1x86_​644 x 119101532403.07. 02:39
rbs6x86_​644 x 119151532412.03. 14:22
r2s6sx86_​644 x 119901599209.03. 01:21
rbs5i6862 x 12000799908.04. 02:16
r9s1x86_​642 x 12000399103.07. 02:06
r6s1x86_​642 x 12000798028.03. 13:51
ras3aarch​648 x 12000400003.07. 02:17
r5s3x86_​644 x 220003187203.07. 01:39
r8s2x86_​642 x 221001676003.07. 01:56
r8s2sx86_​642 x 221001676003.07. 01:57
r4s1sx86_​642 x 221001676803.07. 01:31
r1s6x86_​642 x 221301706402.03. 13:18
r5s0x86_​642 x 222001758103.07. 01:38
r6s3x86_​644 x 222003511203.07. 01:46
r6s8x86_​642 x 223001835603.07. 01:48
r4s0x86_​642 x 223001840003.07. 01:29
r0s1x86_​644 x 223005600003.07. 01:10
r1s2x86_​644 x 123002800003.07. 01:16
r7s0x86_​642 x 223001841903.07. 01:48
ras0x86_​642 x 223001841703.07. 02:15
r9s2x86_​642 x 223001836403.07. 02:07
r9s0x86_​642 x 223001839603.07. 02:04
r8s0x86_​642 x 223001840003.07. 01:55
r6s7i6862 x 12300917612.03. 13:55
r7s7sx86_​642 x 223001844818.11. 13:59
r3s1i6864 x 124001912803.07. 01:25
rcs0x86_​648 x 224007659202.07. 14:29
ras8i6862 x 125001077412.03. 14:16
rbs0i6862 x 225001760003.07. 02:20
r0s0x86_​644 x 225003999203.07. 01:10
r5s4x86_​642 x 225302026403.07. 01:40
r5s4si6862 x 225302026418.03. 13:42
r1s1x86_​642 x 226002169603.07. 01:16
r8s3x86_​644 x 126672127603.07. 01:58
r3s6sx86_​642 x 226672133203.07. 01:28
r9s5x86_​642 x 127001077603.07. 02:12
r5s2x86_​644 x 127002169903.07. 01:38
r4s1x86_​642 x 227002155303.07. 01:30
r8s7x86_​642 x 127001077412.03. 14:05
rcs5x86_​642 x 128001119803.07. 02:31
rcs5sx86_​642 x 128001119803.07. 02:33
r1s7arm​v6l1 x 1280053030.03. 13:19
rcs2x86_​642 x 128001123203.07. 02:28
r9s6x86_​642 x 230002396503.07. 02:13
r9s3sx86_​644 x 130002400023.06. 02:08
r2s0x86_​644 x 131002480003.07. 01:20
r1s0x86_​644 x 131002479603.07. 01:15
rbs1x86_​644 x 131002480003.07. 02:20
r3s8i6866 x 132003852603.07. 01:29
rcs3sx86_​644 x 233005269612.03. 14:28
r8s7sx86_​642 x 133001324803.07. 02:03
r0s1sx86_​644 x 233005279203.07. 01:10
rcs8sx86_​644 x 233005280003.07. 02:38
r3s3x86_​646 x 233337999203.07. 01:27
r5s1x86_​644 x 233335344803.07. 01:38
r9s2sx86_​644 x 233505349603.07. 02:09
r4s6x86_​644 x 234005426403.07. 01:35
r8s5i6864 x 234005439203.07. 02:01
r0s5sx86_​644 x 234005439203.07. 01:12
r9s5sx86_​644 x 234005439203.07. 02:12
rcs1x86_​646 x 234678337602.07. 14:31
r0s8sx86_​646 x 234708319603.07. 01:15
r0s6x86_​644 x 235005587203.07. 01:13
r1s3sx86_​644 x 235005600026.05. 01:16
r0s2sx86_​644 x 235005586406.05. 13:11
r1s3x86_​644 x 235005600026.05. 01:16
r0s2x86_​644 x 235005587203.07. 01:11
r0s5x86_​644 x 235005587203.07. 01:12
r3s0i6864 x 235005599203.07. 01:25
r4s6s-t1x86_​642 x 136001440029.09. 11:13
r4s6sx86_​648 x 136005760010.12. 13:36
r4s6s-t2x86_​642 x 136001440029.08. 01:45
r4s6s-lxc1x86_​642 x 136001440023.11. 13:46
r4s6s-lxc2x86_​642 x 136001440023.11. 13:47
r0s7x86_​648 x 2360011520003.07. 01:13
r0s8x86_​648 x 2360011520003.07. 01:14
r0s3x86_​646 x 236008640013.03. 13:11
r0s7sx86_​648 x 2360011520003.07. 01:14
r0s4x86_​642 x 237002953203.07. 01:11
rcs8x86_​6416 x 2370021715203.07. 02:37
r2s7x86_​644 x 137002959603.07. 01:23
rcs6x86_​644 x 240006399203.07. 02:35
r5s2sx86_​644 x 240006386312.04. 01:34
 

Valid XHTML 1.0 Transitional