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2024-03-04 - 16:38

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OSADL Articles:

2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHz ↑Bogo​MIPSEffective
rbs5i6864 x 2049,53904.03. 15:20
r9s1sarm​v7l1 x 101,25014.04. 18:03
r3s2sriscv644 x 1028404.03. 13:54
res6saarch​644 x 101,60004.03. 16:03
r3s5i5861 x 113326504.03. 13:56
r2s1arm​v5tejl1 x 120019904.03. 13:40
r8s1i5861 x 130060129.02. 14:56
r2s5ppc1 x 13966604.03. 13:46
ras7ppc1 x 13966504.03. 15:12
r1s4sarm​v7l2 x 14004804.03. 13:35
r4s8arm​v7l1 x 140039804.03. 14:16
r2s8ppc1 x 14006604.03. 13:50
r4s8sarm​v7l1 x 140039804.03. 14:16
r8s6arm​v7l1 x 150049804.03. 14:56
r4s5arm​v7l1 x 1500004.03. 14:11
r4s3i5861 x 150099604.03. 14:09
ras4arm​v7l1 x 150039804.03. 15:10
r5s7sarm​v7l1 x 15284804.03. 14:31
r5s7arm​v7l1 x 15286404.03. 14:29
r3s7i6861 x 15331,06604.03. 14:00
r5s6ppc1 x 153313304.03. 14:29
r7s4arm​v7l1 x 153634804.03. 14:44
r5s5sarm​v7l1 x 160060004.03. 14:26
r2s3sarm​v7l0 x 1 x 16001,20013.02. 01:50
r5s5arm​v7l1 x 160059704.03. 14:24
ras4sarm​v7l1 x 160059707.02. 02:45
r2s3arm​v7l0 x 1 x 162462404.03. 13:45
rbs8arm​v7l2 x 16662,65004.03. 15:26
r7s3arm​v6l1 x 1700504.03. 14:41
r2s2arm​v7l1 x 172049904.03. 13:44
rfs4arm​v7l1 x 180080004.03. 16:09
r9s8sarm​v7l1 x 180079604.03. 15:06
r4s2sarm​v7l1 x 180053004.03. 14:06
r4s2arm​v7l1 x 180079604.03. 14:05
r9s8sarm​v7l1 x 180079608.02. 11:18
rfs4sarm​v7l1 x 180080004.03. 16:11
r2s4mips​641 x 180053124.12. 13:46
rbs7arm​v7l4 x 19961204.03. 15:23
rbs3arm​v7l4 x 19962404.03. 15:17
rbs7sarm​v7l4 x 19962404.03. 15:24
r9s4i6861 x 21,0003,98804.03. 03:08
res7sarm​v7l0 x 1 x 11,0001212.01. 05:12
r3s2riscv641 x 11,00028404.03. 13:53
r4s6sarm​v7l0 x 1 x 11,0006604.03. 14:13
ras6sarm​v7l1 x 11,0001,98704.03. 15:12
ras6arm​v7l1 x 11,0001,98704.03. 15:11
r7s8arm​v7l1 x 11,00099504.03. 14:48
ras5arm​v7l2 x 11,0002404.03. 15:10
res3saarch​640 x 1 x 11,0001,60004.03. 15:58
r7s6arm​v7l1 x 11,00039828.02. 14:10
ras5sarm​v7l2 x 11,0002404.03. 15:11
res7arm​v7l0 x 1 x 11,0001204.03. 16:05
r7s8sarm​v7l1 x 11,00079604.03. 14:49
r9s7arm​v7l2 x 11,000004.03. 15:05
ras2x86_​642 x 11,0674,26604.03. 15:08
rcs4x86_​642 x 11,1004,37604.03. 15:34
r6s4x86_​642 x 11,1004,37604.03. 14:36
rcs4sx86_​644 x 11,1008,75204.03. 15:36
res6x86_​644 x 11,1008,75204.03. 16:02
r4s4ppc4 x 11,20049804.03. 14:11
r1s5aarch​644 x 11,20079604.03. 13:35
r3s5sppc2 x 11,20040004.03. 13:58
r1s4arm​v7l2 x 11,2004804.03. 13:34
rbs4x86_​644 x 11,2009,60004.03. 15:19
ras3sarm​v7l1 x 11,30084004.03. 15:09
r7s5i6861 x 11,3002,59304.03. 14:46
r8s8x86_​642 x 11,3005,14404.03. 14:57
rbs6sx86_​642 x 11,3335,33204.03. 15:22
r9s4sx86_​642 x 11,3335,34704.03. 03:09
r2s6saarch​644 x 11,3506404.03. 13:47
rcs3i6862 x 11,4005,58604.03. 15:31
rbs3sarm​v7l4 x 11,40035604.03. 15:17
r3s4x86_​641 x 21,4005,60010.01. 01:28
r7s3sarm​v7l4 x 11,40035604.03. 14:43
ras1i6861 x 11,4002,79904.03. 15:07
r4s3si6861 x 11,4662,93204.03. 14:10
r2s7saarch​644 x 11,50043204.03. 13:49
rfs1aarch​644 x 11,50043204.03. 16:08
rfs2aarch​644 x 11,50043204.03. 16:09
r7s2sarm​v7l4 x 11,50072013.07. 02:16
rcs7sx86_​644 x 11,50011,98004.03. 15:41
r2s6i6861 x 11,5002,99904.03. 13:46
r6s5i6861 x 11,5002,99204.03. 14:37
r7s4sarm​v7l4 x 11,5001,08004.03. 14:45
r4s1sarm​v7l4 x 11,5001,00804.03. 14:04
r4s1arm​v7l4 x 11,50079204.03. 14:02
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r8s4sx86_​644 x 21,60028,80004.03. 14:54
r7s7x86_​644 x 11,60012,76704.03. 14:47
res1sx86_​644 x 11,60014,40004.03. 15:55
rds7x86_​644 x 11,60012,74804.03. 15:52
rds5x86_​644 x 11,60012,74804.03. 15:51
ras8x86_​644 x 11,60014,40004.03. 15:13
r9s3x86_​644 x 11,60012,74804.03. 15:01
r9s2x86_​644 x 11,60012,74804.03. 15:00
rds6x86_​644 x 11,60012,74804.03. 15:51
ras8sx86_​644 x 11,60012,74804.03. 15:14
rbs4sx86_​644 x 11,60012,74804.03. 15:19
res2x86_​644 x 11,60014,40004.03. 15:56
r6s6i6861 x 11,6003,19104.03. 14:38
res1x86_​644 x 11,60014,40004.03. 15:55
rds8x86_​644 x 11,60012,74804.03. 15:53
r4s5saarch​644 x 11,60020004.03. 14:12
r5s3sx86_​644 x 11,60012,74804.03. 14:20
r7s1x86_​644 x 11,60012,84004.03. 14:40
r8s4x86_​644 x 21,60028,80004.03. 14:53
rbs5saarch​644 x 11,6006404.03. 15:21
r1s8i6861 x 21,6006,39804.03. 13:38
r3s6x86_​641 x 11,6603,33304.03. 13:58
r1s6sx86_​642 x 21,66713,33204.03. 13:36
r6s2x86_​642 x 11,6679,57804.03. 14:35
r6s0x86_​642 x 10 x 21,700136,14004.03. 14:33
res0x86_​644 x 11,80015,99604.03. 15:54
r1s7arm​v6l1 x 11,80053004.03. 13:37
rcs7x86_​642 x 21,80014,39604.03. 15:40
rds0x86_​644 x 21,80031,99204.03. 15:47
r4s7i6864 x 11,83314,66404.03. 14:14
r4s7sx86_​642 x 11,8337,33204.03. 14:15
r1s8sx86_​644 x 11,90015,19604.03. 13:39
res8sx86_​644 x 11,90015,05204.03. 16:07
res8x86_​644 x 11,90015,05204.03. 16:06
res4sx86_​644 x 11,90015,05204.03. 15:59
res4x86_​644 x 11,90015,05204.03. 15:58
rds3x86_​644 x 11,91015,32404.03. 15:49
rds4x86_​644 x 11,91015,32404.03. 15:50
rds2x86_​644 x 11,91015,32404.03. 15:48
rds1x86_​644 x 11,91015,32404.03. 15:47
rbs6x86_​644 x 11,91515,32404.03. 15:21
rfs0x86_​6416 x 22,000128,00004.03. 16:08
res3x86_​644 x 12,00015,97204.03. 15:57
r9s1x86_​642 x 12,0003,99204.03. 14:59
r6s1x86_​642 x 12,0007,97804.03. 14:34
ras3aarch​648 x 12,0004,00004.03. 15:09
r5s3x86_​644 x 22,00031,87204.03. 14:19
r8s2x86_​642 x 22,10016,76004.03. 14:51
r8s2sx86_​642 x 22,10016,76004.03. 14:52
r1s6x86_​642 x 22,13017,06404.03. 13:36
r5s0x86_​642 x 22,20017,58204.03. 14:17
res5sx86_​642 x 22,20019,20004.03. 16:02
res5x86_​642 x 22,20019,20004.03. 16:01
r6s3x86_​644 x 22,20035,12004.03. 14:35
r6s8x86_​642 x 22,30018,35604.03. 14:39
r4s0x86_​642 x 22,30018,39604.03. 14:02
r0s1x86_​644 x 22,30055,99204.03. 13:11
r1s2sx86_​644 x 12,30028,00004.03. 13:32
r1s2x86_​644 x 12,30028,00004.03. 13:31
r7s0x86_​642 x 22,30018,40004.03. 14:40
ras0x86_​642 x 22,30018,41604.03. 15:07
r9s0x86_​642 x 22,30018,40004.03. 14:58
r8s0x86_​642 x 22,30018,40004.03. 14:50
r6s7i6862 x 12,3009,17611.01. 02:44
r7s7sx86_​642 x 22,30018,39604.03. 14:47
r3s1i6864 x 12,40019,12704.03. 13:52
rbs8sx86_​644 x 22,40038,70404.03. 15:26
rcs0x86_​648 x 22,40076,60004.03. 15:28
r2s7aarch​644 x 12,40043204.03. 13:48
rbs0i6862 x 22,50017,60004.03. 15:15
r0s0x86_​644 x 22,50039,99204.03. 13:10
r5s4x86_​642 x 22,53020,26404.03. 14:21
r5s4sx86_​642 x 22,53020,26404.03. 14:22
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r1s1x86_​642 x 22,60021,69604.03. 13:31
r8s3x86_​644 x 12,66721,28004.03. 14:52
r3s6sx86_​642 x 22,66721,33204.03. 13:59
r9s5x86_​642 x 12,70010,77413.07. 03:15
r5s2x86_​644 x 12,70021,69904.03. 14:18
r8s7x86_​642 x 12,70010,77604.03. 14:56
rcs5x86_​642 x 12,80011,19804.03. 15:37
rcs5sx86_​642 x 12,80011,19804.03. 15:38
rcs2x86_​642 x 12,80011,23204.03. 15:30
r1s3x86_​644 x 12,80022,42404.03. 13:33
r9s6x86_​642 x 23,00023,94404.03. 15:04
r9s3sx86_​644 x 13,00024,00004.03. 15:02
r2s0x86_​644 x 13,10024,79604.03. 13:39
r1s0x86_​644 x 13,10024,79604.03. 13:30
rbs1x86_​644 x 13,10028,80004.03. 15:15
r3s8i6866 x 13,20038,52604.03. 14:01
rbs2x86_​644 x 23,20051,20004.03. 15:16
rcs3sx86_​644 x 23,30052,69604.03. 15:32
r8s7sx86_​642 x 13,30013,19804.03. 14:57
r0s1sx86_​644 x 23,30052,67204.03. 13:11
rcs8sx86_​644 x 23,30052,79204.03. 15:46
r3s3x86_​646 x 23,33379,99204.03. 13:54
r5s1x86_​646 x 13,33340,09204.03. 14:17
r4s6x86_​644 x 23,40054,25604.03. 14:12
r8s5i6864 x 23,40054,40004.03. 14:55
rcs1x86_​646 x 23,46783,37604.03. 15:29
r0s8sx86_​646 x 23,47083,38804.03. 13:29
rcs6x86_​644 x 23,50063,99204.03. 15:39
rbs2sx86_​641 x 13,500007.09. 15:06
r9s5sx86_​642 x 13,50013,99804.03. 15:03
r0s2x86_​644 x 23,50055,86404.03. 13:11
r0s5x86_​648 x 23,500115,20004.03. 13:19
r3s0i6864 x 23,50055,99204.03. 13:51
r0s3sx86_​644 x 23,60067,20004.03. 13:16
r0s6x86_​648 x 23,600115,20004.03. 13:21
r0s4sx86_​648 x 23,600115,20004.03. 13:18
r0s5sx86_​648 x 23,600115,20004.03. 13:20
r0s4x86_​648 x 23,600115,20004.03. 13:17
r0s7x86_​648 x 23,600115,20004.03. 13:22
r0s8x86_​648 x 23,600115,20004.03. 13:26
r0s3x86_​648 x 23,600115,20004.03. 13:13
r0s6sx86_​6410 x 23,700147,98004.03. 13:21
r0s2sx86_​6410 x 13,70073,99004.03. 13:12
r0s7sx86_​642 x 23,70029,52804.03. 13:25
rcs8x86_​6416 x 23,700217,15204.03. 15:45
r5s2sx86_​644 x 24,00063,86312.04. 01:34
 

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