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2019-04-21 - 14:20

Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPSEffective
r8s6arm​v7l1 x 150049821.04. 14:07
r5s7sarm​v7l1 x 15284821.04. 13:50
r5s8ppc1 x 1400263721.04. 13:51
r2s5ppc1 x 13966626.01. 13:22
r5s5sarm​v7l1 x 160060021.04. 13:45
r3s2i6861 x 11530306121.04. 13:25
r1s7arm​v6l1 x 1153053021.04. 13:19
r5s7arm​v7l1 x 15284821.04. 13:49
r7s3arm​v6l1 x 1700521.04. 13:56
r5s5arm​v7l1 x 160059721.04. 13:44
ras4sarm​v7l1 x 180039801.04. 02:14
r3s5i5861 x 113326521.04. 13:26
r3s7i6861 x 1533106621.04. 13:28
r4s5arm​v7l1 x 1500021.04. 13:37
r4s8arm​v7l1 x 140039821.04. 13:40
r2s3arm​v7l1 x 160049521.04. 13:21
ras6sarm​v7l1 x 11000198721.04. 14:18
r9s8arm​v7l1 x 160059721.04. 14:14
r9s8sarm​v7l1 x 180079621.04. 14:15
r2s2arm​v7l1 x 172049921.04. 13:21
r4s2sarm​v7l1 x 180039821.04. 13:33
ras6arm​v7l1 x 11000198721.04. 14:18
r7s2i6861 x 1600119721.04. 13:55
r7s8arm​v7l1 x 1100079621.04. 14:02
r5s6ppc1 x 153313321.04. 13:48
r7s4arm​v7l1 x 153634821.04. 13:58
r4s2arm​v7l1 x 180019921.04. 13:31
r4s3i5861 x 150099621.04. 13:35
r1s3x86_​641 x 11800359021.04. 13:17
r6s6i6861 x 11600319121.04. 13:53
r2s6i6861 x 11500299921.04. 13:22
r6s5i6861 x 11500299228.01. 13:54
r2s8ppc1 x 14006621.04. 13:23
ras1i6861 x 11400279921.04. 14:16
ras4arm​v7l1 x 150039821.04. 14:17
r4s8sarm​v7l1 x 140039821.04. 13:41
rbs2i6861 x 11000199921.04. 02:22
r7s6arm​v7l1 x 1100039821.04. 13:59
r8s1i5861 x 130060121.04. 14:04
r7s5i6861 x 11300259321.04. 13:59
r2s1arm​v5tejl1 x 120019921.04. 13:21
r7s8sarm​v7l1 x 1100079621.04. 14:03
r2s4mips​641 x 180053110.01. 01:23
ras7ppc1 x 13966521.04. 14:19
r9s4i6861 x 21000399021.04. 14:12
r3s6x86_​641 x 21667666421.04. 13:27
r3s4x86_​641 x 21400559822.12. 01:28
rcs5x86_​642 x 128001123221.04. 02:38
rbs5i6862 x 12000799917.04. 02:27
rbs6sx86_​642 x 11333533221.04. 02:27
r1s4sarm​v7l2 x 14004821.04. 13:18
rcs3i6862 x 11400558621.04. 02:35
rcs5sx86_​642 x 128001123221.04. 02:40
r8s4si6862 x 11833733221.04. 14:06
r9s1x86_​642 x 12000399121.04. 14:09
r9s1sx86_​642 x 11140399921.04. 14:10
rcs2x86_​642 x 128001123221.04. 02:35
rbs8arm​v7l2 x 1666265021.04. 02:32
rcs4x86_​642 x 11100437621.04. 02:38
r3s5sppc2 x 1120040021.04. 13:27
r1s8i6861 x 21600640021.04. 13:20
r1s2x86_​642 x 12400960021.04. 13:17
r6s1x86_​642 x 12000798028.03. 13:51
r7s5sarm​v7l2 x 140040014.04. 14:02
r6s4x86_​642 x 11100437621.04. 13:52
ras8i6862 x 125001077421.04. 14:19
r1s4arm​v7l2 x 14004821.04. 13:17
r9s5x86_​642 x 127001077821.04. 14:12
ras5arm​v7l2 x 110002421.04. 14:18
r9s4sx86_​642 x 11333534721.04. 14:12
r8s7sx86_​642 x 133001324821.04. 14:07
r4s7sx86_​642 x 11833733021.04. 13:40
ras5sarm​v7l2 x 110002421.04. 14:18
r6s2x86_​642 x 11667957821.04. 13:52
r8s7x86_​642 x 127001078021.04. 14:07
r6s7i6862 x 12300917621.04. 13:53
r8s8i6862 x 11900758721.04. 14:08
r9s7arm​v7l2 x 11000021.04. 14:14
ras2x86_​642 x 11067426621.04. 14:16
r1s6x86_​642 x 221301706821.04. 13:18
r6s8x86_​642 x 223001835621.04. 13:54
r4s0x86_​642 x 223001840021.04. 13:30
r8s2x86_​642 x 221001676021.04. 14:04
r5s0x86_​642 x 222001758421.04. 13:41
r9s6x86_​642 x 230002396721.04. 14:13
rcs7x86_​642 x 218001440021.04. 02:43
r1s6sx86_​642 x 216671333221.04. 13:19
r5s4x86_​642 x 225302026421.04. 13:43
r7s0x86_​642 x 223001841621.04. 13:54
r8s2sx86_​642 x 221001676021.04. 14:05
ras0x86_​642 x 223001841721.04. 14:16
r0s4x86_​642 x 237002952821.04. 13:12
r9s0x86_​642 x 223001840021.04. 14:09
rbs0i6862 x 225001760021.04. 02:19
r3s6sx86_​642 x 226672133221.04. 13:28
r8s0x86_​642 x 223001839621.04. 14:03
r4s1sx86_​642 x 221001676821.04. 13:31
r4s1x86_​642 x 227002155321.04. 13:30
r1s1x86_​642 x 226002169621.04. 13:16
r5s4si6862 x 225302026421.04. 13:44
r7s7sx86_​642 x 223001844821.04. 14:02
r4s4ppc4 x 1120049821.04. 13:36
r3s1i6864 x 124001912821.04. 13:25
r2s6sx86_​644 x 119901599221.04. 13:22
rbs6x86_​644 x 119151532421.04. 02:27
rbs3sarm​v7l4 x 1140035621.04. 02:25
r7s7x86_​644 x 116001276721.04. 14:02
r1s5aarch​644 x 1120079621.04. 13:18
rbs7arm​v7l4 x 19962421.04. 02:28
r8s3x86_​644 x 126672127721.04. 14:05
r2s0x86_​644 x 131002479621.04. 13:20
r4s7i6864 x 118331466021.04. 13:38
r1s0x86_​644 x 131002480021.04. 13:16
rcs7sx86_​644 x 115001198021.04. 02:43
r1s8sx86_​644 x 119001518021.04. 13:20
ras8sx86_​644 x 116001274821.04. 14:19
r5s2x86_​644 x 127002169921.04. 13:42
rbs4sx86_​644 x 116001274821.04. 02:26
rbs3arm​v7l4 x 190017621.04. 02:25
r7s3sarm​v7l4 x 1140035621.04. 13:57
rbs4x86_​644 x 11200960021.04. 02:26
r4s5saarch​644 x 1160020021.04. 13:37
r5s3sx86_​644 x 116001274821.04. 13:43
r7s1x86_​644 x 116001283921.04. 13:55
rbs1x86_​644 x 131002480021.04. 02:19
r8s4i6864 x 118331466421.04. 14:06
r2s7x86_​644 x 137002960021.04. 13:23
rbs7sarm​v7l4 x 1996632421.04. 02:29
r9s3sx86_​644 x 130002400021.04. 14:11
r4s4sppc4 x 112002400006.08. 11:25
r3s8i6866 x 132003852621.04. 13:29
rcs6x86_​644 x 240006412821.04. 02:42
r4s6x86_​644 x 234005426421.04. 13:37
r8s5i6864 x 234005439221.04. 14:06
r0s1x86_​644 x 223005599221.04. 13:10
rcs3sx86_​644 x 233005269621.04. 02:36
r5s2sx86_​644 x 240006386312.04. 01:34
r0s6x86_​644 x 235005586421.04. 13:13
r0s5sx86_​644 x 234005452821.04. 13:13
r9s3x86_​644 x 225003670421.04. 14:11
r9s2x86_​644 x 227004320020.04. 14:11
r9s5sx86_​644 x 234005452821.04. 14:13
r5s3x86_​644 x 220003187221.04. 13:42
r0s2sx86_​644 x 235005586421.04. 13:11
r5s1i6864 x 233305318521.04. 13:41
r0s1sx86_​644 x 233005280021.04. 13:10
r0s0x86_​644 x 225004000021.04. 13:10
r0s2x86_​644 x 242006720005.04. 13:11
r0s5x86_​644 x 235005587221.04. 13:12
r6s3x86_​644 x 222003512021.04. 13:52
rcs8sx86_​644 x 233005280021.04. 02:45
r3s0i6864 x 235005600021.04. 13:24
ras3sarm​v7l8 x 1130074421.05. 14:08
ras3aarch​648 x 12000400021.04. 14:17
r3s3x86_​646 x 233337999221.04. 13:25
r0s7x86_​646 x 233337999221.04. 13:14
rcs1x86_​646 x 234678326421.04. 02:34
r0s3x86_​646 x 236008638821.04. 13:11
rcs8x86_​646 x 226706414021.04. 02:44
r0s8sx86_​646 x 234708337621.04. 13:15
rcs0x86_​642 x 4 x 224007698421.04. 02:32
r0s7sx86_​648 x 2360011520021.04. 13:14
r0s8x86_​6416 x 2370021715221.04. 13:15
r6s0x86_​642 x 10 x 2170013614021.04. 13:51
 

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