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2019-02-21 - 19:00

Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPSEffective
r8s6arm​v7l1 x 150049821.02. 14:34
r5s7sarm​v7l1 x 15284821.02. 14:18
r5s8ppc1 x 1400263721.02. 14:19
r2s5ppc1 x 13966626.01. 13:22
r5s5sarm​v7l1 x 160060021.02. 14:13
r3s2i6861 x 11530306121.02. 13:42
r1s7arm​v6l1 x 1153053021.02. 13:26
r5s7arm​v7l1 x 15286421.02. 14:17
r7s3arm​v6l1 x 1700521.02. 14:24
r5s5arm​v7l1 x 160059721.02. 14:12
ras4sarm​v7l1 x 180039821.02. 14:44
r3s5i5861 x 113326521.02. 13:51
r3s7i6861 x 1533106621.02. 13:55
r4s5arm​v7l1 x 1500021.02. 14:06
r4s8arm​v7l1 x 140039821.02. 14:09
r2s3arm​v7l1 x 160049521.02. 13:28
ras6sarm​v7l1 x 11000198721.02. 14:47
r9s8arm​v7l1 x 160059721.02. 14:41
r9s8sarm​v7l1 x 180079621.02. 14:42
r2s2arm​v7l1 x 172049921.02. 13:28
r4s2sarm​v7l1 x 180039821.02. 14:02
ras6arm​v7l1 x 11000198721.02. 14:46
r7s2i6861 x 1600119621.02. 14:23
r7s8arm​v7l1 x 1100099621.02. 14:30
r5s6ppc1 x 153313321.02. 14:16
r7s4arm​v7l1 x 153634821.02. 14:26
r4s2arm​v7l1 x 180039821.02. 14:00
r4s3i5861 x 150099621.02. 14:04
r1s3x86_​641 x 11800359021.02. 13:24
r6s6i6861 x 11600319121.02. 14:21
r2s6i6861 x 11500299921.02. 13:29
r6s5i6861 x 11500299228.01. 13:54
r2s8ppc1 x 14006621.02. 13:30
ras1i6861 x 11400279921.02. 14:43
ras4arm​v7l1 x 150039821.02. 14:44
r4s8sarm​v7l1 x 140039821.02. 14:09
rbs2i6861 x 11000199921.02. 14:51
r7s6arm​v7l1 x 1100039821.02. 14:27
r8s1i5861 x 130060121.02. 14:31
r7s5i6861 x 11300259321.02. 14:26
r2s1arm​v5tejl1 x 120019921.02. 13:28
r7s8sarm​v7l1 x 1100099621.02. 14:30
r2s4mips​641 x 180053110.01. 01:23
ras7ppc1 x 13966521.02. 14:47
r9s4i6861 x 21000399021.02. 14:39
r3s6x86_​641 x 21667666421.02. 01:27
r3s4x86_​641 x 21400559822.12. 01:28
rcs5x86_​642 x 128001123221.02. 15:07
r3s1i6862 x 12400959921.02. 13:40
rbs5i6862 x 12000799921.02. 14:55
rbs6sx86_​642 x 11333533221.02. 14:56
r1s4sarm​v7l2 x 14004821.02. 13:25
rcs3i6862 x 11400558621.02. 15:04
rcs5sx86_​642 x 128001123221.02. 15:10
r9s1x86_​642 x 12000399121.02. 14:36
r9s1sx86_​642 x 11140399821.02. 14:37
rcs2x86_​642 x 128001123221.02. 15:04
rbs8arm​v7l2 x 1666265021.02. 15:01
rcs4x86_​642 x 11100437621.02. 15:07
r1s8i6861 x 21600640021.02. 13:27
r3s5sppc2 x 1120040020.02. 01:26
r1s2x86_​642 x 12400960021.02. 13:24
r6s1x86_​642 x 12000798021.02. 14:20
r7s5sarm​v7l2 x 140040018.02. 13:59
r6s4x86_​642 x 11100437621.02. 14:21
ras8i6862 x 125001077421.02. 14:47
r1s4arm​v7l2 x 14004821.02. 13:25
r9s5x86_​642 x 127001077821.02. 14:40
ras5arm​v7l2 x 110002421.02. 14:46
r9s4sx86_​642 x 11333534721.02. 14:39
r8s7sx86_​642 x 133001324821.02. 14:35
r4s7sx86_​642 x 11833733021.02. 14:09
ras5sarm​v7l2 x 110002421.02. 14:46
r6s2x86_​642 x 11667957821.02. 14:20
r8s7x86_​642 x 127001077921.02. 14:34
r6s7i6862 x 12300917621.02. 14:22
r8s8i6862 x 11900758721.02. 14:35
r9s7arm​v7l2 x 11000021.02. 14:41
ras2x86_​642 x 11067426621.02. 14:43
r1s6x86_​642 x 221301706421.02. 13:26
r6s8x86_​642 x 223001835621.02. 14:22
r4s0x86_​642 x 223001840021.02. 13:59
r8s2x86_​642 x 221001676021.02. 14:32
r5s0x86_​642 x 222001758421.02. 14:10
r9s6x86_​642 x 230002396721.02. 14:40
rcs7x86_​642 x 218001440021.02. 15:12
r1s6sx86_​642 x 216671333221.02. 13:26
r5s4x86_​642 x 225302026421.02. 14:12
r7s0x86_​642 x 223001840021.02. 14:22
r8s2sx86_​642 x 221001676021.02. 14:32
ras0x86_​642 x 223001841521.02. 14:43
r0s4x86_​642 x 237002953221.02. 13:12
r9s0x86_​642 x 223001840021.02. 14:36
rbs0i6862 x 225001760021.02. 14:48
r3s6sx86_​642 x 226672133221.02. 13:53
r8s0x86_​642 x 223001839621.02. 14:31
r4s1sx86_​642 x 221001676821.02. 14:00
r4s1x86_​642 x 227002155321.02. 13:59
r5s4si6862 x 225302026421.02. 14:12
r7s7sx86_​642 x 223001844821.02. 14:29
r4s4ppc4 x 1120049821.02. 14:05
r2s6sx86_​644 x 119901599221.02. 13:29
rbs6x86_​644 x 119151532421.02. 14:56
rbs3sarm​v7l4 x 1140035621.02. 14:55
r8s4si6864 x 118331466421.02. 14:33
r7s7x86_​644 x 116001276721.02. 14:29
r1s5aarch​644 x 1120079621.02. 13:25
rbs7arm​v7l4 x 19962421.02. 14:57
r8s3x86_​644 x 126672127621.02. 14:33
r2s0x86_​644 x 131002479621.02. 13:27
r4s7i6864 x 118331466021.02. 14:07
r1s0x86_​644 x 131002480021.02. 13:23
rcs7sx86_​644 x 115001198021.02. 15:13
r1s8sx86_​644 x 119001518003.02. 01:19
ras8sx86_​644 x 116001274821.02. 14:48
r5s2x86_​644 x 127002169921.02. 14:10
rbs3arm​v7l4 x 190017621.02. 14:54
r7s3sarm​v7l4 x 1140035621.02. 14:25
rbs4x86_​644 x 11200960021.02. 14:55
r4s5saarch​644 x 1160020021.02. 14:06
r5s3sx86_​644 x 116001274821.02. 14:11
r7s1x86_​644 x 116001283921.02. 14:23
rbs1x86_​644 x 131002480021.02. 14:48
r8s4i6864 x 118331466421.02. 14:33
r2s7x86_​644 x 137002960021.02. 13:30
rbs7sarm​v7l4 x 1996632421.02. 14:58
r9s3sx86_​644 x 130002400021.02. 14:38
r4s4sppc4 x 112002400006.08. 11:25
r3s8i6866 x 132003852621.02. 13:57
rcs6x86_​644 x 240006412821.02. 15:12
r4s6x86_​644 x 234005426421.02. 14:06
r8s5i6864 x 234005439221.02. 14:34
r0s1x86_​644 x 223005599221.02. 13:10
rcs3sx86_​644 x 233005269621.02. 15:05
r5s2sx86_​644 x 240006386312.04. 01:34
r0s6x86_​644 x 235005586421.02. 13:14
r0s5sx86_​644 x 234005452821.02. 13:13
r9s3x86_​644 x 225003670521.02. 14:38
r9s2x86_​644 x 227004319221.02. 14:37
r9s5sx86_​644 x 234005452821.02. 14:40
r5s3x86_​644 x 220003187221.02. 14:11
r0s2sx86_​644 x 235005586421.02. 13:11
r5s1i6864 x 233305318519.01. 13:44
r0s1sx86_​644 x 233005280021.02. 13:10
r0s0x86_​644 x 225004000021.02. 13:10
r0s2x86_​644 x 242006720021.02. 13:11
r0s5x86_​644 x 235005586421.02. 13:13
r6s3x86_​644 x 222003512021.02. 14:20
rcs8sx86_​644 x 233005280021.02. 15:14
r3s0i6864 x 235005604121.02. 13:32
ras3sarm​v7l8 x 1130074421.05. 14:08
ras3aarch​648 x 12000400021.02. 14:43
r3s3x86_​646 x 233337999221.02. 13:47
r0s7x86_​646 x 233337999221.02. 13:14
rcs1x86_​646 x 234678326421.02. 15:03
r0s3x86_​646 x 236008638821.02. 13:12
rcs8x86_​646 x 226706414021.02. 15:14
r0s8sx86_​646 x 234708337621.02. 13:23
rcs0x86_​642 x 4 x 224007697621.02. 15:02
r0s8x86_​6416 x 2370021715221.02. 13:16
r1s1x86_​642 x 16 x 1210013438410.02. 13:16
r6s0x86_​642 x 10 x 2170013614021.02. 14:19
 

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