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2017-09-24 - 03:26

Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPSEffective
r8s6arm​v7l1 x 150049824.09. 01:57
r5s8ppc1 x 1400263724.09. 01:41
r2s5ppc1 x 13966624.09. 01:21
r5s5sarm​v7l1 x 160060024.09. 01:40
r3s2i6861 x 11530306124.09. 01:25
r1s7arm​v6l1 x 1153053024.09. 01:18
r5s7mips​1 x 149249224.09. 01:41
r7s3i6861 x 1800160224.09. 01:48
r5s5arm​v7l1 x 160059724.09. 01:39
r3s7i6861 x 1533106624.09. 01:28
r4s5arm​v7l1 x 1500024.09. 01:35
r4s8arm​v7l1 x 1600024.09. 01:36
r6s4x86_​641 x 12200438824.09. 01:43
r2s3arm​v7l1 x 160049524.09. 01:20
ras6sarm​v7l1 x 11000198724.09. 02:06
r2s2arm​v7l1 x 172049924.09. 01:20
r4s2sarm​v7l1 x 180039824.09. 01:33
ras6arm​v7l1 x 11000198724.09. 02:06
r7s2i6861 x 1600119724.09. 01:46
r7s8arm​v7l1 x 1100079624.09. 01:53
r5s6ppc1 x 153313324.09. 01:41
r7s4arm​v7l1 x 153635124.09. 01:49
r4s2arm​v7l1 x 180039824.09. 01:31
r4s3i5861 x 150099624.09. 01:34
r1s3x86_​641 x 11800359024.09. 01:16
r6s6i6861 x 11600319224.09. 01:45
r2s6i6861 x 11500299924.09. 01:21
r6s5i6861 x 11500299224.09. 01:44
r2s8ppc1 x 14006624.09. 01:22
ras1i6861 x 11400279924.09. 02:04
ras4arm​v7l1 x 150039824.09. 02:05
r4s8sarm​v7l1 x 1600024.09. 01:36
rbs2i6861 x 11000199924.09. 02:08
r7s6arm​v7l1 x 1100039824.09. 01:50
r8s1i5861 x 130060124.09. 01:55
r7s5i6861 x 11300259324.09. 01:49
r2s1arm​v5tejl1 x 120019924.09. 01:20
r7s8sarm​v7l1 x 1100099324.09. 01:54
r2s4mips​641 x 180053124.09. 01:20
ras7ppc1 x 13966524.09. 02:07
r9s4i6861 x 21000399024.09. 02:01
r3s6x86_​641 x 21667666624.09. 01:27
r3s4x86_​641 x 21400560024.09. 01:26
rbs5i6862 x 12000799824.09. 02:10
r8s2x86_​642 x 129001157224.09. 01:56
rcs3i6862 x 11400558624.09. 02:12
r9s1x86_​642 x 12000399224.09. 01:59
r1s8i6861 x 21600640024.09. 01:18
r1s5ppc2 x 1120040024.09. 01:17
r9s1sx86_​642 x 11140399824.09. 01:59
rcs2x86_​642 x 128001123324.09. 02:12
rbs8arm​v7l2 x 1666265024.09. 02:11
r1s2x86_​642 x 12400959824.09. 01:16
r6s1x86_​642 x 12000798031.08. 13:40
ras8i6862 x 125001077424.09. 02:07
r9s5x86_​642 x 127001077624.09. 02:02
ras5arm​v7l2 x 110002424.09. 02:06
r9s4sx86_​642 x 11333532824.09. 02:01
ras5sarm​v7l2 x 110002424.09. 02:06
r6s2x86_​642 x 11667957624.09. 01:42
r8s7x86_​642 x 127001077824.09. 01:58
r6s7i6862 x 12300917624.09. 01:45
r8s8i6862 x 11900758724.09. 01:58
r9s7arm​v7l2 x 11000024.09. 02:03
ras2x86_​642 x 11067426624.09. 02:05
r1s6x86_​642 x 221301702424.09. 01:18
r6s8x86_​642 x 223001838024.09. 01:45
r4s0x86_​642 x 223001841724.09. 01:29
r0s1x86_​642 x 223001840024.09. 01:10
r5s0x86_​642 x 222001758124.09. 01:37
r9s6x86_​642 x 230002394424.09. 02:03
rcs7x86_​642 x 218001439624.09. 02:13
r5s4x86_​642 x 225302026424.09. 01:38
r7s0x86_​642 x 223001839624.09. 01:46
ras0x86_​642 x 223001840024.09. 02:04
r0s4x86_​642 x 237002954524.09. 01:11
r1s4x86_​642 x 216671333224.09. 01:17
r9s0x86_​642 x 223001841624.09. 01:59
rbs0i6862 x 225001995224.09. 02:08
r0s0x86_​642 x 225001997024.09. 01:10
r3s6sx86_​642 x 226672133224.09. 01:27
r8s0x86_​642 x 223001841624.09. 01:54
r4s1sx86_​642 x 221001673824.09. 01:30
r4s1x86_​642 x 227002155324.09. 01:29
r3s0i6862 x 225001995224.09. 01:22
r5s4si6862 x 225302026424.09. 01:38
r7s7sx86_​642 x 223001844924.09. 01:53
r3s1i6864 x 124001912824.09. 01:25
rcs6x86_​644 x 135002794824.09. 02:13
rbs6x86_​644 x 119901603524.09. 02:10
rbs3sarm​v7l4 x 1120015224.09. 02:09
r8s4si6864 x 118331466424.09. 01:57
r7s7x86_​644 x 116001276724.09. 01:53
rbs7arm​v7l4 x 19964824.09. 02:11
r2s0x86_​644 x 131002481424.09. 01:19
r4s7x86_​644 x 116001279624.09. 01:35
r9s8arm​v7l4 x 1996632424.09. 02:03
r1s0x86_​644 x 131002481524.09. 01:15
r5s2x86_​644 x 127002169824.09. 01:37
rbs3arm​v7l4 x 190015224.09. 02:08
r7s3sarm​v7l4 x 1120015224.09. 01:48
r0s2x86_​644 x 126672127724.09. 01:10
rbs4x86_​644 x 11200960022.09. 14:09
r7s1x86_​644 x 116001283924.09. 01:46
rbs1x86_​644 x 131002480024.09. 02:08
r8s4i6864 x 118331466424.09. 01:56
r2s7x86_​644 x 137002959424.09. 01:21
r3s8i6866 x 132003852424.09. 01:28
rcs5x86_​644 x 234005455601.08. 02:23
r4s6x86_​644 x 234005425624.09. 01:35
r8s5i6864 x 234005440024.09. 01:57
r5s2sx86_​644 x 240006386312.04. 01:34
r8s3x86_​644 x 235005587224.09. 01:56
r0s6x86_​644 x 235005590324.09. 01:12
r0s5sx86_​644 x 234005455724.09. 01:12
r9s3x86_​644 x 225003669824.09. 02:00
r9s2x86_​644 x 227004320024.09. 02:00
r9s5sx86_​644 x 234005452824.09. 02:02
r5s3x86_​644 x 220003187924.09. 01:38
r0s8x86_​644 x 240006416224.09. 01:13
r8s7sx86_​644 x 234005452804.07. 01:59
r5s1i6864 x 233305318524.09. 01:37
r0s1sx86_​644 x 233005280024.09. 01:10
r0s5x86_​644 x 235005589924.09. 01:12
r6s3x86_​644 x 222003512024.09. 01:42
rcs8sx86_​644 x 25284224.09. 02:15
ras3sarm​v7l8 x 1130074421.05. 14:08
ras3aarch​648 x 12000400024.09. 02:05
r6s0x86_​648 x 136005779224.09. 01:42
r3s3x86_​646 x 233337999224.09. 01:26
r0s7x86_​646 x 230008017224.09. 01:13
rcs1x86_​646 x 234678337724.09. 02:11
r0s3x86_​646 x 236008645724.09. 01:11
rcs8x86_​646 x 226706414024.09. 02:14
r0s8sx86_​646 x 234708337824.09. 01:14
r3s0sx86_​642 x 8 x 224007680024.09. 01:23
r1s1x86_​642 x 16 x 1210013438424.09. 01:16
 

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