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2019-04-24 - 04:03

Number of cores/hyperthreads and bogoMIPS (by cores) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPSEffective
r8s6arm​v7l1 x 150049824.04. 02:09
r5s7sarm​v7l1 x 15286424.04. 01:51
r5s8ppc1 x 1400263724.04. 01:52
r2s5ppc1 x 13966626.01. 13:22
r5s5sarm​v7l1 x 160060024.04. 01:46
r3s2i6861 x 11530306124.04. 01:27
r1s7arm​v6l1 x 1153053024.04. 01:21
r5s7arm​v7l1 x 15286424.04. 01:50
r7s3arm​v6l1 x 1700524.04. 01:57
r5s5arm​v7l1 x 160059724.04. 01:46
ras4sarm​v7l1 x 180039801.04. 02:14
r3s5i5861 x 113326524.04. 01:28
r3s7i6861 x 1533106624.04. 01:30
r4s5arm​v7l1 x 1500024.04. 01:38
r4s8arm​v7l1 x 140039824.04. 01:42
r2s3arm​v7l1 x 160049524.04. 01:23
ras6sarm​v7l1 x 11000198724.04. 02:24
r9s8arm​v7l1 x 160059724.04. 02:18
r9s8sarm​v7l1 x 180079624.04. 02:19
r2s2arm​v7l1 x 172049924.04. 01:23
r4s2sarm​v7l1 x 180053024.04. 01:35
ras6arm​v7l1 x 11000198724.04. 02:23
r7s2i6861 x 1600119724.04. 01:56
r7s8arm​v7l1 x 1100079624.04. 02:04
r5s6ppc1 x 153313324.04. 01:49
r7s4arm​v7l1 x 153634824.04. 01:59
r4s2arm​v7l1 x 180053024.04. 01:33
r4s3i5861 x 150099624.04. 01:37
r1s3x86_​641 x 11800359024.04. 01:19
r6s6i6861 x 11600319124.04. 01:54
r2s6i6861 x 11500299924.04. 01:23
r6s5i6861 x 11500299228.01. 13:54
r2s8ppc1 x 14006624.04. 01:25
ras1i6861 x 11400279924.04. 02:21
ras4arm​v7l1 x 150039824.04. 02:22
r4s8sarm​v7l1 x 140039824.04. 01:42
rbs2i6861 x 11000199924.04. 02:29
r7s6arm​v7l1 x 1100039822.04. 01:59
r8s1i5861 x 130060124.04. 02:06
r7s5i6861 x 11300259324.04. 01:59
r2s1arm​v5tejl1 x 120019924.04. 01:22
r7s8sarm​v7l1 x 1100099624.04. 02:05
r2s4mips​641 x 180053110.01. 01:23
ras7ppc1 x 13966524.04. 02:24
r9s4i6861 x 21000399024.04. 02:15
r3s6x86_​641 x 21667666424.04. 01:29
r3s4x86_​641 x 21400559822.12. 01:28
rcs5x86_​642 x 128001123224.04. 02:45
rbs5i6862 x 12000799824.04. 02:34
rbs6sx86_​642 x 11333533224.04. 02:34
r1s4sarm​v7l2 x 14004824.04. 01:20
rcs3i6862 x 11400558624.04. 02:42
rcs5sx86_​642 x 128001123224.04. 02:47
r8s4si6862 x 11833733224.04. 02:08
r9s1x86_​642 x 12000399124.04. 02:12
r9s1sx86_​642 x 11140399924.04. 02:13
rcs2x86_​642 x 128001123224.04. 02:42
rbs8arm​v7l2 x 1666265024.04. 02:39
rcs4x86_​642 x 11100437624.04. 02:45
r3s5sppc2 x 1120040024.04. 01:29
r1s8i6861 x 21600640024.04. 01:21
r1s2x86_​642 x 12400960024.04. 01:18
r6s1x86_​642 x 12000798028.03. 13:51
r7s5sarm​v7l2 x 140040014.04. 14:02
r6s4x86_​642 x 11100437624.04. 01:54
ras8i6862 x 125001077424.04. 02:24
r1s4arm​v7l2 x 14004824.04. 01:19
r9s5x86_​642 x 127001077824.04. 02:16
ras5arm​v7l2 x 110002424.04. 02:23
r9s4sx86_​642 x 11333534724.04. 02:16
r8s7sx86_​642 x 133001324824.04. 02:10
r4s7sx86_​642 x 11833733024.04. 01:41
ras5sarm​v7l2 x 110002424.04. 02:23
r6s2x86_​642 x 11667957824.04. 01:53
r8s7x86_​642 x 127001078024.04. 02:09
r6s7i6862 x 12300917624.04. 01:54
r8s8i6862 x 11900758724.04. 02:11
r9s7arm​v7l2 x 11000024.04. 02:18
ras2x86_​642 x 11067426624.04. 02:21
r1s6x86_​642 x 221301706824.04. 01:20
r6s8x86_​642 x 223001835624.04. 01:55
r4s0x86_​642 x 223001840024.04. 01:32
r8s2x86_​642 x 221001676024.04. 02:06
r5s0x86_​642 x 222001758424.04. 01:42
r9s6x86_​642 x 230002396724.04. 02:18
rcs7x86_​642 x 218001440024.04. 02:50
r1s6sx86_​642 x 216671333224.04. 01:21
r5s4x86_​642 x 225302026424.04. 01:45
r7s0x86_​642 x 223001841624.04. 01:55
r8s2sx86_​642 x 221001676024.04. 02:07
ras0x86_​642 x 223001841724.04. 02:20
r0s4x86_​642 x 237002952824.04. 01:12
r9s0x86_​642 x 223001840024.04. 02:11
rbs0i6862 x 225001760024.04. 02:26
r3s6sx86_​642 x 226672133224.04. 01:30
r8s0x86_​642 x 223001839624.04. 02:05
r4s1sx86_​642 x 221001676824.04. 01:33
r4s1x86_​642 x 227002155424.04. 01:32
r1s1x86_​642 x 226002169624.04. 01:18
r5s4si6862 x 225302026424.04. 01:45
r7s7sx86_​642 x 223001844824.04. 02:04
r4s4ppc4 x 1120049824.04. 01:37
r3s1i6864 x 124001912824.04. 01:27
r2s6sx86_​644 x 119901599224.04. 01:24
rbs6x86_​644 x 119151532424.04. 02:34
rbs3sarm​v7l4 x 1140035624.04. 02:33
r7s7x86_​644 x 116001276724.04. 02:04
r1s5aarch​644 x 1120079624.04. 01:20
rbs7arm​v7l4 x 19964824.04. 02:35
r8s3x86_​644 x 126672127724.04. 02:07
r2s0x86_​644 x 131002479624.04. 01:22
r4s7i6864 x 118331466024.04. 01:39
r1s0x86_​644 x 131002480024.04. 01:17
rcs7sx86_​644 x 115001198024.04. 02:50
r1s8sx86_​644 x 119001518024.04. 01:22
ras8sx86_​644 x 116001274824.04. 02:25
r5s2x86_​644 x 127002169924.04. 01:43
rbs4sx86_​644 x 116001274824.04. 02:33
rbs3arm​v7l4 x 190017624.04. 02:32
r7s3sarm​v7l4 x 1140035624.04. 01:58
rbs4x86_​644 x 11200960024.04. 02:33
r4s5saarch​644 x 1160020024.04. 01:39
r5s3sx86_​644 x 116001274824.04. 01:44
r7s1x86_​644 x 116001283924.04. 01:56
rbs1x86_​644 x 131002480024.04. 02:26
r8s4i6864 x 118331466424.04. 02:08
r2s7x86_​644 x 137002960024.04. 01:24
rbs7sarm​v7l4 x 1996632424.04. 02:36
r9s3sx86_​644 x 130002400024.04. 02:15
r4s4sppc4 x 112002400006.08. 11:25
r3s8i6866 x 132003852624.04. 01:31
rcs6x86_​644 x 240006412824.04. 02:49
r4s6x86_​644 x 234005426424.04. 01:39
r8s5i6864 x 234005439224.04. 02:09
r0s1x86_​644 x 223005599224.04. 01:10
rcs3sx86_​644 x 233005269624.04. 02:43
r5s2sx86_​644 x 240006386312.04. 01:34
r0s6x86_​644 x 235005586424.04. 01:14
r0s5sx86_​644 x 234005452824.04. 01:14
r9s3x86_​644 x 225003670424.04. 02:14
r9s2x86_​644 x 227004320024.04. 02:14
r9s5sx86_​644 x 234005452824.04. 02:17
r5s3x86_​644 x 220003187224.04. 01:44
r0s2sx86_​644 x 235005586424.04. 01:11
r5s1i6864 x 233305318724.04. 01:43
r0s1sx86_​644 x 233005280024.04. 01:11
r0s0x86_​644 x 225004000024.04. 01:10
r0s2x86_​644 x 242006720005.04. 13:11
r0s5x86_​644 x 235005587224.04. 01:13
r6s3x86_​644 x 222003512024.04. 01:53
rcs8sx86_​644 x 233005280024.04. 02:52
r3s0i6864 x 235005600024.04. 01:26
ras3sarm​v7l8 x 1130074421.05. 14:08
ras3aarch​648 x 12000400024.04. 02:22
r3s3x86_​646 x 233337999224.04. 01:27
r0s7x86_​646 x 233337999224.04. 01:15
rcs1x86_​646 x 234678326424.04. 02:41
r0s3x86_​646 x 236008638824.04. 01:12
rcs8x86_​646 x 226706414024.04. 02:51
r0s8sx86_​646 x 234708337624.04. 01:17
rcs0x86_​642 x 4 x 224007698424.04. 02:39
r0s7sx86_​648 x 2360011520024.04. 01:16
r0s8x86_​6416 x 2370021715224.04. 01:16
r6s0x86_​642 x 10 x 2170013614024.04. 01:52
 

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