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2024-04-18 - 23:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Thu Apr 18, 2024 12:48:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
231191205197,6phc2sys0-21swapper/207:07:2012
34119918716,138cyclictest0-21swapper/2612:07:4819
3355991563,151cyclictest0-21swapper/1510:00:267
3355991563,151cyclictest0-21swapper/1510:00:267
3355991543,119cyclictest0-21swapper/1511:40:227
3355991543,112cyclictest0-21swapper/1511:25:247
3355991543,110cyclictest0-21swapper/1509:50:167
3355991543,110cyclictest0-21swapper/1509:50:167
3411991520,89cyclictest0-21swapper/2607:19:4619
34119915117,110cyclictest0-21swapper/2609:34:4719
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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