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2022-06-26 - 14:25

x86 Intel T1300 @1667 MHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #6, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the alll highest latencies:
System rack6slot2.osadl.org (updated Sun Jun 26, 2022 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
267422550,0sleep10-21swapper/109:13:281
2149324117,16sleep10-21swapper/107:07:471
214102408,8sleep00-21swapper/007:06:580
21597993931,7cyclictest248850irq/16-enp2s0f011:08:300
21597993729,7cyclictest248850irq/16-enp2s0f011:18:300
21598993432,1cyclictest168050irq/16-i91512:28:351
21598993432,1cyclictest168050irq/16-i91511:33:231
21598993432,1cyclictest168050irq/16-i91510:18:271
21598993432,1cyclictest168050irq/16-i91509:36:011
21598993432,1cyclictest168050irq/16-i91508:55:391
21598993432,1cyclictest168050irq/16-i91507:53:301
21598993432,1cyclictest168050irq/16-i91507:35:361
21598993432,1cyclictest168050irq/16-i91507:13:321
21597993433,0cyclictest248850irq/16-enp2s0f007:53:320
21597993432,1cyclictest248850irq/16-enp2s0f011:01:140
21597993432,1cyclictest248850irq/16-enp2s0f010:43:330
21597993432,1cyclictest248850irq/16-enp2s0f010:33:310
21597993432,1cyclictest248850irq/16-enp2s0f009:38:350
21597993432,1cyclictest248850irq/16-enp2s0f008:43:330
21597993432,1cyclictest248850irq/16-enp2s0f007:29:330
21597993432,1cyclictest248850irq/16-enp2s0f007:08:320
21598993332,0cyclictest248850irq/16-enp2s0f012:05:481
21598993332,0cyclictest248850irq/16-enp2s0f011:56:231
21598993332,0cyclictest248850irq/16-enp2s0f011:09:191
21598993332,0cyclictest248850irq/16-enp2s0f010:57:391
21598993332,0cyclictest248850irq/16-enp2s0f010:43:431
21598993332,0cyclictest248850irq/16-enp2s0f010:14:211
21598993332,0cyclictest248850irq/16-enp2s0f009:28:361
21598993332,0cyclictest248850irq/16-enp2s0f008:48:341
21598993332,0cyclictest168050irq/16-i91512:33:451
21598993332,0cyclictest168050irq/16-i91510:38:221
21598993332,0cyclictest168050irq/16-i91510:26:071
21598993332,0cyclictest168050irq/16-i91510:09:281
21598993332,0cyclictest168050irq/16-i91509:00:521
21598993332,0cyclictest168050irq/16-i91508:31:051
21598993332,0cyclictest168050irq/16-i91508:15:431
21598993332,0cyclictest168050irq/16-i91507:48:291
21598993332,0cyclictest168050irq/16-i91507:45:421
21598993332,0cyclictest168050irq/16-i91507:40:371
21598993332,0cyclictest168050irq/16-i91507:30:081
21598993332,0cyclictest168050irq/16-i91507:08:271
21598993331,1cyclictest248850irq/16-enp2s0f010:03:291
21598993331,1cyclictest168050irq/16-i91512:18:541
21598993331,1cyclictest168050irq/16-i91511:58:351
21598993331,1cyclictest168050irq/16-i91511:44:541
21598993331,1cyclictest168050irq/16-i91511:38:181
21598993331,1cyclictest168050irq/16-i91509:48:441
21598993331,1cyclictest168050irq/16-i91508:43:351
21598993331,1cyclictest168050irq/16-i91508:23:281
21598993331,1cyclictest168050irq/16-i91507:26:371
21597993333,0cyclictest248850irq/16-enp2s0f012:31:060
21597993332,0cyclictest248850irq/16-enp2s0f012:33:270
21597993332,0cyclictest248850irq/16-enp2s0f012:15:080
21597993332,0cyclictest248850irq/16-enp2s0f012:08:320
21597993332,0cyclictest248850irq/16-enp2s0f012:03:280
21597993332,0cyclictest248850irq/16-enp2s0f011:53:320
21597993332,0cyclictest248850irq/16-enp2s0f011:43:280
21597993332,0cyclictest248850irq/16-enp2s0f011:39:430
21597993332,0cyclictest248850irq/16-enp2s0f011:13:280
21597993332,0cyclictest248850irq/16-enp2s0f010:38:340
21597993332,0cyclictest248850irq/16-enp2s0f010:28:490
21597993332,0cyclictest248850irq/16-enp2s0f010:18:300
21597993332,0cyclictest248850irq/16-enp2s0f010:03:290
21597993332,0cyclictest248850irq/16-enp2s0f009:43:310
21597993332,0cyclictest248850irq/16-enp2s0f009:33:390
21597993332,0cyclictest248850irq/16-enp2s0f009:23:190
21597993332,0cyclictest248850irq/16-enp2s0f009:13:290
21597993332,0cyclictest248850irq/16-enp2s0f009:08:270
21597993332,0cyclictest248850irq/16-enp2s0f009:03:290
21597993332,0cyclictest248850irq/16-enp2s0f009:00:520
21597993332,0cyclictest248850irq/16-enp2s0f008:38:320
21597993332,0cyclictest248850irq/16-enp2s0f008:33:210
21597993332,0cyclictest248850irq/16-enp2s0f008:28:270
21597993332,0cyclictest248850irq/16-enp2s0f008:23:310
21597993332,0cyclictest248850irq/16-enp2s0f008:18:310
21597993332,0cyclictest248850irq/16-enp2s0f007:43:320
21597993332,0cyclictest248850irq/16-enp2s0f007:33:340
21597993332,0cyclictest248850irq/16-enp2s0f007:23:310
21597993332,0cyclictest248850irq/16-enp2s0f007:20:450
21597993332,0cyclictest248850irq/16-enp2s0f007:15:000
21597993332,0cyclictest168050irq/16-i91510:23:260
21597993332,0cyclictest168050irq/16-i91508:48:350
21597993331,1cyclictest248850irq/16-enp2s0f012:18:310
21597993331,1cyclictest248850irq/16-enp2s0f011:03:320
21597993331,1cyclictest248850irq/16-enp2s0f009:53:340
21597993331,1cyclictest248850irq/16-enp2s0f009:48:470
21597993331,1cyclictest248850irq/16-enp2s0f009:18:310
21597993331,1cyclictest248850irq/16-enp2s0f008:03:340
21597993331,1cyclictest248850irq/16-enp2s0f007:48:360
21597993331,1cyclictest248850irq/16-enp2s0f007:42:390
21597993330,2cyclictest248850irq/16-enp2s0f011:48:200
21597993330,0cyclictest168050irq/16-i91509:30:570
21598993232,0cyclictest248850irq/16-enp2s0f009:43:351
21598993232,0cyclictest168050irq/16-i91512:09:021
21598993232,0cyclictest168050irq/16-i91511:49:441
21598993232,0cyclictest168050irq/16-i91510:35:051
21598993232,0cyclictest168050irq/16-i91509:39:391
21598993232,0cyclictest168050irq/16-i91507:18:261
21598993231,0cyclictest248850irq/16-enp2s0f010:58:151
21598993231,0cyclictest248850irq/16-enp2s0f010:02:141
21598993231,0cyclictest248850irq/16-enp2s0f008:05:331
21598993231,0cyclictest168050irq/16-i91512:23:271
21598993231,0cyclictest168050irq/16-i91512:13:401
21598993231,0cyclictest168050irq/16-i91511:28:331
21598993231,0cyclictest168050irq/16-i91511:18:311
21598993231,0cyclictest168050irq/16-i91511:13:331
21598993231,0cyclictest168050irq/16-i91511:03:331
21598993231,0cyclictest168050irq/16-i91510:48:261
21598993231,0cyclictest168050irq/16-i91510:28:311
21598993231,0cyclictest168050irq/16-i91509:08:361
21598993231,0cyclictest168050irq/16-i91509:03:291
21598993231,0cyclictest168050irq/16-i91508:38:291
21598993231,0cyclictest168050irq/16-i91508:18:271
21598993231,0cyclictest168050irq/16-i91508:08:261
21598993230,1cyclictest168050irq/16-i91509:53:321
21598993230,1cyclictest168050irq/16-i91509:23:331
21598993230,1cyclictest168050irq/16-i91509:18:321
21598993230,1cyclictest168050irq/16-i91508:33:321
21598993230,1cyclictest168050irq/16-i91507:58:321
21597993232,0cyclictest248850irq/16-enp2s0f011:33:290
21597993232,0cyclictest248850irq/16-enp2s0f008:01:320
21597993231,1cyclictest248850irq/16-enp2s0f011:58:340
21597993231,0cyclictest248850irq/16-enp2s0f012:23:280
21597993231,0cyclictest248850irq/16-enp2s0f011:28:300
21597993231,0cyclictest248850irq/16-enp2s0f011:23:280
21597993231,0cyclictest248850irq/16-enp2s0f010:53:250
21597993231,0cyclictest248850irq/16-enp2s0f010:48:270
21597993231,0cyclictest248850irq/16-enp2s0f010:13:260
21597993231,0cyclictest248850irq/16-enp2s0f010:08:260
21597993231,0cyclictest248850irq/16-enp2s0f009:58:270
21597993231,0cyclictest248850irq/16-enp2s0f008:53:310
21597993231,0cyclictest248850irq/16-enp2s0f008:13:300
21597993231,0cyclictest248850irq/16-enp2s0f008:08:410
21598993130,0cyclictest248850irq/16-enp2s0f011:23:321
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*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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