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2024-04-25 - 23:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack9slot6.osadl.org (updated Thu Apr 25, 2024 12:54:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3801:23:405033
36,01:23:025032
38,01:23:025031
24,01:23:025030
001:23:025026
0,01:23:025025
0,01:23:025024
0,01:23:025023
0,01:23:025022
0,01:23:025021
0,01:23:025020
0,01:23:025019
0,01:23:025018
0,01:23:025017
0,01:23:025016
0,01:23:025015
0,01:23:025014
0,01:23:025013
0,01:23:025012
0,01:23:025011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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