From c3513c96aa331b1e40edfad12d2151e000e002f4 Mon Sep 17 00:00:00 2001 From: Fugang Duan <B38611@freescale.com> Date: Wed, 4 Sep 2013 10:58:17 +0800 Subject: [PATCH 28/59] ARM: imx6sl: config iomux-gpr1 to select clock for fec Config iomux-gpr1 to select clock source for fec system clock. Clear gpr1[14], gpr1[18-17] bit to select the fec clock source from internal anatop PLL. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> --- arch/arm/mach-imx/mach-imx6sl.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index 0d75dc5..892b629 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -11,16 +11,37 @@ #include <linux/irqchip.h> #include <linux/of.h> #include <linux/of_platform.h> +#include <linux/mfd/syscon.h> +#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> +#include <linux/regmap.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include "common.h" +static void __init imx6sl_fec_init(void) +{ + struct regmap *gpr; + + /* set FEC clock from internal PLL clock source */ + gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr"); + if (!IS_ERR(gpr)) { + regmap_update_bits(gpr, IOMUXC_GPR1, + IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0); + regmap_update_bits(gpr, IOMUXC_GPR1, + IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0); + } else { + pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n"); + } +} + static void __init imx6sl_init_machine(void) { mxc_arch_reset_init_dt(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + imx6sl_fec_init(); } static void __init imx6sl_init_irq(void) -- 1.8.4.rc3