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2026-01-09 - 13:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Fri Jan 09, 2026 00:47:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26571991621,120cyclictest0-21swapper/2023:50:1913
26571991621,120cyclictest0-21swapper/2023:50:1913
26562991480,87cyclictest0-21swapper/1923:51:3411
26562991480,87cyclictest0-21swapper/1923:51:3411
26494991480,88cyclictest0-21swapper/522:30:0627
26571991472,105cyclictest0-21swapper/2020:30:2713
26571991462,121cyclictest0-21swapper/2023:10:1113
330891145136,6phc2sys0-21swapper/219:05:1112
26465991440,86cyclictest0-21swapper/022:14:190
26571991430,86cyclictest0-21swapper/2019:40:1713
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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