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2022-12-06 - 17:55

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OSADL Articles:

2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available


2016-11-12 12:00

Raspberry Pi and real-time Linux

Let's have a look at the OSADL QA Farm data



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50040,00006.12. 13:10
r0s1x86_​644 x 22,30055,99206.12. 13:10
r0s1sx86_​644 x 23,30052,80006.12. 13:10
r0s2x86_​644 x 23,50055,86406.12. 13:11
r0s2sx86_​6410 x 13,70073,99006.12. 13:13
r0s3x86_​648 x 23,600115,20006.12. 13:13
r0s3sx86_​644 x 23,60067,20006.12. 13:15
r0s4x86_​648 x 23,600115,20006.12. 13:17
r0s4sx86_​648 x 23,600115,20006.12. 13:18
r0s5x86_​648 x 23,500115,20006.12. 13:18
r0s5sx86_​648 x 23,600115,20006.12. 13:20
r0s6x86_​648 x 23,600115,20006.12. 13:21
r0s6sx86_​6410 x 23,700147,98006.12. 13:23
r0s7x86_​648 x 23,600115,20006.12. 13:24
r0s7sx86_​642 x 23,70029,53206.12. 13:26
r0s8x86_​648 x 23,600115,20006.12. 13:28
r0s8sx86_​646 x 23,47083,38806.12. 13:31
r1s0x86_​644 x 13,10024,79606.12. 13:31
r1s1x86_​642 x 22,60021,69606.12. 13:32
r1s2x86_​644 x 12,30028,00006.12. 13:32
r1s2sx86_​644 x 12,30028,00006.12. 13:33
r1s3x86_​644 x 23,50056,00026.05. 01:16
r1s3sx86_​644 x 23,50056,00026.05. 01:16
r1s4arm​v7l2 x 11,2004806.12. 13:33
r1s4sarm​v7l2 x 14004806.12. 13:34
r1s5aarch​644 x 11,20079606.12. 13:34
r1s6x86_​642 x 22,13017,06406.12. 13:34
r1s6sx86_​642 x 21,66713,33206.12. 13:35
r1s7arm​v6l1 x 11,66753006.12. 13:35
r1s8i6861 x 21,6006,40006.12. 13:36
r1s8sx86_​644 x 11,90015,19606.12. 13:37
r2s0x86_​644 x 13,10024,80006.12. 13:37
r2s1arm​v5tejl1 x 120019928.06. 13:37
r2s2arm​v7l1 x 172049906.12. 13:37
r2s4mips​641 x 180053110.01. 01:23
r2s5ppc1 x 13966624.11. 13:41
r2s6i6861 x 11,5002,99906.12. 13:38
r2s6sx86_​644 x 11,99015,99209.02. 01:27
r2s7x86_​644 x 13,70029,60010.03. 13:24
r2s8ppc1 x 14006606.12. 13:39
r3s0i6864 x 23,50056,00006.12. 13:39
r3s1i6864 x 12,40019,12706.12. 13:40
r3s2riscv641 x 11,00028406.12. 13:40
r3s3x86_​646 x 23,33379,99206.12. 13:41
r3s4x86_​641 x 21,4005,60010.01. 01:28
r3s5i5861 x 113326506.12. 13:42
r3s5sppc2 x 11,20040006.12. 13:43
r3s6x86_​641 x 21,6606,66606.12. 13:44
r3s6sx86_​642 x 22,66721,32806.12. 13:44
r3s7i6861 x 15331,06606.12. 13:45
r3s8i6866 x 13,20038,52606.12. 13:46
r4s0x86_​642 x 22,30018,39606.12. 13:46
r4s1arm​v7l4 x 11,50079206.12. 13:47
r4s1sarm​v7l4 x 11,50086406.12. 13:47
r4s2arm​v7l1 x 180079606.12. 13:48
r4s2sarm​v7l1 x 180047706.12. 13:49
r4s3i5861 x 150099606.12. 13:51
r4s3si6861 x 11,4662,93206.12. 13:52
r4s4ppc4 x 11,20049806.12. 13:52
r4s5arm​v7l1 x 1500006.12. 13:55
r4s5saarch​644 x 11,60020006.12. 13:56
r4s6x86_​644 x 23,40054,25606.12. 13:56
r4s6sarm​v7l0 x 1 x 11,0006606.12. 13:56
r4s7i6864 x 11,83314,66406.12. 13:57
r4s7sx86_​642 x 11,8337,33206.12. 13:57
r4s8arm​v7l1 x 140039806.12. 13:58
r4s8sarm​v7l1 x 140039806.12. 13:58
r5s0x86_​642 x 22,20017,58206.12. 13:58
r5s1x86_​646 x 13,33340,09206.12. 13:59
r5s2x86_​644 x 12,70021,69906.12. 13:59
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r5s3x86_​644 x 22,00031,87206.12. 14:00
r5s3sx86_​644 x 11,60012,74806.12. 14:00
r5s4x86_​642 x 22,53020,26406.12. 14:01
r5s4sx86_​642 x 22,53020,26406.12. 14:01
r5s5arm​v7l1 x 160059706.12. 14:02
r5s5sarm​v7l1 x 160060006.12. 14:03
r5s6ppc1 x 153313306.12. 14:06
r5s7arm​v7l1 x 15286406.12. 14:07
r5s7sarm​v7l1 x 15286406.12. 14:08
r6s0x86_​642 x 10 x 21,700136,14006.12. 14:09
r6s1x86_​642 x 12,0007,97806.12. 14:10
r6s2x86_​642 x 11,6679,57606.12. 14:10
r6s3x86_​644 x 22,20035,12006.12. 14:11
r6s4x86_​642 x 11,1004,37606.12. 14:11
r6s5i6861 x 11,5002,99206.12. 14:11
r6s6i6861 x 11,6003,19106.12. 14:12
r6s7i6862 x 12,3009,17606.12. 14:13
r6s8x86_​642 x 22,30018,35606.12. 14:13
r7s0x86_​642 x 22,30018,40006.12. 14:13
r7s1x86_​644 x 11,60012,84006.12. 14:14
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r7s3arm​v6l1 x 1700506.12. 14:14
r7s3sarm​v7l4 x 11,40035606.12. 14:17
r7s4arm​v7l1 x 153634806.12. 14:17
r7s4sarm​v7l4 x 11,50079206.12. 14:18
r7s5i6861 x 11,3002,59306.12. 14:19
r7s6arm​v7l1 x 11,00039828.02. 14:10
r7s7x86_​644 x 11,60012,76706.12. 14:19
r7s7sx86_​642 x 22,30018,44806.12. 14:20
r7s8arm​v7l1 x 11,00099506.12. 14:38
r7s8sarm​v7l1 x 11,00079606.12. 14:39
r8s0x86_​642 x 22,30018,40006.12. 14:39
r8s1i5861 x 130060116.10. 02:22
r8s2x86_​642 x 22,10016,76006.12. 14:41
r8s2sx86_​642 x 22,10016,76006.12. 14:41
r8s3x86_​644 x 12,66721,27606.12. 14:41
r8s4x86_​644 x 21,60028,80006.12. 14:42
r8s4sx86_​644 x 21,60028,80006.12. 14:42
r8s5i6864 x 23,40054,40006.12. 14:44
r8s6arm​v7l1 x 150049806.12. 14:44
r8s7x86_​642 x 12,70010,77606.12. 14:44
r8s7sx86_​642 x 13,30013,24806.12. 14:45
r8s8x86_​642 x 11,3005,14406.12. 14:45
r9s0x86_​642 x 22,30018,40006.12. 14:46
r9s1x86_​642 x 12,0003,99206.12. 14:46
r9s1sarm​v7l1 x 101,25022.07. 09:38
r9s2x86_​644 x 11,60012,74806.12. 14:46
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r9s3x86_​644 x 11,60012,74806.12. 14:47
r9s3sx86_​644 x 13,00024,00006.12. 14:47
r9s4i6861 x 21,0003,99006.12. 14:48
r9s4sx86_​642 x 11,3335,34706.12. 14:48
r9s5x86_​642 x 12,70010,77606.12. 14:49
r9s5sx86_​642 x 13,50013,99806.12. 14:49
r9s6x86_​642 x 23,00023,94406.12. 14:50
r9s7arm​v7l2 x 11,000006.12. 14:50
r9s8sarm​v7l1 x 180079606.12. 14:51
ras0x86_​642 x 22,30018,41806.12. 14:51
ras1i6861 x 11,4002,79906.12. 14:52
ras2x86_​642 x 11,0674,26606.12. 14:52
ras3sarm​v7l8 x 11,30084025.11. 02:17
ras4arm​v7l1 x 150039806.12. 14:53
ras4sarm​v7l1 x 160059707.02. 02:45
ras5arm​v7l2 x 11,0002406.12. 14:53
ras5sarm​v7l2 x 11,0002406.12. 14:53
ras6arm​v7l1 x 11,0001,98706.12. 14:54
ras6sarm​v7l1 x 11,0001,98706.12. 14:54
ras7ppc1 x 13966506.12. 14:54
ras8x86_​644 x 11,60014,40006.12. 14:55
ras8sx86_​644 x 11,60012,74806.12. 14:55
rbs0i6862 x 22,50017,60006.12. 14:56
rbs1x86_​644 x 13,10024,79606.12. 14:56
rbs2x86_​644 x 23,20051,20006.12. 14:56
rbs2sx86_​641 x 13,500006.12. 14:57
rbs3arm​v7l4 x 19962406.12. 14:57
rbs3sarm​v7l4 x 11,40035606.12. 14:57
rbs4x86_​644 x 11,2009,60006.12. 14:58
rbs4sx86_​644 x 11,60012,74806.12. 14:59
rbs5i6864 x 2049,16906.12. 14:59
rbs5saarch​644 x 11,6006406.12. 14:59
rbs6x86_​644 x 11,91515,32406.12. 15:00
rbs6sx86_​642 x 11,3335,33206.12. 15:00
rbs7arm​v7l4 x 19961205.12. 14:59
rbs7sarm​v7l4 x 19962406.12. 15:01
rbs8arm​v7l2 x 16662,65006.12. 15:02
rbs8sx86_​644 x 22,40038,70406.12. 15:02
rcs0x86_​648 x 22,40077,36806.12. 15:04
rcs1x86_​646 x 23,46783,37606.12. 15:04
rcs2x86_​642 x 12,80011,23206.12. 15:05
rcs3i6862 x 11,4005,58606.12. 15:05
rcs3sx86_​644 x 23,30052,69606.12. 15:06
rcs4x86_​642 x 11,1004,37606.12. 15:08
rcs4sx86_​644 x 11,1008,75206.12. 15:09
rcs5x86_​642 x 12,80011,19806.12. 15:09
rcs5sx86_​642 x 12,80011,19806.12. 15:11
rcs6x86_​644 x 23,50063,99206.12. 15:13
rcs7x86_​642 x 21,80014,40006.12. 15:14
rcs7sx86_​644 x 11,50011,98006.12. 15:14
rcs8x86_​6416 x 23,700217,15206.12. 15:18
rcs8sx86_​644 x 23,30052,79206.12. 15:18
rds0x86_​644 x 21,80031,99206.12. 15:18
rds1x86_​644 x 11,91015,32406.12. 15:19
rds2x86_​644 x 11,91015,32406.12. 15:19
rds3x86_​644 x 11,91015,32406.12. 15:20
rds4x86_​644 x 11,91015,32406.12. 15:20
rds5x86_​644 x 11,60012,74806.12. 15:21
rds6x86_​644 x 11,60012,74806.12. 15:21
rds7x86_​644 x 11,60012,74806.12. 15:22
rds8x86_​644 x 11,60012,74806.12. 15:22
res0x86_​644 x 21,80031,99206.12. 15:22
res1x86_​644 x 11,60014,40006.12. 15:23
res1sx86_​644 x 11,60014,40006.12. 15:24
res2x86_​644 x 11,60014,40006.12. 15:25
res3x86_​644 x 11,90015,05223.10. 15:17
res4x86_​644 x 11,90015,05225.10. 03:17
res5x86_​642 x 22,20019,20006.12. 15:26
res5sx86_​642 x 12,2009,60006.12. 15:27
res6x86_​642 x 22,20019,20019.01. 14:55
res7x86_​644 x 11,90015,05206.12. 15:27
res8x86_​644 x 11,90015,05206.12. 15:28
 

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