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2021-06-20 - 05:22

Dates and Events:

OSADL Articles:

2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available


2016-11-12 12:00

Raspberry Pi and real-time Linux

Let's have a look at the OSADL QA Farm data


2016-09-17 12:00

Preemption latency of real-time Linux systems

How to measure it – and how to fix it, if it's too high?



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

BoxArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 225004000020.06. 01:10
r0s1x86_​644 x 223005600020.06. 01:10
r0s1sx86_​644 x 233005280020.06. 01:10
r0s2x86_​644 x 235005587220.06. 01:11
r0s2sx86_​648 x 2360011520022.12. 13:11
r0s3x86_​648 x 2360011520020.06. 01:11
r0s4x86_​642 x 237002952820.06. 01:12
r0s4sx86_​646 x 236008638814.06. 01:12
r0s5x86_​648 x 2350011520020.06. 01:12
r0s5sx86_​644 x 234005452820.06. 01:13
r0s6x86_​648 x 2360011520020.06. 01:13
r0s6sx86_​648 x 2360011520020.06. 01:13
r0s7x86_​648 x 2360011520020.06. 01:14
r0s7sx86_​648 x 2360011520020.06. 01:14
r0s8x86_​648 x 2360011520020.06. 01:15
r0s8sx86_​646 x 234708338820.06. 01:16
r1s0x86_​644 x 131002479620.06. 01:16
r1s1x86_​642 x 226002169620.06. 01:17
r1s2x86_​644 x 123002799620.06. 01:17
r1s3x86_​644 x 235005600026.05. 01:16
r1s3sx86_​644 x 235005600026.05. 01:16
r1s4arm​v7l2 x 112004820.06. 01:18
r1s4sarm​v7l2 x 14004820.06. 01:18
r1s5aarch​644 x 1120079620.06. 01:19
r1s6x86_​642 x 221301706420.06. 01:19
r1s6sx86_​642 x 216671333220.06. 01:19
r1s7arm​v6l1 x 1166753002.05. 01:22
r1s8i6861 x 21600639820.06. 01:21
r1s8sx86_​644 x 119001519620.06. 01:21
r2s0x86_​644 x 131002480020.06. 01:21
r2s1arm​v5tejl1 x 120019920.06. 01:22
r2s2arm​v7l1 x 172049920.06. 01:23
r2s3arm​v7l1 x 160049520.06. 01:23
r2s4mips​641 x 180053110.01. 01:23
r2s5ppc1 x 13966626.01. 13:22
r2s6i6861 x 11500299920.06. 01:23
r2s6sx86_​644 x 119901599209.02. 01:27
r2s7x86_​644 x 137002960010.03. 13:24
r2s8ppc1 x 14006620.06. 01:24
r3s0i6864 x 235005599220.06. 01:25
r3s1i6864 x 124001912820.06. 01:25
r3s2i6861 x 11530306209.03. 13:27
r3s2sx86_​641 x 11800359009.03. 13:27
r3s3x86_​646 x 233338000420.06. 01:25
r3s4x86_​641 x 21400560010.01. 01:28
r3s5i5861 x 113326520.06. 01:27
r3s5sppc2 x 1120040017.03. 01:27
r3s6x86_​641 x 21660666620.06. 01:29
r3s6sx86_​642 x 226672133220.06. 01:30
r3s7i6861 x 1533106620.06. 01:30
r3s8i6866 x 132003852620.06. 01:31
r4s0x86_​642 x 223001839620.06. 01:32
r4s1x86_​642 x 227002155310.03. 13:32
r4s1sx86_​642 x 221001676810.03. 13:32
r4s2arm​v7l1 x 180039820.06. 01:33
r4s2sarm​v7l1 x 180053020.06. 01:37
r4s3i5861 x 150099620.06. 01:38
r4s3si6861 x 11466293213.06. 13:41
r4s4ppc4 x 1120049820.06. 01:39
r4s5arm​v7l1 x 1500020.06. 01:41
r4s5saarch​644 x 1160020030.01. 13:41
r4s6x86_​644 x 234005425620.06. 01:42
r4s6sarm​v7l0 x 1 x 110006620.06. 01:42
r4s7i6864 x 118331466020.06. 01:43
r4s7sx86_​642 x 11833733020.06. 01:43
r4s8arm​v7l1 x 140039820.06. 01:44
r4s8sarm​v7l1 x 140039820.06. 01:44
r5s0x86_​642 x 222001758220.06. 01:44
r5s1x86_​646 x 133334009220.06. 01:44
r5s2x86_​644 x 127002169911.06. 13:48
r5s2sx86_​644 x 240006386312.04. 01:34
r5s3x86_​644 x 220003187220.06. 01:45
r5s3sx86_​644 x 116001274820.06. 01:45
r5s4x86_​642 x 225302026420.06. 01:46
r5s4si6862 x 225302026511.06. 13:50
r5s5arm​v7l1 x 160059720.06. 01:47
r5s5sarm​v7l1 x 160060020.06. 01:48
r5s6ppc1 x 153313320.06. 01:51
r5s7arm​v7l1 x 15284820.06. 01:52
r5s7sarm​v7l1 x 15284820.06. 01:53
r5s8ppc1 x 1400263715.07. 01:50
r6s0x86_​642 x 10 x 2170013614020.06. 01:54
r6s1x86_​642 x 12000797820.06. 01:55
r6s2x86_​642 x 11667957802.01. 13:55
r6s3x86_​644 x 222003512020.06. 01:55
r6s4x86_​642 x 11100437620.06. 01:56
r6s5i6861 x 11500299220.06. 01:56
r6s6i6861 x 11600319120.06. 01:57
r6s7i6862 x 12300917620.06. 01:58
r6s8x86_​642 x 223001835620.06. 01:58
r7s0x86_​642 x 223001840020.06. 01:58
r7s1x86_​644 x 116001284020.06. 01:59
r7s2i6861 x 1600119619.07. 13:52
r7s2sarm​v7l4 x 11500108020.06. 01:59
r7s3arm​v6l1 x 1700520.06. 02:00
r7s3sarm​v7l4 x 1140035620.06. 02:02
r7s4arm​v7l1 x 153634831.05. 14:00
r7s5i6861 x 11300259320.06. 02:04
r7s5sarm​v7l2 x 140040010.04. 13:59
r7s6arm​v7l1 x 1100039830.05. 02:03
r7s7x86_​644 x 116001276720.06. 02:04
r7s7sx86_​642 x 223001844820.06. 02:04
r7s8arm​v7l1 x 1100099520.06. 02:05
r7s8sarm​v7l1 x 1100079620.06. 02:05
r8s0x86_​642 x 223001840020.06. 02:05
r8s1i5861 x 130060120.06. 02:06
r8s2x86_​642 x 221001676020.06. 02:07
r8s2sx86_​642 x 221001676020.06. 02:07
r8s3x86_​644 x 126672127720.06. 02:08
r8s4i6864 x 118331466420.06. 02:08
r8s4si6862 x 11833733226.03. 14:13
r8s5i6864 x 234005440020.06. 02:09
r8s6arm​v7l1 x 150049820.06. 02:09
r8s7x86_​642 x 127001077620.06. 02:09
r8s7sx86_​642 x 133001324820.06. 02:09
r8s8x86_​642 x 11300514420.06. 02:10
r9s0x86_​642 x 223001840020.06. 02:10
r9s1x86_​642 x 12000399120.06. 02:11
r9s1sarm​v7l1 x 1125028.04. 16:10
r9s2x86_​644 x 116001274820.06. 02:12
r9s3x86_​644 x 116001274820.06. 02:12
r9s3sx86_​644 x 130002400020.06. 02:12
r9s4i6861 x 21000398820.06. 02:13
r9s4sx86_​642 x 11333534720.06. 02:13
r9s5x86_​642 x 127001077620.06. 02:14
r9s5sx86_​644 x 234005439220.06. 02:14
r9s6x86_​642 x 230002396720.06. 02:15
r9s7arm​v7l2 x 11000020.06. 02:15
r9s8arm​v7l1 x 160059725.06. 02:14
r9s8sarm​v7l1 x 180079620.06. 02:15
ras0x86_​642 x 223001841720.06. 02:16
ras1i6861 x 11400279920.06. 02:16
ras2x86_​642 x 11067426620.06. 02:17
ras3aarch​648 x 12000400020.06. 02:17
ras3sarm​v7l8 x 1130074421.05. 14:08
ras4arm​v7l1 x 150039805.08. 02:11
ras4sarm​v7l1 x 160059707.02. 02:45
ras5arm​v7l2 x 110002420.06. 02:18
ras5sarm​v7l2 x 110002420.06. 02:18
ras6arm​v7l1 x 11000198720.06. 02:18
ras6sarm​v7l1 x 11000198720.06. 02:19
ras7ppc1 x 13966520.06. 02:19
ras8i6862 x 125001077420.06. 02:19
ras8sx86_​644 x 116001274820.06. 02:20
rbs0i6862 x 225001760020.06. 02:20
rbs1x86_​644 x 131002479620.06. 02:21
rbs2x86_​644 x 232005120020.06. 02:22
rbs3arm​v7l4 x 190017604.06. 02:22
rbs3sarm​v7l4 x 1140015220.06. 02:23
rbs4x86_​644 x 11200960010.06. 14:25
rbs4sx86_​644 x 116001274820.06. 02:24
rbs5i6864 x 220004941420.06. 02:24
rbs5saarch​644 x 118006420.06. 02:24
rbs6x86_​644 x 119151532420.06. 02:25
rbs6sx86_​642 x 11333533220.06. 02:26
rbs7arm​v7l4 x 19964803.05. 02:22
rbs7sarm​v7l4 x 1996632406.06. 14:27
rbs8arm​v7l2 x 1666265020.06. 02:27
rbs8sx86_​644 x 227004319220.06. 02:27
rcs0x86_​648 x 224007736820.06. 02:28
rcs1x86_​646 x 234678327120.06. 02:28
rcs2x86_​642 x 128001123220.06. 02:29
rcs3i6862 x 11400558620.06. 02:29
rcs3sx86_​644 x 233005269620.06. 02:30
rcs4x86_​642 x 11100437620.06. 02:31
rcs4sx86_​644 x 11100875220.06. 02:32
rcs5x86_​642 x 128001119820.06. 02:32
rcs5sx86_​642 x 128001119820.06. 02:34
rcs6x86_​644 x 235006399220.06. 02:36
rcs7x86_​642 x 218001440020.06. 02:36
rcs7sx86_​644 x 115001198020.06. 02:37
rcs8x86_​6416 x 2370021715220.06. 02:38
rcs8sx86_​644 x 233005280020.06. 02:38
rds0x86_​644 x 218003199220.06. 02:38
rds1x86_​644 x 119101532420.06. 02:39
rds2x86_​644 x 119101532420.06. 02:39
rds3x86_​644 x 119101532420.06. 02:40
rds4x86_​644 x 119101532420.06. 02:40
rds5x86_​644 x 116001274820.06. 02:41
rds6x86_​644 x 116001274820.06. 02:41
rds7x86_​644 x 116001274820.06. 02:42
rds8x86_​644 x 116001274820.06. 02:42
res0x86_​644 x 218003199220.06. 02:42
res1x86_​644 x 222002880020.06. 02:43
res2x86_​644 x 222002880020.06. 02:43
res5x86_​642 x 222001920020.06. 02:43
res6x86_​642 x 222001920020.06. 02:44
 

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