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2026-02-27 - 06:24
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot6.osadl.org (updated Fri Feb 27, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1068911020,4ptp4l401ktimersoftd/319:50:533
1068911020,4ptp4l401ktimersoftd/319:50:533
168962770,4sleep33269099cyclictest01:02:293
225502650,3sleep032662-21cyclictest21:42:480
323272644,47sleep00-21swapper/019:49:140
323272644,47sleep00-21swapper/019:49:140
172792640,2sleep20-21swapper/221:32:422
3269099630,3cyclictest29460-21taskset20:48:383
100622610,2sleep20-21swapper/223:15:002
46822600,4sleep233-21ksoftirqd/200:16:232
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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