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2026-02-16 - 12:36
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot6.osadl.org (updated Mon Feb 16, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2149521820,4sleep2302399cyclictest00:26:322
3228221570,5sleep2302399cyclictest00:36:432
1068911170,8ptp4l16023-21kworker/3:119:44:543
136982690,5sleep2302399cyclictest22:36:392
192132610,2sleep30-21swapper/300:56:403
40432600,2sleep20-21swapper/201:15:022
302292550,2sleep0301399cyclictest01:07:290
198202550,1sleep30-21swapper/322:42:103
79812540,2sleep128800-21diskmemload00:11:411
28962514,10sleep10-21swapper/119:46:041
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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