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2026-02-15 - 21:19
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot6.osadl.org (updated Sun Feb 15, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
915022150,3sleep20-21swapper/207:41:292
1068911050,3ptp4l401ktimersoftd/307:45:253
47962770,4sleep2986099cyclictest11:26:262
106891700,1ptp4l401ktimersoftd/310:51:013
96842680,4sleep1985699cyclictest11:31:311
61872670,2sleep30-21swapper/312:36:133
106891670,7ptp4l401ktimersoftd/310:10:563
30422650,2sleep20-21swapper/213:06:192
245982650,2sleep30-21swapper/310:40:583
67952610,3sleep33213-21diskmemload10:56:043
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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