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2022-08-20 - 06:58

x86 Intel Celeron G3900 @2800 MHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #c, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h200 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot2.osadl.org (updated Sat Aug 20, 2022 00:43:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2965727555,16sleep00-21swapper/019:07:360
2802427234,19sleep10-21swapper/119:04:041
70962660,0sleep10-21swapper/123:19:251
53692210,0sleep00-21swapper/000:04:160
254502190,1sleep10-21swapper/123:46:121
29967991817,0cyclictest24364-21ssh22:12:020
29967991710,1cyclictest0-21swapper/021:04:150
29968991616,0cyclictest0-21swapper/121:29:221
29968991616,0cyclictest0-21swapper/121:09:211
29968991615,1cyclictest1702-21ntp_states21:39:191
29968991615,0cyclictest1823-21ls20:43:581
29968991610,6cyclictest0-21swapper/122:57:241
29968991610,6cyclictest0-21swapper/119:29:311
29968991610,0cyclictest0-21swapper/120:49:461
29967991616,0cyclictest7-21ksoftirqd/021:43:580
29967991616,0cyclictest28041-21chrt20:25:470
29967991615,1cyclictest13187-21ssh21:09:380
29967991614,1cyclictest23257-21ls21:24:170
29967991610,6cyclictest0-21swapper/023:35:160
29967991610,6cyclictest0-21swapper/022:14:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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