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2026-01-22 - 22:18
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackcslot6.osadl.org (updated Thu Jan 22, 2026 00:46:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
328958723930,6sleep60-21swapper/619:05:206
329097799375372,1cyclictest3264817-21kworker/6:120:31:026
329093199375374,1cyclictest3410875-21kworker/0:223:59:010
329093199375374,1cyclictest0-21swapper/019:10:020
329093199374372,1cyclictest0-21swapper/022:59:020
329093199373371,1cyclictest0-21swapper/022:38:020
329093199372371,1cyclictest3593816-21kworker/0:120:46:020
329093199370369,1cyclictest3593816-21kworker/0:121:30:020
329093199370369,1cyclictest3410875-21kworker/0:200:12:020
329093199370369,1cyclictest0-21swapper/023:09:020
329093199370369,1cyclictest0-21swapper/021:20:020
329093199370369,1cyclictest0-21swapper/000:01:020
329093199369368,1cyclictest3410875-21kworker/0:222:44:020
329093199369368,1cyclictest3410875-21kworker/0:200:09:020
329093199369368,1cyclictest0-21swapper/021:47:020
329093199369367,2cyclictest3593816-21kworker/0:121:51:020
329093199368367,1cyclictest3410875-21kworker/0:200:39:020
329093199368366,1cyclictest3410875-21kworker/0:222:00:020
329093199368366,1cyclictest3410875-21kworker/0:200:21:020
329093199367366,1cyclictest0-21swapper/023:20:020
329093199367366,1cyclictest0-21swapper/022:22:020
329093199366365,1cyclictest0-21swapper/023:52:020
329093199366365,1cyclictest0-21swapper/023:52:020
329093199366365,1cyclictest0-21swapper/022:14:020
329093199365364,1cyclictest3593816-21kworker/0:121:40:020
329093199365364,1cyclictest3593816-21kworker/0:121:28:020
329093199365364,1cyclictest3410875-21kworker/0:223:14:020
329093199365364,1cyclictest3410875-21kworker/0:223:02:020
329093199365364,1cyclictest3410875-21kworker/0:200:33:020
329093199365364,1cyclictest0-21swapper/023:42:020
329093199365364,1cyclictest0-21swapper/021:12:020
329093199364363,1cyclictest3410875-21kworker/0:222:17:020
329093199364363,1cyclictest0-21swapper/022:47:020
329093199364363,1cyclictest0-21swapper/019:15:030
329093199363362,1cyclictest3410875-21kworker/0:222:06:020
329093199363362,1cyclictest3410875-21kworker/0:200:29:020
329093199363362,1cyclictest0-21swapper/023:36:020
329093199363361,1cyclictest3593816-21kworker/0:121:03:020
329093199362361,1cyclictest3593816-21kworker/0:120:40:020
329093199362361,1cyclictest0-21swapper/020:00:020
329093199362361,1cyclictest0-21swapper/019:40:020
329093199362361,1cyclictest0-21swapper/019:30:020
329093199362361,1cyclictest0-21swapper/019:30:020
329093199362360,1cyclictest0-21swapper/021:05:020
329093199361360,1cyclictest0-21swapper/020:21:020
329093199361360,1cyclictest0-21swapper/020:06:020
329093199360358,1cyclictest3593816-21kworker/0:120:36:020
329093199360358,1cyclictest0-21swapper/020:18:020
329093199359358,1cyclictest3593816-21kworker/0:120:51:020
329093199359358,1cyclictest3593816-21kworker/0:120:27:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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