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2026-03-21 - 15:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sat Mar 21, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11955992411,7cyclictest16292-21proxymap08:11:360
1195599232,1cyclictest0-21swapper/008:16:460
1195599230,2cyclictest31322-21chrt10:32:340
1195799220,21cyclictest843-21systemd-network09:55:592
1195599221,16cyclictest1274-21runrttasks10:10:120
1195599220,2cyclictest5458-21ps11:40:180
1195599220,2cyclictest29795-21tune2fs07:40:140
1195599220,2cyclictest12631-21chrt09:01:440
1195599220,21cyclictest22601-21interrupts09:20:160
1195599220,21cyclictest15420-21/usr/sbin/munin12:00:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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