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2026-05-06 - 15:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Wed May 06, 2026 12:46:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2455099240,19cyclictest0-21swapper/108:25:131
2455099230,22cyclictest843-21systemd-network08:22:111
24549992321,1cyclictest0-21swapper/012:00:130
2454999220,18cyclictest0-21swapper/007:11:540
24549992119,1cyclictest4823-21ntp_kernel_err10:20:170
24549992119,1cyclictest4823-21ntp_kernel_err10:20:170
24551992016,3cyclictest0-21swapper/212:25:002
2455199200,19cyclictest843-21systemd-network10:14:012
2455099200,17cyclictest0-21swapper/109:19:371
24551991916,2cyclictest23512-21grep11:50:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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