You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-03 - 11:29
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri Jul 03, 2026 00:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1827399230,5cyclictest0-21swapper/222:41:592
1826899230,22cyclictest870-21systemd-logind19:28:520
1827399225,13cyclictest0-21swapper/220:40:232
1826899220,18cyclictest0-21swapper/022:12:580
1827399210,3cyclictest0-21swapper/200:37:082
1827399210,18cyclictest0-21swapper/222:52:412
1826999213,11cyclictest22539-21munin-run20:15:011
1826999212,18cyclictest0-21swapper/100:00:001
1826999210,3cyclictest0-21swapper/122:55:121
1827399202,10cyclictest0-21swapper/220:10:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional