You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-21 - 03:00
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri Mar 20, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1464599241,19cyclictest16964-21sed10:05:000
1464599221,17cyclictest0-21swapper/008:15:010
14647992113,7cyclictest870-21systemd-logind09:28:522
1464799210,20cyclictest870-21systemd-logind08:48:522
1464799210,18cyclictest0-21swapper/207:34:112
14645992113,4cyclictest0-21swapper/012:32:190
1464599204,1cyclictest0-21swapper/011:55:430
1464599204,15cyclictest0-21swapper/008:28:560
14645992016,1cyclictest0-21swapper/011:25:180
1464799193,15cyclictest3208-21JS22:10:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional