You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-02 - 08:58
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri Jan 02, 2026 00:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31567992323,0cyclictest0-21swapper/222:45:162
31567992321,1cyclictest15946-21cat00:25:012
31567992321,1cyclictest15946-21cat00:25:002
3156599230,5cyclictest0-21swapper/020:20:180
3156799211,13cyclictest0-21swapper/200:38:112
3156699217,13cyclictest0-21swapper/122:07:551
3156799204,15cyclictest28-21ksoftirqd/200:10:012
31567992014,5cyclictest870-21systemd-logind23:53:522
3156799200,1cyclictest0-21swapper/221:05:322
3156799200,17cyclictest3983-21H222:10:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional