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2026-03-17 - 04:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Tue Mar 17, 2026 00:46:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1000699211,3cyclictest0-21swapper/220:16:252
10001992114,3cyclictest0-21swapper/121:09:341
10006992017,2cyclictest0-21swapper/221:40:172
10006992010,5cyclictest0-21swapper/221:15:132
1000199200,19cyclictest843-21systemd-network22:35:061
1000199200,17cyclictest0-21swapper/121:19:041
999799193,2cyclictest23839-21seq21:28:440
999799192,16cyclictest15938-21ntpq20:15:190
1000699194,1cyclictest0-21swapper/200:39:102
1000699192,16cyclictest31161-21sessionclean22:38:582
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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