You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-06 - 10:11
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Sat Dec 06, 2025 00:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27785992615,0cyclictest0-21swapper/223:51:002
27785992321,1cyclictest3465-21cut19:20:202
2778099230,5cyclictest0-21swapper/122:44:221
27780992117,3cyclictest0-21swapper/123:25:161
27780992112,0cyclictest0-21swapper/121:30:161
2777499214,11cyclictest13915-21gpgv22:35:000
27774992114,3cyclictest0-21swapper/019:13:250
2778599202,16cyclictest9568-21kernelversion20:30:192
27785992012,4cyclictest0-21swapper/220:17:342
27774992015,3cyclictest0-21swapper/022:15:220
2777499200,19cyclictest0-21swapper/000:29:030
27785991917,1cyclictest29513-21processes19:10:212
27785991915,3cyclictest19917-21nfsd400:35:192
27785991914,3cyclictest22727-21nvmesmart_nvme019:55:192
2778599190,3cyclictest8902-21nvmesmart_nvme019:30:202
2778599190,18cyclictest414-20systemd-journal22:39:002
2778599190,18cyclictest0-21swapper/222:25:172
2778099193,1cyclictest822-21cat21:10:211
2778099193,1cyclictest0-21swapper/123:00:571
2778099192,16cyclictest23362-21pzem23:45:221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional