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2026-09-05 - 03:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Fri Sep 04, 2026 12:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1165299270,4cyclictest0-21swapper/009:38:400
11662992414,5cyclictest0-21swapper/208:45:132
11652992421,2cyclictest14495-21snapd12:13:110
1165299237,6cyclictest0-21swapper/010:00:010
1165299230,5cyclictest0-21swapper/010:03:550
1165299230,16cyclictest21482-21latency_hist12:10:000
1165799220,18cyclictest0-21swapper/110:58:421
11652992215,1cyclictest0-21swapper/010:10:220
11652992214,2cyclictest30536-21kernelversion10:30:150
1165299221,15cyclictest188632sleep008:18:020
1165299220,2cyclictest5994-21apache_processe10:45:110
1165299220,2cyclictest27991-21sed07:39:000
1165299220,2cyclictest25243-21chrt11:19:190
1165299220,1cyclictest30579-21sed08:40:010
1165299220,16cyclictest27296-21apache_processe12:20:120
1165299220,15cyclictest30750-21df12:25:150
1165299220,15cyclictest12359-21irqstats10:55:160
11652992114,2cyclictest22520-21/usr/sbin/munin10:15:210
11652992114,1cyclictest17409-21sed07:20:010
11652992114,1cyclictest0-21swapper/011:35:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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