You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-31 - 22:51
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Sun May 31, 2026 12:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20045992314,5cyclictest0-21swapper/007:15:180
20045992311,5cyclictest24576-21grep12:00:110
2004799220,19cyclictest0-21swapper/212:19:592
2004699220,18cyclictest0-21swapper/109:10:001
2004699210,17cyclictest0-21swapper/108:33:571
2004599217,13cyclictest0-21swapper/011:49:110
2004599210,3cyclictest30195-21cpuspeed_turbos12:10:140
20047992018,1cyclictest0-21swapper/210:22:582
20047992016,3cyclictest0-21swapper/209:05:182
2004699200,19cyclictest843-21systemd-network11:00:211
2004599204,15cyclictest870-21systemd-logind11:21:520
2004599202,17cyclictest0-21swapper/007:45:210
20045992017,2cyclictest3991-21H222:10:210
2004599200,17cyclictest3633-21grep12:20:120
20047991917,1cyclictest0-21swapper/211:14:492
20047991914,1cyclictest0-21swapper/212:04:462
2004799191,17cyclictest0-21swapper/207:19:102
2004799190,2cyclictest3981-21H222:10:212
2004799190,16cyclictest3985-21H222:10:212
2004799190,16cyclictest3983-21H222:10:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional