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2025-11-24 - 16:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Mon Nov 24, 2025 12:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28344993130,1cyclictest0-21swapper/110:45:161
2835099245,8cyclictest0-21swapper/209:40:532
2835099230,5cyclictest0-21swapper/209:36:262
28340992320,2cyclictest20412-21sed11:39:000
2834099225,16cyclictest32217-21php7.009:09:010
28340992218,3cyclictest21086-21sshd07:50:260
28340992218,3cyclictest12389-21chrt08:35:090
28340992218,3cyclictest11399-21grep07:35:150
28340992218,3cyclictest10211-21awk09:25:200
2835099212,18cyclictest0-21swapper/211:49:062
2835099212,18cyclictest0-21swapper/210:47:072
2835099210,20cyclictest0-21swapper/211:01:022
2834099215,2cyclictest22603-21tr08:50:160
2834099214,3cyclictest30808-21awk11:55:220
2834099214,16cyclictest6252-21fschecks_count12:10:160
2834099214,16cyclictest30587-21sed07:10:220
2834099214,16cyclictest28294-21cstates10:55:130
2834099213,3cyclictest21622-21sed10:40:220
2834099213,17cyclictest0-21swapper/008:00:200
28340992118,2cyclictest2669-21sort07:20:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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