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2026-06-04 - 02:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Wed Jun 03, 2026 12:46:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20028992314,5cyclictest0-21swapper/211:45:212
2002899230,20cyclictest0-21swapper/211:43:362
20024992312,6cyclictest0-21swapper/008:50:000
2002499230,5cyclictest0-21swapper/010:29:580
20025992212,10cyclictest21-21ksoftirqd/109:02:431
2002499220,21cyclictest0-21swapper/012:15:290
2002599210,3cyclictest0-21swapper/108:15:151
2002599210,20cyclictest870-21systemd-logind08:01:511
2002499214,16cyclictest3414-21master10:52:080
20028992012,4cyclictest0-21swapper/212:27:162
2002599200,16cyclictest0-21swapper/107:11:441
20028991916,2cyclictest21899-21nfsd407:10:192
20028991914,1cyclictest0-21swapper/209:05:182
2002899190,3cyclictest23000-21dpkg10:05:002
2002599192,16cyclictest2850-21gmain10:35:201
20025991914,4cyclictest426-21systemd-udevd09:21:521
20025991914,1cyclictest0-21swapper/111:57:121
2002599190,18cyclictest870-21systemd-logind09:58:521
20024991917,1cyclictest0-21swapper/008:23:280
20024991915,3cyclictest0-21swapper/009:10:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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