You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-15 - 05:27
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Sun Mar 15, 2026 00:46:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
362099284,4cyclictest0-21swapper/120:30:001
361799252,18cyclictest4030-21groups22:10:210
361799240,17cyclictest1100-21snmpd23:30:180
361799233,2cyclictest8875-21date22:10:000
361799230,5cyclictest0-21swapper/021:27:190
361799230,5cyclictest0-21swapper/021:27:190
361799230,22cyclictest0-21swapper/000:00:560
3625992120,0cyclictest0-21swapper/219:35:162
362599210,6cyclictest399-20systemd-journal22:45:002
362099212,16cyclictest0-21swapper/123:59:371
361799216,1cyclictest3976-21H222:10:210
3625992019,0cyclictest0-21swapper/221:30:152
362099203,15cyclictest0-21swapper/100:22:431
362599192,16cyclictest29489-21timerwakeupswit23:40:212
3625991916,2cyclictest12402-21sort23:10:222
3625991916,2cyclictest12402-21sort23:10:222
3625991916,2cyclictest10879-21cat22:10:212
362599190,18cyclictest0-21swapper/220:05:002
362599190,16cyclictest3985-21H222:10:212
362099192,2cyclictest4849-21nvmesmart_nvme022:00:181
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional