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2026-04-15 - 21:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Wed Apr 15, 2026 12:46:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
825099250,20cyclictest4515-21iwlist11:45:152
824299210,1cyclictest0-21swapper/011:34:460
824299210,1cyclictest0-21swapper/011:34:450
825099204,15cyclictest0-21swapper/211:32:162
825099204,15cyclictest0-21swapper/211:32:152
825099202,17cyclictest0-21swapper/209:49:072
8250992017,2cyclictest0-21swapper/211:00:182
825099200,19cyclictest843-21systemd-network10:12:552
825099192,2cyclictest13287-21cut09:10:182
825099192,2cyclictest0-21swapper/210:15:012
825099192,1cyclictest0-21swapper/212:39:582
825099192,1cyclictest0-21swapper/211:54:502
825099192,1cyclictest0-21swapper/210:30:002
825099192,1cyclictest0-21swapper/209:15:042
8250991915,3cyclictest7987-21systemctl09:00:202
8250991915,2cyclictest9312-21cpuspeed_turbos09:05:142
8250991913,5cyclictest870-21systemd-logind07:26:522
825099191,17cyclictest24971-21php7.007:39:002
825099190,18cyclictest399-20systemd-journal11:29:542
824799192,16cyclictest0-21swapper/107:37:081
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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