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2026-09-20 - 11:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun Sep 20, 2026 00:45:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
807121350,5sleep0715699cyclictest21:30:210
7157998314,65cyclictest20775-21taskset19:39:511
7157998213,66cyclictest13665-21taskset19:22:381
7157997414,57cyclictest4833-21runrttasks22:31:501
293642700,4sleep00-21swapper/019:55:290
715799638,15cyclictest12556-21wc21:40:171
7157996312,6cyclictest28118-21sed00:30:291
134491630,4ptp4l21017-21sshd21:56:193
7157996110,10cyclictest30475-21df20:00:141
7157995915,40cyclictest20995-21grep20:50:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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