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2026-09-23 - 05:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed Sep 23, 2026 00:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1912521490,2sleep019123-21grep22:55:280
134491840,8ptp4l0-21swapper/019:05:190
950699739,62cyclictest3708-21kworker/1:223:40:491
950899720,69cyclictest2047-21sed23:30:173
9505996734,7cyclictest9-21ksoftirqd/019:40:000
950899650,62cyclictest31791-21/usr/sbin/munin21:05:233
950899650,29cyclictest30574-21chrt21:04:523
9505996527,4cyclictest9-21ksoftirqd/021:40:010
9505996436,3cyclictest9-21ksoftirqd/021:45:210
950899635,18cyclictest9963-21latency_hist21:30:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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