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2026-03-14 - 14:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Mar 14, 2026 00:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1344911460,15ptp4l0-21swapper/323:37:423
9012710,5sleep0111rcuc/021:10:150
9436996831,7cyclictest41-21ksoftirqd/300:35:243
9436996630,6cyclictest41-21ksoftirqd/321:20:153
134491650,21ptp4l18169-21ntp_states00:05:222
943699642,30cyclictest0-21swapper/300:04:243
221792640,7sleep3943699cyclictest23:05:153
134491640,5ptp4l0-21swapper/019:55:220
134491630,18ptp4l10142-21apt-get23:50:122
134491630,18ptp4l10142-21apt-get23:50:112
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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