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2026-09-08 - 21:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Sep 08, 2026 12:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2384321580,6sleep3481099cyclictest07:50:123
2732421500,5sleep3481099cyclictest09:05:263
134491670,4ptp4l0-21swapper/111:55:261
481099622,32cyclictest0-21swapper/308:08:283
134491620,3ptp4l5964-21apt-get10:40:132
4810996125,4cyclictest41-21ksoftirqd/311:40:143
134491610,4ptp4l0-21swapper/007:25:130
4810996033,8cyclictest41-21ksoftirqd/309:35:163
481099602,33cyclictest0-21swapper/308:25:183
4810995922,4cyclictest41-21ksoftirqd/307:35:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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