You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-15 - 17:30
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Aug 15, 2026 12:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
175632760,4sleep217567-21irqrtprio08:35:192
134491730,5ptp4l0-21swapper/110:26:341
134491670,4ptp4l17489-21iostat09:45:182
924299651,61cyclictest8477-21kworker/1:207:55:081
924499607,11cyclictest0-21swapper/310:02:253
9244996052,6cyclictest6501-21phc2sys10:30:243
924499603,6cyclictest401ktimersoftd/310:30:003
9243995930,3cyclictest33-21ksoftirqd/210:48:502
924299591,55cyclictest27441-21kworker/1:010:46:291
924499587,7cyclictest0-21swapper/310:20:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional