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2026-04-01 - 23:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed Apr 01, 2026 12:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
134491610,4ptp4l15260-21/usr/sbin/munin10:25:200
134491600,5ptp4l0-21swapper/209:15:232
134491600,3ptp4l0-21swapper/109:00:181
134491590,10ptp4l18866-21iostat_ios07:05:180
134491580,4ptp4l21979-21mailstats07:10:250
134491570,4ptp4l0-21swapper/312:16:083
134491570,3ptp4l0-21swapper/009:30:250
134491560,3ptp4l0-21swapper/311:51:253
134491560,3ptp4l0-21swapper/110:45:261
134491550,4ptp4l0-21swapper/312:36:323
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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