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2026-05-31 - 23:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun May 31, 2026 12:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
300921430,2sleep01993099cyclictest08:50:180
1779521430,7sleep21993299cyclictest11:40:182
134491650,6ptp4l0-21swapper/007:50:280
134491650,6ptp4l0-21swapper/007:50:280
134491640,3ptp4l0-21swapper/007:45:290
134491610,3ptp4l9403-21apt-get09:05:120
162602600,5sleep016264-21latency_hist10:30:000
134491600,3ptp4l0-21swapper/208:30:252
134491590,4ptp4l0-21swapper/209:15:232
134491590,4ptp4l0-21swapper/209:15:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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