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2026-04-20 - 08:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Apr 20, 2026 00:45:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2228921580,5sleep20-21swapper/221:35:252
1858699823,77cyclictest0-21swapper/222:40:282
18585996916,16cyclictest8771-21chrt19:56:151
18585996914,11cyclictest4772-21chrt22:09:461
1858499697,6cyclictest134691getstats22:50:080
18585996816,16cyclictest31989-21chrt19:37:141
18585996815,15cyclictest28349-21chrt00:08:321
18585996814,9cyclictest29863-21seq20:42:191
18585996716,15cyclictest30502-21chrt00:11:491
18585996614,11cyclictest13545-21taskset21:15:451
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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