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2026-04-09 - 19:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Thu Apr 09, 2026 12:45:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
799721220,5sleep10-21swapper/108:00:191
134491640,21ptp4l9276-21grep10:20:253
134491620,4ptp4l12428-21df_inode09:20:160
134491620,3ptp4l27861-21users09:50:240
126182620,3sleep20-21swapper/208:10:182
134491610,4ptp4l0-21swapper/111:20:161
134491600,4ptp4l22131-21ntp_states08:30:221
134491590,5ptp4l0-21swapper/111:35:291
134491590,4ptp4l0-21swapper/208:45:262
134491580,21ptp4l0-21swapper/207:05:192
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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