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2026-06-17 - 23:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed Jun 17, 2026 12:45:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3212299728,61cyclictest27683-21cut11:40:010
3212299718,59cyclictest11274-21idleruntime-cro08:45:000
3212299697,26cyclictest0-21swapper/008:00:150
3212299689,56cyclictest22359-21/usr/sbin/munin12:35:240
32122996812,16cyclictest1317-21runrttasks08:29:000
32122996711,16cyclictest1317-21runrttasks07:37:130
171912670,4sleep23212499cyclictest08:55:212
3212499661,30cyclictest11371-21awk11:05:012
32122996612,17cyclictest1317-21runrttasks12:08:400
32122996514,14cyclictest15517-21taskset08:51:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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