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2026-05-19 - 01:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon May 18, 2026 12:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1307221690,5sleep31896999cyclictest10:25:003
18967998233,4cyclictest33-21ksoftirqd/212:10:292
134491740,25ptp4l32680-21seq08:49:061
18969996932,5cyclictest41-21ksoftirqd/308:08:443
134491690,7ptp4l0-21swapper/007:05:170
1896799663,33cyclictest0-21swapper/208:40:162
1896799662,35cyclictest0-21swapper/210:06:552
1896799662,35cyclictest0-21swapper/210:06:552
224122650,4sleep00-21swapper/008:25:180
18969996529,4cyclictest41-21ksoftirqd/309:38:113
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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