You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-17 - 20:49
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Aug 17, 2026 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2266321760,5sleep21685399cyclictest07:20:262
134491920,3ptp4l5656-21chrt09:02:352
18992730,3sleep11906-21cpuspeed_turbos11:15:131
16854996456,5cyclictest32114-21latency_hist12:20:003
134491640,4ptp4l0-21swapper/109:45:211
1685499617,7cyclictest0-21swapper/308:00:233
134491610,4ptp4l2884-21ls10:05:232
134491600,4ptp4l20849-21users07:15:290
1685499587,7cyclictest0-21swapper/308:50:263
134491580,5ptp4l0-21swapper/207:06:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional