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2026-03-22 - 09:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun Mar 22, 2026 00:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1994421250,6sleep11845799cyclictest19:10:281
18457997712,63cyclictest20933-21kworker/1:121:55:291
1845799770,33cyclictest12403-21/usr/sbin/munin23:35:171
48572760,2sleep34862-21cpuspeed_turbos21:00:143
1845799710,29cyclictest9394-21seq00:35:561
1845799710,29cyclictest27291-21seq19:28:081
1845799670,29cyclictest13918-21taskset22:28:341
134491670,4ptp4l11984-21diskstats20:05:162
267722660,6sleep21845899cyclictest21:45:252
1845799661,24cyclictest20768-21/usr/sbin/munin19:15:251
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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