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2026-03-31 - 07:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Mar 31, 2026 00:45:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1439522020,11sleep114413-21sort19:05:051
1960721960,4sleep019543-21sh19:05:140
134691900,4getstats0-21swapper/320:20:213
134691750,1getstats21765-1kworker/2:1H20:15:222
6175997128,5cyclictest9-21ksoftirqd/020:40:220
6177996636,13cyclictest33-21ksoftirqd/200:20:162
6176996631,8cyclictest25-21ksoftirqd/119:55:221
297092660,4sleep229753-21sh19:06:152
6176996433,4cyclictest25-21ksoftirqd/119:10:231
6176996432,4cyclictest25-21ksoftirqd/123:05:261
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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