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2026-07-21 - 19:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Jul 21, 2026 00:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2811321230,7sleep12456199cyclictest23:55:171
24560996428,7cyclictest9-21ksoftirqd/022:40:250
59062620,4sleep20-21swapper/219:40:002
59062620,4sleep20-21swapper/219:40:002
134491610,3ptp4l29468-21/usr/sbin/munin22:50:262
24560996029,6cyclictest9-21ksoftirqd/021:10:230
24560995932,7cyclictest9-21ksoftirqd/023:45:230
24560995931,9cyclictest9-21ksoftirqd/021:00:150
24560995928,7cyclictest9-21ksoftirqd/020:55:270
24560995927,3cyclictest9-21ksoftirqd/000:00:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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