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2026-04-04 - 07:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Apr 04, 2026 00:45:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1632821440,2sleep22080299cyclictest23:35:222
1950621370,6sleep22080299cyclictest22:34:592
2080299741,70cyclictest0-21swapper/223:30:282
2080299712,67cyclictest0-21swapper/219:45:282
20801996929,10cyclictest25-21ksoftirqd/123:35:211
20801996927,10cyclictest25-21ksoftirqd/123:55:241
20800996815,11cyclictest21773-21taskset23:46:230
20801996730,10cyclictest25-21ksoftirqd/100:10:221
20800996516,11cyclictest30228-21taskset20:38:190
134491650,3ptp4l13858-21ntp_states22:20:233
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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