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2026-08-30 - 03:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Aug 29, 2026 12:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
537321440,5sleep35377-21cpuspeed10:20:143
14196996913,11cyclictest1317-21runrttasks11:36:300
14196996911,11cyclictest4759-21unixbench_multi11:25:270
14196996910,11cyclictest15447-21ntpq09:30:210
14196996815,10cyclictest14212-21taskset07:10:090
14196996811,16cyclictest31910-21cat08:55:260
251182670,5sleep21419899cyclictest08:40:292
14196996714,9cyclictest15746-21awk11:50:210
14196996615,10cyclictest1317-21runrttasks10:52:120
14196996610,22cyclictest28459-21df10:00:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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