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2026-05-22 - 15:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri May 22, 2026 00:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1925921510,7sleep02814599cyclictest21:10:040
1297521370,6sleep22814799cyclictest19:45:212
2814899732,29cyclictest0-21swapper/323:00:183
134491700,6ptp4l33-21ksoftirqd/221:26:092
134491700,4ptp4l1301-21snmpd19:40:062
134491690,30ptp4l17900-21sh21:05:242
28146996813,12cyclictest32691-21chrt22:46:011
2814699677,58cyclictest0-21swapper/119:45:251
28146996713,11cyclictest23897-21chrt23:36:441
134491660,4ptp4l26646-21date23:45:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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