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2026-04-30 - 15:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Thu Apr 30, 2026 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1066521730,5sleep03033899cyclictest10:00:120
1760021410,6sleep03033899cyclictest07:50:190
30341997534,8cyclictest41-21ksoftirqd/310:07:373
74212730,3sleep37414-21cron08:40:013
30341997140,3cyclictest41-21ksoftirqd/307:30:003
30338997134,9cyclictest9-21ksoftirqd/010:07:400
30338997127,9cyclictest9-21ksoftirqd/009:05:010
30338997125,8cyclictest9-21ksoftirqd/008:40:180
30341996525,8cyclictest41-21ksoftirqd/309:35:243
30341996433,7cyclictest41-21ksoftirqd/308:07:443
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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