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2026-03-28 - 02:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Mar 27, 2026 12:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
76862680,4sleep17690-21irqrtprio08:20:171
667699645,57cyclictest0-21swapper/209:06:492
320902620,4sleep032086-21awk08:04:590
134491610,4ptp4l0-21swapper/011:55:250
134491610,3ptp4l21468-21apt-get11:10:122
134491600,3ptp4l0-21swapper/111:45:191
134491590,5ptp4l0-21swapper/009:24:510
134491590,3ptp4l0-21swapper/012:01:190
134491580,5ptp4l0-21swapper/009:56:290
134491570,3ptp4l0-21swapper/210:05:262
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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