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2026-04-19 - 12:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun Apr 19, 2026 00:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2268997613,21cyclictest3324-21latency_hist23:50:003
2268997516,12cyclictest28295-21chrt22:23:173
2268997215,11cyclictest18025-21taskset19:42:023
2268997116,19cyclictest9342-21taskset20:32:023
2268997116,12cyclictest25748-21taskset21:07:233
2268997116,11cyclictest27641-21taskset20:04:283
2268997111,11cyclictest418-21cron21:25:003
2268997015,18cyclictest8910-21chrt19:23:483
2268997015,12cyclictest9657-21taskset22:52:003
2268996916,11cyclictest24273-21chrt00:34:473
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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