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2026-09-14 - 19:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Sep 14, 2026 12:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2938121820,5sleep329385-21irqrtprio07:05:173
2096621810,4sleep33109299cyclictest10:15:133
119322770,4sleep00-21swapper/012:15:000
134491760,3ptp4l0-21swapper/209:28:052
31090996531,4cyclictest25-21ksoftirqd/107:45:001
31090996429,4cyclictest25-21ksoftirqd/109:45:201
31090996429,4cyclictest25-21ksoftirqd/109:45:201
17182640,6sleep20-21swapper/211:50:242
288162610,4sleep20-21swapper/208:15:002
134491590,5ptp4l0-21swapper/212:19:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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