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2026-03-12 - 12:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Thu Mar 12, 2026 00:45:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1048521730,6sleep11575499cyclictest23:35:191
3252021360,5sleep31575699cyclictest00:20:223
153242830,6sleep30-21swapper/320:15:303
15753996429,9cyclictest9-21ksoftirqd/020:25:190
134491630,9ptp4l0-21swapper/022:20:220
134491600,5ptp4l0-21swapper/300:10:163
134491600,4ptp4l0-21swapper/222:15:432
134491600,4ptp4l0-21swapper/100:01:581
15753995925,3cyclictest9-21ksoftirqd/023:57:300
1575399584,8cyclictest2663-21awk23:20:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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