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2026-09-19 - 08:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Sep 19, 2026 00:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
227142870,4sleep022720-21latency_hist22:05:000
320412660,5sleep30-21swapper/322:25:013
6046996431,6cyclictest25-21ksoftirqd/100:00:161
6046996329,10cyclictest25-21ksoftirqd/121:50:181
6045996229,9cyclictest9-21ksoftirqd/021:40:000
6045996222,5cyclictest9-21ksoftirqd/000:00:240
6046996128,7cyclictest25-21ksoftirqd/100:05:141
6046996127,4cyclictest25-21ksoftirqd/123:30:141
6046996056,2cyclictest231rcuc/122:45:161
6046996025,6cyclictest25-21ksoftirqd/119:10:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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