You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-19 - 21:56
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Sep 19, 2026 12:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
134491640,4ptp4l0-21swapper/307:40:283
134491620,19ptp4l23389-21ls10:25:211
134491590,4ptp4l0-21swapper/208:25:332
87692580,6sleep32898899cyclictest07:35:193
73252580,4sleep10-21swapper/108:40:281
134491580,5ptp4l0-21swapper/212:30:232
134491580,5ptp4l0-21swapper/207:50:252
134491580,4ptp4l456-21ntp_states10:45:232
134491580,4ptp4l0-21swapper/308:35:383
134491580,4ptp4l0-21swapper/212:15:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional