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2026-03-23 - 08:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Mar 23, 2026 00:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
116621340,5sleep12118899cyclictest21:55:171
2119099679,16cyclictest30888-21mv00:09:313
21190996412,10cyclictest27871-21chrt21:43:443
134491640,3ptp4l1371-21irqstats20:45:191
2119099635,15cyclictest3201-21/usr/sbin/munin23:10:153
2119099626,10cyclictest0-21swapper/322:15:243
2119099626,10cyclictest0-21swapper/322:15:233
134491620,4ptp4l22649-21meminfo22:40:211
71052610,3sleep07098-21apt-get19:50:000
2119099614,20cyclictest0-21swapper/320:25:273
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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