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2026-08-23 - 05:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun Aug 23, 2026 00:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3019122010,4sleep20-21swapper/219:09:152
3113321860,16sleep331131-21sort19:08:493
1763821850,5sleep11969-21spawn19:05:291
1994321530,3sleep21462399cyclictest20:41:222
1239521240,6sleep01462199cyclictest20:25:230
134491920,18ptp4l11956-21expr19:10:311
148562820,9sleep01964-21spawn19:05:240
220882730,5sleep31462499cyclictest00:15:183
214482680,5sleep00-21swapper/023:05:180
167682630,5sleep31462499cyclictest19:25:243
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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