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2026-06-30 - 04:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Jun 30, 2026 00:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
902221350,4sleep0483299cyclictest20:25:270
2544321340,6sleep2483499cyclictest23:20:242
134491690,29ptp4l25-21ksoftirqd/119:55:121
201862630,5sleep20-21swapper/200:20:172
134491630,4ptp4l0-21swapper/100:20:211
134491610,3ptp4l18413-21ls00:15:173
134491610,3ptp4l18413-21ls00:15:173
134491600,5ptp4l0-21swapper/219:50:032
134491600,4ptp4l0-21swapper/220:55:142
134491590,3ptp4l0-21swapper/320:55:233
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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