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2026-04-04 - 21:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Apr 04, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1113899670,25cyclictest18657-21egrep09:45:111
1113899666,19cyclictest12335-21irqrtprio09:30:181
238412650,5sleep11113899cyclictest12:10:241
238412650,5sleep11113899cyclictest12:10:231
1113899650,26cyclictest22900-21cat08:45:131
1113899650,26cyclictest22900-21cat08:45:121
1113899650,23cyclictest9926-21date10:35:011
134491640,4ptp4l0-21swapper/311:25:283
11139996336,3cyclictest33-21ksoftirqd/211:50:152
11139996327,6cyclictest33-21ksoftirqd/208:03:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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