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2026-07-01 - 18:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed Jul 01, 2026 12:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1290621420,7sleep33259799cyclictest12:15:013
108482760,5sleep125-21ksoftirqd/111:00:171
3259799685,22cyclictest18347-21timerwakeupswit10:05:283
3259799682,3cyclictest5806-21grep07:20:183
134491670,3ptp4l6372-21/usr/sbin/munin08:30:261
134491640,5ptp4l0-21swapper/011:20:110
134491630,4ptp4l0-21swapper/108:35:241
134491630,22ptp4l0-21swapper/011:59:240
134491600,4ptp4l0-21swapper/112:00:181
134491600,3ptp4l19800-21diskstats11:20:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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