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2025-09-16 - 10:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Sep 16, 2025 00:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
445621710,5sleep01655799cyclictest22:10:220
3005421280,3sleep01655799cyclictest20:45:290
2847191630,19ptp4l23605-21latency_hist20:35:002
194412620,4sleep10-21swapper/121:35:011
16562996230,8cyclictest41-21ksoftirqd/300:35:003
2847191610,4ptp4l0-21swapper/300:05:003
2847191610,4ptp4l0-21swapper/222:00:252
2847191600,4ptp4l0-21swapper/322:39:303
2847191600,4ptp4l0-21swapper/121:15:021
16562996026,10cyclictest41-21ksoftirqd/323:41:353
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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