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2025-12-28 - 13:38
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Note that this system runs a non-optimized debug kernel.
Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Characteristics of the 100 highest latencies:
System rackbslot0.osadl.org (updated Sun Dec 28, 2025 00:46:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
"interval":200,5186
"cycles":100000000,5185
"load":"idle",5184
"condition":{5183
"clock":"2500"5181
"family":"x86",5180
"vendor":"Intel",5179
"processor":{5177
"dataset":"2024-01-08T15:38:16+0100"5175
"origin":"2024-01-08T12:43:22+0100",5174
"timestamps":{5173
"granularity":"microseconds"5171
6110:51:545169
41,10:51:345168
57,10:51:505167
43,10:51:365166
"maxima":[5165
010:50:535162
0,10:50:535161
0,10:50:535160
0,10:50:535159
0,10:50:535158
0,10:50:535157
0,10:50:535156
0,10:50:535155
0,10:50:535154
0,10:50:535153
0,10:50:535152
0,10:50:535151
0,10:50:535150
0,10:50:535149
0,10:50:535148
0,10:50:535147
0,10:50:535146
0,10:50:535145
0,10:50:535144
0,10:50:535143
0,10:50:535142
0,10:50:535141
0,10:50:535140
0,10:50:535139
0,10:50:535138
0,10:50:535137
0,10:50:535136
0,10:50:535135
0,10:50:535134
0,10:50:535133
0,10:50:535132
0,10:50:535131
0,10:50:535130
0,10:50:535129
0,10:50:535128
0,10:50:535127
0,10:50:535126
0,10:50:535125
0,10:50:535124
0,10:50:535123
0,10:50:535122
0,10:50:535121
0,10:50:535120
0,10:50:535119
0,10:50:535118
0,10:50:535117
0,10:50:535116
0,10:50:535115
0,10:50:535114
0,10:50:535113
0,10:50:535112
0,10:50:535111
0,10:50:535110
0,10:50:535109
0,10:50:535108
0,10:50:535107
0,10:50:535106
0,10:50:535105
0,10:50:535104
0,10:50:535103
0,10:50:535102
0,10:50:535101
0,10:50:535100
0,10:50:535099
0,10:50:535098
0,10:50:535097
0,10:50:535096
0,10:50:535095
0,10:50:535094
0,10:50:535093
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0,10:50:535083
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0,10:50:535081
0,10:50:535080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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