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2025-07-06 - 11:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sun Jul 06, 2025 00:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
590599270,3cyclictest0-21swapper/123:03:031
5905992314,4cyclictest0-21swapper/123:10:161
5905992312,5cyclictest0-21swapper/121:31:171
590599230,16cyclictest32082-21apache_processe20:55:131
589999231,20cyclictest0-21swapper/021:10:160
590999220,18cyclictest0-21swapper/223:08:262
590599223,15cyclictest0-21swapper/119:43:511
5905992216,5cyclictest29431-21nfsd419:50:191
5905992215,6cyclictest3301-21timerandwakeup20:00:241
5905992213,8cyclictest4530-21H212:26:331
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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