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2026-04-18 - 21:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sat Apr 18, 2026 12:46:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4297992514,6cyclictest19967-21nfsd409:30:171
430399220,1cyclictest0-21swapper/209:39:422
4297992218,3cyclictest24283-21awk12:30:181
429799214,16cyclictest4838-21acpi09:05:121
429799214,16cyclictest3336-21dpkg10:00:021
429799214,16cyclictest1360-21cut10:55:001
429799213,16cyclictest399-20systemd-journal08:21:221
4297992118,2cyclictest8298-21sed07:15:181
4297992118,2cyclictest7036-21sed07:15:011
4297992118,2cyclictest23311-21grep08:40:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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