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2026-05-26 - 18:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Tue May 26, 2026 12:46:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7364992321,0cyclictest0-21swapper/109:11:561
736499230,5cyclictest0-21swapper/110:14:391
7362992220,1cyclictest1100-21snmpd10:50:180
7364992114,6cyclictest0-21swapper/109:43:391
736499210,17cyclictest0-21swapper/111:08:591
736299214,13cyclictest0-21swapper/012:15:420
736299211,5cyclictest0-21swapper/007:35:210
7365992017,2cyclictest11992-21nfsd407:15:172
7365992016,3cyclictest0-21swapper/208:24:592
736299204,15cyclictest12529-21sessionclean10:09:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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