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2026-05-08 - 13:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri May 08, 2026 00:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1627993229,1cyclictest0-21swapper/022:00:150
162999230,5cyclictest0-21swapper/222:16:182
162899230,5cyclictest0-21swapper/121:40:441
162899220,21cyclictest843-21systemd-network21:48:291
162899220,18cyclictest0-21swapper/122:22:491
162999212,16cyclictest0-21swapper/219:29:032
162799210,3cyclictest0-21swapper/021:07:510
162899203,2cyclictest16166-21ntp_kernel_pll_23:20:181
1628992018,1cyclictest0-21swapper/122:15:151
162799202,2cyclictest0-21swapper/022:14:090
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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