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2026-05-11 - 14:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Mon May 11, 2026 00:46:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2601499250,1cyclictest0-21swapper/219:56:362
2600699248,14cyclictest0-21swapper/000:20:200
2601099220,18cyclictest0-21swapper/122:07:071
2601499214,16cyclictest0-21swapper/222:07:562
2601499204,1cyclictest0-21swapper/222:32:542
2601499204,15cyclictest0-21swapper/222:48:002
2601499204,15cyclictest0-21swapper/219:32:592
2601499202,17cyclictest0-21swapper/200:24:362
26014992017,2cyclictest5858-21ntp_kernel_err22:20:202
2601099203,2cyclictest13489-21latency_hist19:45:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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