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2026-04-03 - 20:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri Apr 03, 2026 12:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
534599261,6cyclictest0-21swapper/108:40:011
534599232,2cyclictest9391-21cstates09:10:141
5345992215,6cyclictest20924-21seq11:20:541
534599221,1cyclictest0-21swapper/108:23:511
534599220,4cyclictest455-21plymouthd10:24:441
534599220,2cyclictest9675-21grep07:15:161
534599220,2cyclictest4705-21nfsd411:50:171
534599220,2cyclictest24738-21expr11:30:131
534599220,2cyclictest14615-21apache_accesses09:20:101
534599220,20cyclictest0-21swapper/107:26:481
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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