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2025-09-17 - 00:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Tue Sep 16, 2025 12:46:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2030699234,18cyclictest0-21swapper/008:49:060
2030899220,21cyclictest823-21systemd-network11:01:442
2030899220,18cyclictest0-21swapper/210:32:002
2030899200,20cyclictest0-21swapper/208:52:492
2030899200,18cyclictest3245-21apache208:25:012
2030799203,16cyclictest1-21systemd10:05:011
2030899192,1cyclictest0-21swapper/207:23:312
20308991917,1cyclictest0-21swapper/209:04:302
20308991915,3cyclictest4734-21smtp07:39:282
20307991917,1cyclictest0-21swapper/111:10:361
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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