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2026-04-07 - 01:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Mon Apr 06, 2026 12:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9474992220,1cyclictest21-21ksoftirqd/108:45:461
9473992213,5cyclictest0-21swapper/010:55:180
947399214,11cyclictest5378-21python309:55:010
9473992114,4cyclictest0-21swapper/008:25:130
947399210,20cyclictest843-21systemd-network07:28:050
947499200,1cyclictest0-21swapper/109:25:421
9478991916,2cyclictest26898-21processes08:35:192
947899191,17cyclictest16323-21cat11:10:012
9474991917,1cyclictest0-21swapper/111:19:541
947499191,16cyclictest1829-21systemd-journal11:05:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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