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2026-05-12 - 04:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Tue May 12, 2026 00:45:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2763521280,1sleep41051-21sshd22:55:064
1331421260,2sleep63249599cyclictest22:18:466
1431021160,0sleep50-21swapper/523:14:475
1431021160,0sleep50-21swapper/523:14:475
1145721160,0sleep00-21swapper/022:27:050
3189821090,0sleep40-21swapper/423:49:404
240312840,0sleep10-21swapper/123:39:031
303092830,0sleep40-21swapper/422:02:414
139962830,0sleep60-21swapper/623:57:126
73832820,0sleep00-21swapper/021:44:330
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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