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2026-04-03 - 19:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Fri Apr 03, 2026 12:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
182592810,0sleep30-21swapper/311:08:063
276322790,1sleep50-21swapper/511:00:245
238382790,4sleep1144299cyclictest12:28:581
168812790,0sleep30-21swapper/307:40:143
57142780,0sleep20-21swapper/209:15:382
57142780,0sleep20-21swapper/209:15:382
302142780,0sleep00-21swapper/009:50:060
314032760,1sleep40-21swapper/411:18:504
57462750,0sleep50-21swapper/511:15:145
27382750,0sleep60-21swapper/610:17:136
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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