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2026-05-11 - 00:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Sun May 10, 2026 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2584921250,0sleep325848-21sshd10:27:153
2526721130,0sleep50-21swapper/509:14:325
2526721130,0sleep50-21swapper/509:14:325
70672800,0sleep60-21swapper/609:43:426
295252780,1sleep00-21swapper/010:09:400
200942780,0sleep20-21swapper/209:27:192
168892780,0sleep70-21swapper/711:25:127
73072760,0sleep10-21swapper/112:37:041
173552760,0sleep10-21swapper/110:48:531
91352740,1sleep40-21swapper/411:46:584
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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