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2026-08-28 - 22:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Fri Aug 28, 2026 12:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
534121380,0sleep50-21swapper/509:59:065
2625621180,0sleep00-21swapper/011:01:360
2559621120,0sleep00-21swapper/011:57:460
2559621120,0sleep00-21swapper/011:57:460
762421110,0sleep70-21swapper/711:07:197
274632920,1sleep50-21swapper/512:34:145
190702780,0sleep10-21swapper/110:40:371
239932770,1sleep10-21swapper/110:57:201
256932750,0sleep10-21swapper/109:13:431
8332740,0sleep00-21swapper/012:38:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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