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2025-11-23 - 08:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Sun Nov 23, 2025 00:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1686521190,0sleep40-21swapper/422:27:144
1686521190,0sleep40-21swapper/422:27:134
1521021160,0sleep00-21swapper/021:32:510
30912880,3sleep31542599cyclictest00:28:063
271022870,1sleep50-21swapper/522:25:065
271022870,1sleep50-21swapper/522:25:065
128682830,1sleep70-21swapper/722:30:057
199122820,3sleep41543699cyclictest00:29:514
228462800,0sleep40-21swapper/422:21:214
228462800,0sleep40-21swapper/422:21:214
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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