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2026-08-19 - 18:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Wed Aug 19, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2619021420,0sleep226189-21sshd11:05:202
2619021420,0sleep226189-21sshd11:05:202
1179621040,0sleep00-21swapper/011:07:430
1179621040,0sleep00-21swapper/011:07:430
106382820,0sleep60-21swapper/612:32:526
221652800,0sleep40-21swapper/409:44:044
279472770,1sleep70-21swapper/710:25:117
277262770,0sleep50-21swapper/511:09:495
277262770,0sleep50-21swapper/511:09:485
41022760,0sleep00-21swapper/009:57:540
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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