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2026-05-29 - 16:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Fri May 29, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
83192840,0sleep60-21swapper/611:54:446
83192840,0sleep60-21swapper/611:54:446
305672830,0sleep30-21swapper/312:02:343
305672830,0sleep30-21swapper/312:02:343
108812820,0sleep50-21swapper/510:25:165
80532780,0sleep70-21swapper/711:26:087
280972770,0sleep50-21swapper/511:34:005
157792760,4sleep23046099cyclictest10:45:002
228492750,1sleep451-21ksoftirqd/411:00:094
54512740,0sleep10-21swapper/111:44:531
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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