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2025-06-29 - 00:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Sat Jun 28, 2025 12:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1835421520,2sleep1398899cyclictest09:45:441
1719021430,0sleep70-21swapper/712:25:247
2686321190,0sleep20-21swapper/212:03:552
2355121190,1sleep5581rcuc/511:11:495
2167121170,3sleep5401299cyclictest11:53:565
211522770,1sleep41036-21runrttasks09:50:534
159252770,0sleep10-21swapper/109:26:371
30172760,0sleep20-21swapper/211:46:242
30172760,0sleep20-21swapper/211:46:242
286832760,0sleep50-21swapper/512:13:205
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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