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2026-05-25 - 06:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Mon May 25, 2026 00:45:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3239521420,0sleep00-21swapper/000:39:590
803021240,0sleep30-21swapper/322:56:303
2305021140,0sleep50-21swapper/522:59:065
1793321140,0sleep20-21swapper/223:42:052
2415621050,0sleep40-21swapper/423:06:024
322162870,4sleep62265799cyclictest21:28:026
61872850,1sleep30-21swapper/321:30:073
12652850,0sleep30-21swapper/322:21:373
12652850,0sleep30-21swapper/322:21:363
323992830,1sleep632404-21sshd22:28:296
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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