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2026-07-08 - 01:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Wed Jul 08, 2026 00:45:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2895521250,0sleep40-21swapper/423:24:414
2205821210,0sleep70-21swapper/721:12:207
2789221200,0sleep30-21swapper/300:08:083
2355021200,0sleep623549-21sshd22:45:576
294662960,0sleep30-21swapper/323:11:183
146062940,0sleep10-21swapper/122:53:541
146062940,0sleep10-21swapper/122:53:531
318562900,0sleep20-21swapper/223:41:302
243712880,0sleep70-21swapper/721:59:177
178322880,0sleep60-21swapper/600:00:506
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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