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2026-04-18 - 00:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Fri Apr 17, 2026 12:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
316332860,0sleep70-21swapper/709:35:527
122452810,0sleep70-21swapper/710:50:137
77212800,0sleep70-21swapper/708:05:137
15922780,1sleep2761-21systemd-logind10:16:572
320942770,0sleep00-21swapper/010:57:270
320382760,0sleep00-21swapper/011:06:250
284912750,1sleep6671rcuc/611:24:096
206952720,1sleep20-21swapper/212:26:242
249322710,0sleep50-21swapper/509:16:575
199992700,0sleep40-21swapper/411:45:224
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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