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2026-05-22 - 13:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Fri May 22, 2026 12:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1732921610,4sleep62977899cyclictest10:53:586
2800021460,2sleep7761rcuc/707:05:147
273972840,0sleep40-21swapper/411:59:514
180802830,0sleep50-21swapper/511:07:515
69872760,0sleep30-21swapper/310:20:213
211822750,0sleep00-21swapper/012:35:370
317002740,0sleep10-21swapper/109:47:261
127312740,0sleep70-21swapper/712:39:147
109342740,0sleep00-21swapper/012:11:090
73082730,0sleep50-21swapper/510:43:235
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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