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2026-09-07 - 01:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Mon Sep 07, 2026 00:45:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1363921720,5sleep31836099cyclictest00:32:053
845921600,4sleep41836699cyclictest00:20:044
2032521480,3sleep51837199cyclictest21:12:025
2725321390,3sleep31836099cyclictest23:50:373
1737921180,0sleep20-21swapper/221:13:362
431721000,0sleep10-21swapper/123:25:511
243332980,2sleep10-21swapper/100:17:281
324452890,1sleep532439-21sshd22:28:255
57712880,0sleep70-21swapper/721:11:177
149492850,1sleep6726-21gdbus00:06:516
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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