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2026-04-30 - 04:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Thu Apr 30, 2026 00:45:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1741921180,0sleep70-21swapper/721:19:287
998721160,1sleep2311rcuc/222:46:352
303602860,0sleep1221rcuc/123:30:341
87492830,0sleep60-21swapper/623:17:256
87492830,0sleep60-21swapper/623:17:246
38232820,0sleep30-21swapper/300:25:583
38232820,0sleep30-21swapper/300:25:583
261372810,0sleep20-21swapper/222:40:342
314882800,0sleep50-21swapper/523:32:225
22682800,1sleep22269-21sshd22:34:082
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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