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2026-08-04 - 11:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Tue Aug 04, 2026 00:45:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2038621370,0sleep30-21swapper/323:42:293
381921240,0sleep70-21swapper/723:12:527
2566821220,0sleep7761rcuc/723:07:157
276221150,4sleep11813099cyclictest23:29:451
3139721110,0sleep70-21swapper/721:21:047
3139721110,0sleep70-21swapper/721:21:047
316822900,1sleep531680-21sshd22:15:115
100722890,0sleep40-21swapper/400:30:554
171342880,9sleep40-21swapper/419:05:194
132022850,1sleep613195-21cp00:31:056
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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