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2026-04-06 - 23:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Mon Apr 06, 2026 12:45:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
135462860,0sleep40-21swapper/411:23:224
129432860,0sleep50-21swapper/510:46:205
129432860,0sleep50-21swapper/510:46:205
191032840,0sleep70-21swapper/710:24:267
62162800,4sleep31591499cyclictest09:27:413
160162800,4sleep51592599cyclictest10:37:385
253262780,0sleep00-21swapper/010:39:010
19962760,0sleep50-21swapper/509:27:025
79252750,0sleep10-21swapper/110:09:051
246362750,0sleep60-21swapper/607:25:186
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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