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2026-05-19 - 18:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Tue May 19, 2026 12:45:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
427421080,0sleep70-21swapper/709:39:087
53882890,1sleep50-21swapper/509:25:205
36392860,0sleep10-21swapper/111:11:111
36392860,0sleep10-21swapper/111:11:101
180922830,0sleep6671rcuc/610:54:566
258672800,1sleep40-21swapper/411:37:354
161002780,0sleep00-21swapper/010:03:540
278102770,2sleep727819-21cpuspeed_turbos10:10:097
120322760,0sleep40-21swapper/412:17:174
161602740,0sleep30-21swapper/309:26:543
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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