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2026-07-23 - 06:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Thu Jul 23, 2026 00:45:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2026621450,0sleep60-21swapper/621:11:476
2026621450,0sleep60-21swapper/621:11:476
484621260,0sleep04839-21cp23:03:530
3110221150,0sleep40-21swapper/422:51:304
69852910,1sleep40-21swapper/421:50:164
104742880,0sleep60-21swapper/622:05:496
47072830,0sleep50-21swapper/500:22:205
273822820,0sleep10-21swapper/121:19:031
273822820,0sleep10-21swapper/121:19:021
56202800,1sleep0121rcuc/021:29:430
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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