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2026-05-14 - 17:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Thu May 14, 2026 12:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2176921120,1sleep70-21swapper/712:24:287
2176921120,1sleep70-21swapper/712:24:277
1249321050,0sleep40-21swapper/410:34:294
167962840,1sleep40-21swapper/410:03:264
74682780,1sleep07404-21sshd11:55:110
91302770,0sleep40-21swapper/411:00:584
91302770,0sleep40-21swapper/411:00:584
269712770,1sleep61014-21runrttasks11:21:356
146452770,1sleep40-21swapper/410:07:364
141382770,1sleep60-21swapper/611:42:276
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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