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2026-08-10 - 13:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Mon Aug 10, 2026 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1731621160,0sleep60-21swapper/612:12:486
313602850,1sleep60-21swapper/609:18:186
3442820,1sleep00-21swapper/010:40:180
12632790,0sleep70-21swapper/709:14:347
262742780,0sleep20-21swapper/212:09:562
194682780,0sleep00-21swapper/010:55:090
66532770,0sleep20-21swapper/212:03:152
126892740,0sleep10-21swapper/112:12:111
40322730,0sleep50-21swapper/509:14:575
283032730,0sleep50-21swapper/510:06:575
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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