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2026-03-10 - 22:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Tue Mar 10, 2026 12:45:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2271821100,0sleep10-21swapper/111:24:031
117212800,1sleep711723-21timerandwakeup12:05:207
87132790,4sleep52652399cyclictest12:24:185
318452790,0sleep50-21swapper/509:16:165
187662790,0sleep20-21swapper/212:01:392
284082760,0sleep00-21swapper/009:20:280
144752720,4sleep32650999cyclictest12:20:153
226172710,0sleep50-21swapper/510:26:295
84032700,0sleep70-21swapper/710:29:197
41332700,1sleep50-21swapper/509:12:155
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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