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2026-05-21 - 23:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Thu May 21, 2026 12:45:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
546021170,0sleep30-21swapper/311:31:263
230772830,1sleep5581rcuc/512:11:435
230772830,1sleep5581rcuc/512:11:435
93242820,0sleep60-21swapper/611:50:536
321632800,0sleep10-21swapper/110:24:491
222912780,0sleep70-21swapper/712:25:397
190332770,0sleep60-21swapper/608:40:126
108072760,1sleep50-21swapper/510:59:245
108072760,1sleep50-21swapper/510:59:235
111312750,0sleep50-21swapper/512:38:205
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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