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2026-05-13 - 04:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Wed May 13, 2026 00:45:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2630821330,0sleep626307-21grep22:35:246
1102921160,0sleep30-21swapper/300:05:383
2467221150,0sleep00-21swapper/022:57:140
1420121130,3sleep7272399cyclictest23:16:537
1420121130,3sleep7272399cyclictest23:16:537
168121080,0sleep30-21swapper/322:25:433
144022860,1sleep5681-21dbus-daemon23:23:405
233222840,0sleep70-21swapper/722:35:177
325032830,0sleep70-21swapper/722:22:197
291742830,1sleep6761-21systemd-logind00:21:516
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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