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2026-05-08 - 22:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Fri May 08, 2026 12:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30182800,0sleep70-21swapper/711:39:577
81132770,4sleep5505999cyclictest11:54:145
56152770,1sleep50-21swapper/511:58:235
127632770,0sleep10-21swapper/111:18:351
26272730,1sleep50-21swapper/512:11:295
63192710,0sleep40-21swapper/410:14:104
91792700,0sleep70-21swapper/712:12:267
104242700,1sleep30-21swapper/309:25:043
87332690,0sleep20-21swapper/210:05:192
87332690,0sleep20-21swapper/210:05:192
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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