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2026-06-01 - 17:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Mon Jun 01, 2026 12:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2284621450,3sleep31390399cyclictest09:40:183
1053721370,3sleep11389099cyclictest10:16:141
2203321230,0sleep20-21swapper/209:16:362
570921140,0sleep50-21swapper/511:02:505
163792850,1sleep30-21swapper/309:39:303
29662820,0sleep50-21swapper/509:18:395
48452780,1sleep60-21swapper/610:25:016
284262780,0sleep10-21swapper/112:12:261
62792740,0sleep60-21swapper/612:09:196
237992730,0sleep50-21swapper/510:46:315
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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