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2026-04-29 - 18:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot0.osadl.org (updated Wed Apr 29, 2026 12:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
819021420,4sleep2284799cyclictest12:08:182
2394521390,2sleep6287499cyclictest09:46:216
313021160,0sleep70-21swapper/711:20:557
55042900,0sleep30-21swapper/309:34:313
55042900,0sleep30-21swapper/309:34:313
169652760,0sleep10-21swapper/110:31:521
6452750,0sleep40-21swapper/412:11:494
44352750,1sleep40-21swapper/411:07:144
245132750,0sleep7771ktimersoftd/709:23:147
298392740,0sleep40-21swapper/411:34:144
218202730,0sleep40-21swapper/412:00:514
3482710,1sleep50-21swapper/509:57:025
19642710,3sleep3285399cyclictest10:11:103
93972700,0sleep20-21swapper/211:31:072
315612700,0sleep10-21swapper/108:06:081
313392700,0sleep70-21swapper/712:25:307
293072700,0sleep2311rcuc/210:05:482
79212690,0sleep40-21swapper/411:45:044
36072690,0sleep00-21swapper/011:35:070
210002690,0sleep70-21swapper/709:36:367
210002690,0sleep70-21swapper/709:36:367
83682680,0sleep70-21swapper/712:03:427
34482680,0sleep00-21swapper/009:57:290
141132680,1sleep20-21swapper/211:36:292
251726341,6sleep00-21swapper/007:08:560
117032630,0sleep00-21swapper/011:17:350
247652600,0sleep70-21swapper/710:23:487
252225848,6sleep50-21swapper/507:09:015
237225848,6sleep30-21swapper/307:07:073
45202570,0sleep10-21swapper/111:02:381
233525028,7sleep40-21swapper/407:06:354
238424837,7sleep60-21swapper/607:07:096
242324736,7sleep70-21swapper/707:07:437
240724332,7sleep20-21swapper/207:07:292
120892430,0sleep40-21swapper/411:17:394
241724130,7sleep10-21swapper/107:07:361
284799252,4cyclictest33-21ksoftirqd/210:52:182
284799250,6cyclictest33-21ksoftirqd/210:49:222
284799250,6cyclictest33-21ksoftirqd/210:49:222
111682230,1sleep30-21swapper/309:49:223
96542220,0sleep10-21swapper/109:58:271
284799220,21cyclictest0-21swapper/209:24:452
284799220,1cyclictest0-21swapper/210:55:132
284799220,1cyclictest0-21swapper/210:55:122
86842200,0sleep1231ktimersoftd/111:40:201
38422200,1sleep7771ktimersoftd/710:34:467
2836992014,5cyclictest681-21dbus-daemon11:41:400
243662200,0sleep70-21swapper/711:42:437
195142190,4sleep50-21swapper/510:46:075
195142190,4sleep50-21swapper/510:46:065
151812190,1sleep50-21swapper/510:36:135
83792180,0sleep00-21swapper/009:30:120
83792180,0sleep00-21swapper/009:30:120
267922180,1sleep2321ktimersoftd/211:05:422
200442180,1sleep70-21swapper/710:00:007
139612180,0sleep50-21swapper/511:59:555
86552170,0sleep70-21swapper/710:02:567
250742170,1sleep30-21swapper/310:33:063
244732170,0sleep40-21swapper/410:23:464
2874991611,1cyclictest23150-21sshd12:24:336
286799160,1cyclictest0-21swapper/512:14:275
284799160,9cyclictest0-21swapper/209:08:022
185112160,1sleep7771ktimersoftd/711:46:277
2879991513,1cyclictest771ktimersoftd/712:19:287
2879991513,1cyclictest771ktimersoftd/712:19:287
2874991511,2cyclictest0-21swapper/612:01:526
2874991511,2cyclictest0-21swapper/611:58:146
2867991511,2cyclictest0-21swapper/510:29:465
286199150,13cyclictest0-21swapper/410:42:544
286199150,13cyclictest0-21swapper/409:17:574
284799150,5cyclictest91rcu_preempt12:19:252
284799150,5cyclictest91rcu_preempt12:19:252
284799150,2cyclictest0-21swapper/208:26:262
2836991511,2cyclictest658-21polkitd09:21:320
283699150,13cyclictest0-21swapper/009:40:460
190152150,0sleep00-21swapper/012:19:140
190152150,0sleep00-21swapper/012:19:140
35362140,0sleep30-21swapper/312:02:583
287999142,6cyclictest0-21swapper/710:56:037
287999142,6cyclictest0-21swapper/710:56:037
2879991411,1cyclictest6804-21gdbus10:38:587
287999140,12cyclictest0-21swapper/712:06:537
287999140,12cyclictest0-21swapper/709:11:447
2874991411,2cyclictest7857-21sshd12:26:516
2874991411,2cyclictest0-21swapper/609:39:566
2874991411,2cyclictest0-21swapper/609:39:556
2874991411,1cyclictest0-21swapper/611:12:236
2874991410,3cyclictest0-21swapper/610:38:316
287499140,12cyclictest0-21swapper/611:31:446
284799148,1cyclictest33-21ksoftirqd/212:20:092
284799148,0cyclictest33-21ksoftirqd/211:48:472
284799147,6cyclictest0-21swapper/209:56:312
284799147,6cyclictest0-21swapper/208:51:302
284799143,4cyclictest101rcu_sched11:42:552
284799142,6cyclictest0-21swapper/209:44:582
284799140,8cyclictest0-21swapper/211:28:092
284799140,8cyclictest0-21swapper/208:17:182
284799140,8cyclictest0-21swapper/207:31:482
284799140,8cyclictest0-21swapper/207:15:262
284799140,7cyclictest0-21swapper/211:23:172
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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