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2025-12-21 - 17:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot0.osadl.org (updated Sun Dec 21, 2025 12:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1830121170,1sleep40-21swapper/410:52:194
69142950,1sleep56919-21gltestperf12:00:145
288792770,0sleep40-21swapper/410:05:234
165802730,0sleep30-21swapper/309:51:433
145232720,0sleep70-21swapper/711:21:387
250192710,0sleep10-21swapper/108:35:141
141712690,1sleep6681ktimersoftd/610:30:496
270092680,0sleep20-21swapper/211:05:152
114572680,0sleep70-21swapper/712:01:297
299412620,0sleep60-21swapper/610:05:406
1464026149,7sleep70-21swapper/707:05:257
1473226050,6sleep60-21swapper/607:06:356
1464425848,6sleep00-21swapper/007:05:260
1491825747,6sleep10-21swapper/107:08:541
1430625228,7sleep50-21swapper/507:05:225
121352520,0sleep30-21swapper/311:41:143
1492924736,7sleep30-21swapper/307:09:053
1486824131,6sleep40-21swapper/407:08:174
1479223928,7sleep20-21swapper/207:07:192
1525499283,19cyclictest0-21swapper/411:32:504
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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