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2026-02-05 - 11:59
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #0

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System r0s0s.osadl.org (updated Thu Feb 05, 2026 00:46:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2839912346332,10sleep20-21swapper/219:05:232
2851012297289,5sleep10-21swapper/119:05:551
2851772292257,27sleep50-21swapper/519:06:555
2851762290273,10sleep40-21swapper/419:06:544
2851282288268,13sleep70-21swapper/719:06:177
2853072287268,12sleep30-21swapper/319:08:453
2852542286267,12sleep60-21swapper/619:08:006
2851122285266,12sleep00-21swapper/019:06:010
28586799340,33cyclictest0-21swapper/300:07:013
28587199330,30cyclictest0-21swapper/719:49:337
285869993330,2cyclictest449069-21snmpd23:44:305
285869993330,2cyclictest322799-21cat20:20:145
285869993330,2cyclictest286539-21cat19:10:155
285869993330,2cyclictest286539-21cat19:10:155
285868993330,2cyclictest449069-21snmpd19:51:294
285868993330,2cyclictest350643-21ntpq21:15:234
285867993330,2cyclictest449069-21snmpd19:14:113
285867993330,2cyclictest449069-21snmpd19:14:103
285867993330,2cyclictest449069-21snmpd00:22:103
285867993328,4cyclictest449069-21snmpd23:54:403
285867993328,4cyclictest449069-21snmpd00:28:143
28586799330,32cyclictest0-21swapper/322:09:273
28586799330,30cyclictest0-21swapper/323:58:573
285866993330,2cyclictest449069-21snmpd22:59:392
285866993330,2cyclictest449069-21snmpd22:59:392
285866993330,2cyclictest449069-21snmpd22:23:302
285866993330,2cyclictest449069-21snmpd21:26:422
285866993330,2cyclictest449069-21snmpd20:18:162
285866993330,2cyclictest413604-21cat23:20:142
28586699330,31cyclictest0-21swapper/200:25:552
285865993330,2cyclictest449069-21snmpd23:13:381
285865993330,2cyclictest432545-21kworker/u16:3+flush-8:000:35:011
285865993330,2cyclictest277647-21kworker/u16:1+flush-8:019:45:001
285864993330,2cyclictest449069-21snmpd20:58:590
28586499330,30cyclictest0-21swapper/022:53:040
285871993230,2cyclictest449069-21snmpd22:29:357
285871993230,2cyclictest449069-21snmpd21:31:427
285871993230,1cyclictest449069-21snmpd22:57:477
285871993230,1cyclictest449069-21snmpd22:57:467
285871993230,1cyclictest449069-21snmpd20:22:077
285871993229,2cyclictest337770-21cat20:50:157
28587199320,31cyclictest0-21swapper/723:16:097
28587199320,31cyclictest0-21swapper/721:47:187
28587199320,31cyclictest0-21swapper/720:55:157
28587199320,31cyclictest0-21swapper/719:25:147
28587199320,30cyclictest0-21swapper/723:36:007
28587199320,30cyclictest0-21swapper/722:37:507
285870993230,2cyclictest449069-21snmpd21:00:406
285870993230,2cyclictest449069-21snmpd20:03:596
285870993230,2cyclictest322787-21cat20:20:156
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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