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2025-09-03 - 21:09

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot1s.osadl.org (updated Wed Sep 03, 2025 12:45:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
720799132130,2cyclictest0-21swapper/508:49:515
7213991301,128cyclictest0-21swapper/608:46:456
719099129127,1cyclictest29-21ksoftirqd/208:46:452
7220991280,1cyclictest0-21swapper/709:55:097
7207991280,127cyclictest0-21swapper/507:42:345
720099128125,2cyclictest0-21swapper/410:04:294
720099128125,2cyclictest0-21swapper/410:04:294
719599128127,0cyclictest37-21ksoftirqd/307:42:023
719599128126,1cyclictest37-21ksoftirqd/312:16:393
719099128126,1cyclictest29-21ksoftirqd/210:50:272
719599127125,1cyclictest37-21ksoftirqd/310:27:373
721399126124,1cyclictest61-21ksoftirqd/611:51:066
7213991260,125cyclictest28042-21chk_conn_tcp07:54:266
7213991260,125cyclictest0-21swapper/611:10:106
7207991260,125cyclictest0-21swapper/511:43:195
719099126124,1cyclictest29-21ksoftirqd/207:54:262
718399126125,0cyclictest21-21ksoftirqd/110:53:141
718399126124,1cyclictest21-21ksoftirqd/110:11:271
721399125123,1cyclictest0-21swapper/612:28:276
7213991250,124cyclictest0-21swapper/610:42:396
720799125124,1cyclictest0-21swapper/511:29:505
722099124123,1cyclictest0-21swapper/707:21:167
7213991240,123cyclictest0-21swapper/611:44:356
718399124122,1cyclictest21-21ksoftirqd/111:32:301
717499124123,0cyclictest3-21ksoftirqd/009:48:570
720099123120,2cyclictest0-21swapper/412:24:164
719099123123,0cyclictest29-21ksoftirqd/211:10:102
719099123121,1cyclictest29735-21chk_conn_tcp11:51:062
718399123122,0cyclictest21-21ksoftirqd/110:21:001
717499123121,1cyclictest14287-21chk_conn_tcp12:10:320
720799122121,1cyclictest0-21swapper/508:29:015
720099122121,1cyclictest0-21swapper/407:41:244
720099122120,1cyclictest0-21swapper/407:13:204
719099122122,0cyclictest29-21ksoftirqd/211:44:352
719099122122,0cyclictest29-21ksoftirqd/210:42:392
719099122120,1cyclictest29-21ksoftirqd/212:28:262
718399122122,0cyclictest21-21ksoftirqd/107:14:501
718399122121,1cyclictest21-21ksoftirqd/109:28:411
718399122120,1cyclictest21-21ksoftirqd/111:23:511
717499122121,0cyclictest3-21ksoftirqd/007:52:450
721399121120,1cyclictest0-21swapper/611:18:146
720799121120,1cyclictest0-21swapper/512:11:415
720799121119,1cyclictest0-21swapper/512:28:215
719599121121,0cyclictest37-21ksoftirqd/309:32:473
718399121119,1cyclictest21-21ksoftirqd/111:11:451
722099120118,1cyclictest0-21swapper/709:11:557
720099120118,1cyclictest0-21swapper/409:34:214
720099120117,2cyclictest0-21swapper/410:17:414
722099119116,2cyclictest0-21swapper/712:37:577
722099119116,2cyclictest0-21swapper/708:42:417
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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