You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-05-02 - 12:29

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #0, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot1s.osadl.org (updated Fri May 02, 2025 00:45:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2540299135133,1cyclictest0-21swapper/419:16:254
2540899132130,1cyclictest0-21swapper/522:47:595
25419991300,129cyclictest0-21swapper/723:13:427
25413991300,129cyclictest0-21swapper/619:55:486
25408991300,129cyclictest0-21swapper/520:15:075
2539599130125,4cyclictest37-21ksoftirqd/319:32:093
2538099130125,5cyclictest21-21ksoftirqd/122:16:471
2540899129127,1cyclictest0-21swapper/500:31:175
2540899128127,1cyclictest0-21swapper/521:16:105
2540899128125,2cyclictest0-21swapper/521:07:185
2540299128127,0cyclictest45-21ksoftirqd/419:57:254
2541999127125,1cyclictest0-21swapper/723:04:237
2541999127125,1cyclictest0-21swapper/700:25:087
25413991270,126cyclictest0-21swapper/623:35:096
25413991270,126cyclictest0-21swapper/623:35:096
2538099127126,0cyclictest21-21ksoftirqd/100:16:251
2538099127125,1cyclictest21-21ksoftirqd/100:24:561
25373991270,1cyclictest0-21swapper/023:27:190
2541999126124,1cyclictest0-21swapper/719:53:037
2541399126125,1cyclictest0-21swapper/623:24:526
2541399126124,1cyclictest0-21swapper/623:25:086
2541399126124,1cyclictest0-21swapper/619:44:346
25413991260,125cyclictest0-21swapper/619:30:086
2540899126125,1cyclictest0-21swapper/523:01:165
2539599126121,5cyclictest37-21ksoftirqd/320:24:223
2538899126126,0cyclictest29-21ksoftirqd/219:55:272
2538099126125,0cyclictest21-21ksoftirqd/119:43:441
2537399126126,0cyclictest3-21ksoftirqd/021:02:520
2541999125123,1cyclictest0-21swapper/721:09:157
2541999125123,1cyclictest0-21swapper/720:06:537
25419991250,1cyclictest0-21swapper/723:51:227
25408991250,1cyclictest0-21swapper/523:51:235
2539599125124,0cyclictest37-21ksoftirqd/322:42:593
2537399125125,0cyclictest3-21ksoftirqd/022:06:000
2541999124122,1cyclictest0-21swapper/723:31:477
25419991240,123cyclictest0-21swapper/722:41:017
2541399124123,1cyclictest61-21ksoftirqd/623:57:266
2540899124122,1cyclictest0-21swapper/500:11:085
25408991240,123cyclictest4758-21chk_conn_tcp19:55:545
2539599124124,0cyclictest37-21ksoftirqd/322:50:153
2538899124124,0cyclictest29-21ksoftirqd/223:02:272
2538899124124,0cyclictest29-21ksoftirqd/219:51:272
2538899124124,0cyclictest29-21ksoftirqd/200:25:122
2538899124123,0cyclictest29-21ksoftirqd/222:53:332
2537399124122,1cyclictest3-21ksoftirqd/019:31:420
2537399124122,1cyclictest0-21swapper/000:29:400
2541999123120,2cyclictest0-21swapper/721:45:057
2541999123120,2cyclictest0-21swapper/719:45:367
2541399123120,2cyclictest0-21swapper/623:33:506
2540899123122,1cyclictest0-21swapper/521:45:075
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional