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2025-11-29 - 06:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Fri Nov 28, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3445394996156,4cyclictest3812395-21latency_hist18:23:077
344499226151,7sleep40-21swapper/415:21:494
344486925623,29sleep70-21swapper/715:20:077
3445388995249,2cyclictest3751682-21kworker/u16:0+flush-8:018:48:075
344502425242,7sleep60-21swapper/615:22:156
344496325141,7sleep50-21swapper/515:21:265
3445383995046,3cyclictest3691715-21kworker/u16:3+flush-8:019:48:224
3445394994136,4cyclictest3539897-21latency_hist16:08:077
3445388994139,2cyclictest3981081-21kworker/u16:0+flush-8:020:08:075
3445388994139,2cyclictest3981081-21kworker/u16:0+flush-8:020:08:075
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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