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2025-12-08 - 19:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Mon Dec 08, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
229160126151,7sleep40-21swapper/415:22:124
229157625747,7sleep60-21swapper/615:21:506
2291930995553,2cyclictest2749386-21kworker/u16:5+events_unbound19:22:535
229158425545,7sleep50-21swapper/515:21:575
2291930995250,2cyclictest2788357-21kworker/u16:0+events_unbound20:22:555
229143024815,29sleep70-21swapper/715:19:517
2291937994539,5cyclictest2608396-21latency_hist17:57:277
2291937994140,0cyclictest0-21swapper/718:24:377
2291937994039,0cyclictest0-21swapper/716:12:307
2291935994037,2cyclictest2657801-21kworker/u16:1+flush-8:018:32:296
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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