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2026-09-14 - 18:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Mon Sep 14, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
100586221480,1sleep71005861-21ssh09:16:497
13156032970,1sleep71315604-21sh11:24:077
74538925025,8sleep40-21swapper/407:07:234
74545724737,7sleep50-21swapper/507:08:205
745860994538,5cyclictest866141-21latency_hist08:09:447
745848994442,2cyclictest1155815-21kworker/u16:2+events_unbound11:59:585
745843994239,3cyclictest969543-21kworker/u16:2+flush-8:009:24:454
7422162423,29sleep70-21swapper/707:05:097
745848993937,2cyclictest1290202-21kworker/u16:0+flush-8:011:30:105
745848993937,2cyclictest1155815-21kworker/u16:2+events_unbound11:58:225
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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