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2025-11-20 - 04:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Thu Nov 20, 2025 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
399086825948,7sleep50-21swapper/503:18:455
399086825948,7sleep50-21swapper/503:18:455
4000903995550,4cyclictest200216-21latency_hist07:13:417
4000901995349,3cyclictest109414-21kworker/u16:4+flush-8:006:38:416
400047825218,30sleep70-21swapper/703:23:047
400047825218,30sleep70-21swapper/703:23:047
4000900994946,3cyclictest290808-21kworker/u16:3+flush-8:008:48:405
4000901994642,3cyclictest109414-21kworker/u16:4+flush-8:007:03:416
4000900994442,2cyclictest4049775-21kworker/u16:1+flush-8:004:38:415
4000901994037,2cyclictest109414-21kworker/u16:4+events_unbound07:53:516
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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