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2026-05-29 - 21:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Fri May 29, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
385084021000,1sleep73850841-21ssh11:33:217
36704082960,1sleep73670409-21rm10:18:357
39364542930,0sleep60-21swapper/612:10:476
3336818996663,2cyclictest3934299-21smartctl12:07:327
333628325746,7sleep50-21swapper/507:03:465
333649924937,8sleep40-21swapper/407:06:504
3336818994342,0cyclictest0-21swapper/709:52:047
3336803994240,2cyclictest3612036-21kworker/u16:1+events_unbound10:56:474
3336818994039,0cyclictest0-21swapper/711:17:047
33361692405,29sleep70-21swapper/707:02:117
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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