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2025-12-03 - 03:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Wed Dec 03, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
225901226857,7sleep40-21swapper/403:19:354
225924926336,8sleep50-21swapper/503:22:495
225922025329,8sleep60-21swapper/603:22:266
2259617995047,2cyclictest2857925-21kworker/u16:3+flush-8:008:22:495
2259617995047,2cyclictest2283241-21kworker/u16:2+flush-8:003:37:495
2259617994947,2cyclictest2757165-21kworker/u16:1+events_unbound07:43:125
225962499470,45cyclictest1021-21rs:main7
2259624994641,4cyclictest2269547-21latency_hist03:27:497
2259617994642,3cyclictest2384215-21kworker/u16:1+flush-8:004:47:495
225901524511,30sleep70-21swapper/703:19:387
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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