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2026-08-05 - 04:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Wed Aug 05, 2026 00:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
99511625620,31sleep70-21swapper/719:05:347
99532225140,8sleep40-21swapper/419:08:284
995632994539,5cyclictest1509850-21latency_hist23:03:347
995632994439,4cyclictest1377324-21latency_hist22:08:347
632489440,37rtkit-daemon0-21swapper/519:04:245
995628994139,2cyclictest1411812-21kworker/u16:3+flush-8:022:28:346
99531424131,7sleep60-21swapper/619:08:226
995623994036,3cyclictest1546416-21kworker/u16:1+flush-8:023:38:345
995628993835,2cyclictest976102-21kworker/u16:0+events_unbound20:48:366
995632993631,4cyclictest1244282-21latency_hist21:13:347
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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