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2026-06-29 - 10:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Mon Jun 29, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
383181926555,7sleep50-21swapper/519:05:365
383207726048,8sleep40-21swapper/419:09:124
3832372994741,5cyclictest3953121-21latency_hist20:09:147
3832361994442,2cyclictest4001526-21kworker/u16:4+events_unbound22:44:154
38227652447,30sleep70-21swapper/719:04:187
3832372994136,4cyclictest4031071-21latency_hist20:49:147
3832361993938,1cyclictest33454-21kworker/u16:0+events_unbound22:10:444
3832361993937,2cyclictest4092501-21kworker/u16:3+events_unbound21:16:324
3832361993936,2cyclictest33454-21kworker/u16:0+events_unbound22:33:464
3832372993833,4cyclictest353709-21latency_hist00:24:137
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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