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2026-05-26 - 05:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Tue May 26, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
17234712990,1sleep71723470-21sendmail_mailtr23:47:447
1094362999996,2cyclictest1678123-21kworker/u16:1+flush-8:023:58:516
109382825444,7sleep50-21swapper/519:03:445
1094362994846,2cyclictest1174993-21kworker/u16:4+events_unbound20:12:466
109385424433,8sleep40-21swapper/419:04:074
1094357994038,2cyclictest1075335-21kworker/u16:2+events_unbound19:12:325
1094357993937,2cyclictest1690507-21kworker/u16:2+events_unbound00:17:305
10857252393,30sleep70-21swapper/719:02:337
1094357993834,3cyclictest1174993-21kworker/u16:4+events_unbound19:57:315
1094364993734,2cyclictest1421971-21ntp_states21:42:427
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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