You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-27 - 00:06
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Sun Jul 26, 2026 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
306503126049,8sleep40-21swapper/407:08:064
306503225444,7sleep50-21swapper/507:08:075
30648882428,29sleep70-21swapper/707:06:087
3065412994139,2cyclictest2991407-21kworker/u16:1+events_unbound07:09:134
3065412993937,2cyclictest1622263-21kworker/u16:5+flush-8:007:44:394
3065417993836,2cyclictest3657235-21kworker/u16:3+events_unbound12:02:256
3065417993735,2cyclictest3325937-21kworker/u16:1+events_unbound09:24:446
3065417993734,2cyclictest3619621-21kworker/u16:2+events_unbound12:04:116
3065417993634,2cyclictest3387501-21kworker/u16:2+events_unbound09:46:106
3065416993634,2cyclictest3508509-21kworker/u16:1+events_unbound10:35:085
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional