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2026-08-20 - 08:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Thu Aug 20, 2026 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
368227021000,1sleep73682268-21ssh22:48:237
319433125646,7sleep50-21swapper/519:06:335
319433325420,29sleep70-21swapper/719:06:357
3194698994541,3cyclictest3528076-21kworker/u16:4+flush-8:022:02:366
319440724332,8sleep40-21swapper/419:07:364
3194698994038,2cyclictest3696374-21kworker/u16:1+events_unbound23:22:596
3194698993936,2cyclictest3696374-21kworker/u16:1+events_unbound23:47:506
3194702993736,0cyclictest0-21swapper/722:32:387
3194702993634,1cyclictest3276250-21turbostat19:47:367
319470299360,34cyclictest3443741-21latency_hist21:12:367
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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