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2026-01-07 - 12:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Wed Jan 07, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
338042925319,30sleep70-21swapper/719:06:037
3380877994842,5cyclictest3461898-21latency_hist19:48:187
338033224433,8sleep50-21swapper/519:04:405
338036324333,7sleep60-21swapper/619:05:066
3380868993937,2cyclictest3370228-21kworker/u16:2+flush-8:019:58:185
338053023929,7sleep40-21swapper/419:07:284
3380868993734,2cyclictest3626199-21kworker/u16:0+flush-8:021:13:185
3380877993630,5cyclictest3636233-21latency_hist21:18:187
3380863993128,2cyclictest3390435-21kworker/u16:0+flush-8:019:18:374
3380868993028,2cyclictest3752212-21kworker/u16:2+flush-8:022:18:185
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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