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2026-09-22 - 21:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Tue Sep 22, 2026 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
296249025848,7sleep40-21swapper/407:07:484
618789460,39rtkit-daemon0-21swapper/607:08:356
2962889994641,4cyclictest3249064-21latency_hist09:29:137
2962882994139,2cyclictest3616534-21kworker/u16:0+events_unbound12:09:145
296238624131,7sleep50-21swapper/507:06:215
2962882994037,2cyclictest3310282-21kworker/u16:0+events_unbound10:34:135
29541062403,30sleep70-21swapper/707:04:307
2962883993836,2cyclictest3170278-21kworker/u16:2+flush-8:009:24:126
33588472370,0sleep73358846-21rm10:12:127
32606002370,0sleep73260601-21sh09:32:537
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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