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2026-09-20 - 22:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Sun Sep 20, 2026 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
67033021000,1sleep6841rcuc/609:54:396
3200282880,0sleep60-21swapper/607:09:406
3158892493,39sleep70-21swapper/707:07:587
316275994543,2cyclictest612050-21kworker/u16:6+flush-8:009:34:205
31573724333,7sleep50-21swapper/507:05:475
31628999410,39cyclictest645-21systemd-journal07:19:217
618789400,32rtkit-daemon0-21swapper/607:05:136
316275993937,2cyclictest698244-21kworker/u16:1+flush-8:010:39:155
316289993734,2cyclictest939291-21kthreadcore11:44:397
316289993634,1cyclictest0-21swapper/711:58:047
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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