You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-17 - 04:47
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Sun May 17, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
25485002970,1sleep60-21swapper/600:22:316
184249424635,7sleep40-21swapper/419:07:454
1842788994543,2cyclictest2488194-21kworker/u16:3+events_unbound00:28:205
1842797994140,0cyclictest0-21swapper/723:28:067
18424322415,31sleep70-21swapper/719:06:527
628089400,33rtkit-daemon0-21swapper/519:05:355
1842797994034,5cyclictest635-21systemd-journal00:37:517
1842786994038,2cyclictest2473133-21kworker/u16:2+events_unbound23:57:494
1842786994038,2cyclictest2473133-21kworker/u16:2+events_unbound23:57:494
1842788993836,2cyclictest2488194-21kworker/u16:3+events_unbound00:14:495
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional