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2026-06-05 - 03:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Fri Jun 05, 2026 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
113977325848,7sleep40-21swapper/419:03:544
113977325848,7sleep40-21swapper/419:03:544
113972724534,8sleep50-21swapper/519:03:155
113972724534,8sleep50-21swapper/519:03:155
1140274994337,5cyclictest1163128-21latency_hist19:16:367
1140269994341,2cyclictest1288467-21kworker/u16:1+flush-8:022:47:016
1140264994341,2cyclictest1122014-21kworker/u16:1+events_unbound19:06:514
11390032423,32sleep70-21swapper/719:02:057
11390032423,32sleep70-21swapper/719:02:057
1140269994139,2cyclictest1675909-21kworker/u16:3+flush-8:023:57:016
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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