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2025-12-11 - 20:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Thu Dec 11, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1608128995651,4cyclictest2055914-21latency_hist19:02:157
160764525443,8sleep40-21swapper/415:20:204
160762825343,7sleep60-21swapper/615:20:066
1608128994944,4cyclictest2015561-21latency_hist18:42:157
160764624737,7sleep50-21swapper/515:20:215
1608120994644,2cyclictest2096251-21kworker/u16:1+events_unbound19:43:476
1608119994541,3cyclictest1702649-21kworker/u16:0+flush-8:016:57:155
1608119994541,3cyclictest1702649-21kworker/u16:0+flush-8:016:57:155
160812899420,40cyclictest1874293-21latency_hist17:32:157
1608120994240,2cyclictest2178095-21kworker/u16:1+events_unbound20:44:466
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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