You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-11 - 04:40
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Thu Jun 11, 2026 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
591515996260,2cyclictest1087690-21kworker/u16:4+events_unbound23:06:425
591515996260,2cyclictest1087690-21kworker/u16:4+events_unbound23:06:425
591515996159,2cyclictest1257984-21kworker/u16:5+flush-8:000:06:375
591515995351,2cyclictest1173952-21kworker/u16:2+events_unbound23:41:435
591515995350,2cyclictest1101201-21kworker/u16:0+flush-8:023:26:415
591515994947,2cyclictest945872-21kworker/u16:2+flush-8:022:06:425
59110624938,8sleep50-21swapper/519:04:235
591515994745,2cyclictest1087690-21kworker/u16:4+flush-8:023:01:245
591515994442,2cyclictest1257984-21kworker/u16:5+flush-8:000:16:415
591515994441,2cyclictest980062-21kworker/u16:3+events_unbound22:11:145
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional