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2026-09-04 - 14:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Fri Sep 04, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
398535026251,8sleep40-21swapper/407:07:244
3985778995550,4cyclictest66450-21latency_hist09:24:247
398541925116,30sleep70-21swapper/707:08:247
3985778994640,4cyclictest411982-21latency_hist11:44:247
3985773994643,2cyclictest101446-21kworker/u16:1+flush-8:009:44:245
398536924333,7sleep50-21swapper/507:07:425
3985773994138,3cyclictest101446-21kworker/u16:1+flush-8:009:59:255
3985773994138,2cyclictest177613-21kworker/u16:4+flush-8:010:09:435
3985773993832,5cyclictest348704-21kworker/u16:1+flush-8:011:39:245
3985768993835,2cyclictest460083-21kworker/u16:1+events_unbound12:11:474
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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