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2026-01-05 - 10:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Mon Jan 05, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
109705725847,8sleep50-21swapper/519:05:545
109705725847,8sleep50-21swapper/519:05:545
109714525420,30sleep70-21swapper/719:07:097
109714525420,30sleep70-21swapper/719:07:097
109754099490,47cyclictest1507508-21latency_hist22:38:267
109754099490,47cyclictest1507508-21latency_hist22:38:267
108802824737,7sleep40-21swapper/419:03:294
108802824737,7sleep40-21swapper/419:03:294
1097538994139,2cyclictest1304008-21kworker/u16:0+flush-8:021:03:266
1097538993735,2cyclictest1265767-21kworker/u16:3+flush-8:020:43:266
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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