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2025-12-30 - 19:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Tue Dec 30, 2025 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14435822950,1sleep5741rcuc/510:29:105
104401025646,7sleep60-21swapper/607:05:366
104406525343,7sleep40-21swapper/407:06:224
104401125318,31sleep70-21swapper/707:05:377
1044511994542,2cyclictest971236-21kworker/u16:4+flush-8:007:23:484
1044511994038,2cyclictest1221558-21kworker/u16:5+events_unbound08:38:484
104420923928,8sleep50-21swapper/507:08:245
1044519993731,5cyclictest1232485-21latency_hist08:43:487
1044516993634,2cyclictest1572048-21kworker/u16:1+flush-8:012:34:015
1044516993533,2cyclictest1251509-21kworker/u16:0+events_unbound11:59:095
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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