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2026-01-10 - 10:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Sat Jan 10, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28531922700,1sleep70-21swapper/721:18:237
2588374996054,5cyclictest650-21systemd-journal22:53:067
258808325949,7sleep60-21swapper/619:08:036
258798125421,29sleep70-21swapper/719:06:367
258791224319,8sleep40-21swapper/419:05:364
2588369994139,2cyclictest2959248-21kworker/u16:1+events_unbound22:12:345
2588369993937,2cyclictest3032079-21kworker/u16:1+events_unbound22:34:395
2588369993937,2cyclictest3032079-21kworker/u16:1+events_unbound22:34:395
2588369993937,2cyclictest2959248-21kworker/u16:1+events_unbound22:14:575
2588369993937,2cyclictest2861361-21kworker/u16:4+events_unbound21:27:535
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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