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2025-12-20 - 22:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Sat Dec 20, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
209040326048,8sleep60-21swapper/607:07:046
208133225542,8sleep50-21swapper/507:04:385
209050925419,31sleep70-21swapper/707:08:337
209039224736,8sleep40-21swapper/407:06:544
2090879993731,4cyclictest2288249-21latency_hist08:49:277
2090879993529,5cyclictest2685654-21latency_hist12:14:277
2090876993128,2cyclictest1355985-21kworker/u16:5+flush-8:008:34:586
2090879992923,5cyclictest650-21systemd-journal11:44:277
2090876992927,2cyclictest2500386-21kworker/u16:3+flush-8:011:44:226
2090876992926,2cyclictest2423545-21kworker/u16:4+events_unbound10:39:426
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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