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2025-12-15 - 15:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Mon Dec 15, 2025 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
47539925848,7sleep50-21swapper/507:06:195
47550525521,30sleep70-21swapper/707:07:497
47560624030,7sleep40-21swapper/407:09:154
475931993933,5cyclictest751665-21latency_hist09:29:467
47547623928,7sleep60-21swapper/607:07:246
8842022350,1sleep50-21swapper/510:35:075
475928993532,2cyclictest508675-21kworker/u16:2+events_unbound08:00:026
475923993432,2cyclictest955782-21kworker/u16:1+events_unbound12:00:015
475928993028,2cyclictest508675-21kworker/u16:2+flush-8:007:55:016
475928992927,2cyclictest955782-21kworker/u16:1+flush-8:012:00:006
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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