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2025-11-26 - 04:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Wed Nov 26, 2025 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32845022990,1sleep73284500-21ls08:33:177
265465825141,7sleep40-21swapper/403:23:144
265456425040,7sleep60-21swapper/603:21:566
2655028994644,2cyclictest2780347-21kworker/u16:3+events_unbound04:33:436
2655033994539,5cyclictest3122945-21latency_hist07:13:167
265454324535,7sleep50-21swapper/503:21:395
2655028994240,2cyclictest2644436-21kworker/u16:1+flush-8:003:43:476
2655033994140,0cyclictest0-21swapper/706:41:507
2655020994137,3cyclictest2749582-21kworker/u16:2+events_unbound04:38:424
2655033994039,0cyclictest0-21swapper/704:49:527
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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