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2025-12-19 - 04:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Fri Dec 19, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
239122226050,7sleep60-21swapper/619:08:116
239130625645,8sleep50-21swapper/519:09:225
239112825319,30sleep70-21swapper/719:06:517
239104824227,10sleep40-21swapper/419:05:444
2391623993433,0cyclictest0-21swapper/721:09:497
2391623993226,5cyclictest2794498-21latency_hist22:34:337
2391618993128,2cyclictest2814382-21kworker/u16:3+flush-8:022:44:485
2391623993024,5cyclictest2414705-21latency_hist19:19:347
2391623992923,5cyclictest3037729-21latency_hist00:39:337
2391623992923,5cyclictest2472997-21latency_hist19:49:347
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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