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2026-05-07 - 02:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Thu May 07, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18935092920,1sleep71893511-21date23:43:327
128278924620,8sleep50-21swapper/519:04:365
128288224535,7sleep40-21swapper/419:05:564
12829422437,31sleep70-21swapper/719:06:477
1283364993937,2cyclictest1591516-21kworker/u16:1+events_unbound22:17:506
1283364993836,2cyclictest1784167-21kworker/u16:0+events_unbound23:15:106
1283369993635,0cyclictest0-21swapper/700:28:337
1283364993634,2cyclictest1623828-21kworker/u16:3+events_unbound21:57:546
1283364993634,2cyclictest1591516-21kworker/u16:1+events_unbound22:36:186
1283364993633,2cyclictest1651078-21kworker/u16:0+events_unbound22:03:346
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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