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2025-12-02 - 21:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Tue Dec 02, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
377339025949,7sleep50-21swapper/515:19:305
3773948995553,2cyclictest3898482-21kworker/u16:2+events_unbound16:57:516
377341925419,30sleep70-21swapper/715:19:567
3773948994441,3cyclictest3970246-21kworker/u16:5+flush-8:017:27:516
377394999410,39cyclictest4130964-21latency_hist18:17:517
3773944994138,2cyclictest88584-21kworker/u16:2+flush-8:019:53:135
3773949994035,4cyclictest4191451-21latency_hist18:47:517
377394999380,36cyclictest3888715-21latency_hist16:17:527
377352523828,7sleep40-21swapper/415:21:224
3773949993734,2cyclictest4090621-21latency_hist17:57:527
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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