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2026-03-08 - 00:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Sat Mar 07, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7334012720,1sleep40-21swapper/410:34:404
27693626351,8sleep60-21swapper/607:00:556
27694425848,7sleep50-21swapper/507:01:025
277461995551,3cyclictest979376-21kworker/u16:0+flush-8:012:19:474
277476995248,3cyclictest764645-21sed10:49:437
27688925242,7sleep40-21swapper/407:00:134
277461994947,2cyclictest568856-21kworker/u16:5+flush-8:010:19:554
27747699470,45cyclictest570503-21date09:29:187
27747699430,41cyclictest991355-21latency_hist12:24:187
277461994240,2cyclictest568855-21kworker/u16:3+flush-8:009:29:184
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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