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2026-08-26 - 08:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Tue Aug 25, 2026 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
124613526135,8sleep40-21swapper/419:03:374
124613526135,8sleep40-21swapper/419:03:374
124638725419,30sleep70-21swapper/719:07:097
124638725419,30sleep70-21swapper/719:07:097
18594292470,0sleep71859430-21rm23:49:077
1246693994539,5cyclictest1858132-21latency_hist23:47:177
123711424332,7sleep50-21swapper/519:02:265
123711424332,7sleep50-21swapper/519:02:265
1246693994236,5cyclictest1531146-21latency_hist21:27:177
1246684994038,2cyclictest1873128-21kworker/u16:4+flush-8:000:02:175
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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