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2025-12-01 - 08:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Mon Dec 01, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
410902325848,7sleep60-21swapper/603:18:486
4109681995451,2cyclictest30610-21kworker/u16:5+flush-8:005:02:576
410923525039,7sleep40-21swapper/403:21:434
4109684994843,4cyclictest556389-21latency_hist08:42:567
4109681994644,2cyclictest505475-21kworker/u16:5+events_unbound08:13:216
4109681994240,2cyclictest364805-21kworker/u16:3+events_unbound07:08:206
410916024231,7sleep50-21swapper/503:20:405
41090432427,30sleep70-21swapper/703:19:057
410968499410,39cyclictest589235-21systemd-journal07:07:577
4109681994138,2cyclictest302373-21kworker/u16:3+flush-8:006:37:576
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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