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2025-12-02 - 08:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Tue Dec 02, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1090808996055,4cyclictest1347299-21latency_hist05:27:537
1090799995452,2cyclictest386931-21kworker/u16:4+flush-8:003:37:544
109048825320,29sleep70-21swapper/703:22:217
1090808995247,4cyclictest1680289-21latency_hist08:12:537
109028724822,7sleep50-21swapper/503:19:395
108084924130,7sleep60-21swapper/603:18:036
1090808994035,4cyclictest1670163-21latency_hist08:07:537
1090802994037,3cyclictest1448039-21kworker/u16:0+flush-8:007:03:185
1090802994037,3cyclictest1448039-21kworker/u16:0+flush-8:007:03:185
1090808993934,4cyclictest1660110-21latency_hist08:02:537
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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