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2026-04-09 - 03:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot2.osadl.org (updated Thu Apr 09, 2026 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
290166021070,1sleep50-21swapper/522:20:555
26597612970,1sleep72659763-21cut20:32:307
28063002930,0sleep60-21swapper/621:42:096
247618426251,8sleep40-21swapper/418:59:094
2476691995956,2cyclictest2815759-21kworker/u16:0+flush-8:022:02:244
2476700995654,2cyclictest2528120-21kworker/u16:1+flush-8:019:37:356
2476691995351,2cyclictest2815759-21kworker/u16:0+events_unbound22:17:424
2476691995250,2cyclictest2643051-21kworker/u16:4+events_unbound20:32:354
2476691995149,2cyclictest3072353-21kworker/u16:2+flush-8:023:47:344
2476691995149,2cyclictest3033372-21kworker/u16:1+events_unbound00:02:344
2476691995149,2cyclictest2466919-21kworker/u16:1+flush-8:019:07:354
2476702994944,4cyclictest3203364-21latency_hist00:27:097
2476694994946,2cyclictest2576149-21kworker/u16:0+flush-8:021:27:235
2476691994946,2cyclictest3040342-21kworker/u16:5+events_unbound23:27:244
2476691994946,2cyclictest2914415-21kworker/u16:3+flush-8:022:57:244
2476691994846,2cyclictest3033372-21kworker/u16:1+events_unbound00:12:404
2476691994846,2cyclictest3033372-21kworker/u16:1+events_unbound00:12:404
2476691994845,2cyclictest2960398-21kworker/u16:1+events_unbound22:47:434
2476694994745,2cyclictest2914415-21kworker/u16:3+events_unbound00:07:395
2476691994745,2cyclictest2839745-21kworker/u16:2+events_unbound22:07:244
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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