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2026-01-05 - 14:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot2.osadl.org (updated Mon Jan 05, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
40080492930,1sleep74008050-21kthreadcore09:08:447
376782226252,7sleep60-21swapper/607:04:086
376804725747,7sleep40-21swapper/407:07:194
376785025622,30sleep70-21swapper/707:04:337
376789624636,7sleep50-21swapper/507:05:115
41590212390,1sleep74159023-21date10:28:247
3768425993734,2cyclictest3935642-21ntpq08:28:507
3768414993633,2cyclictest4052725-21kworker/u16:0+events_unbound09:33:264
3768419993532,2cyclictest4111599-21kworker/u16:1+events_unbound10:43:266
3768419993331,2cyclictest3869054-21kworker/u16:2+events_unbound10:28:256
3768419993331,2cyclictest33163-21kworker/u16:0+events_unbound11:34:346
3768414993331,2cyclictest3965224-21kworker/u16:1+flush-8:009:23:374
3768414993330,2cyclictest3811034-21kworker/u16:3+events_unbound07:28:264
3768419993230,2cyclictest3926964-21kworker/u16:3+events_unbound08:42:346
3768419993128,2cyclictest3869054-21kworker/u16:2+events_unbound09:18:496
3768414993129,2cyclictest71957-21kworker/u16:3+events_unbound12:10:344
3768414993129,2cyclictest4072038-21kworker/u16:3+events_unbound09:44:074
3768419993028,2cyclictest3965224-21kworker/u16:1+events_unbound08:51:356
3768419992927,2cyclictest3887366-21kworker/u16:0+flush-8:008:13:406
3768419992927,2cyclictest130182-21kworker/u16:1+events_unbound12:04:426
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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