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2026-05-02 - 16:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sat May 02, 2026 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21875822950,0sleep686-21ksoftirqd/610:44:096
171856024636,7sleep40-21swapper/407:07:084
171853324635,8sleep50-21swapper/507:06:455
1718975994543,2cyclictest2338461-21kworker/u16:2+flush-8:012:14:186
1718967994441,2cyclictest2317626-21kworker/u16:1+flush-8:011:44:075
1718967994440,3cyclictest2208307-21kworker/u16:4+events_unbound10:59:045
1718979994138,2cyclictest124-21kswapd011:43:507
17091482393,30sleep70-21swapper/707:03:517
1718975993836,2cyclictest2038224-21kworker/u16:2+flush-8:010:48:526
1718975993734,2cyclictest2370100-21kworker/u16:1+events_unbound12:03:516
1718964993734,2cyclictest1924159-21kworker/u16:2+flush-8:009:24:054
1718979993630,5cyclictest1789705-21latency_hist07:43:507
1718975993634,2cyclictest2123639-21kworker/u16:0+events_unbound12:29:146
1718975993634,2cyclictest2038224-21kworker/u16:2+flush-8:009:53:496
1718975993634,2cyclictest1828445-21kworker/u16:4+events_unbound09:22:556
1718975993633,2cyclictest2086645-21kworker/u16:1+flush-8:010:03:596
1718975993533,2cyclictest2208307-21kworker/u16:4+flush-8:011:34:046
1718975993533,2cyclictest2208307-21kworker/u16:4+flush-8:011:04:056
1718975993533,2cyclictest2208307-21kworker/u16:4+events_unbound11:44:116
1718975993533,2cyclictest2123639-21kworker/u16:0+flush-8:011:16:006
171850523525,7sleep60-21swapper/607:06:226
1718975993431,2cyclictest2038224-21kworker/u16:2+flush-8:011:09:006
1718979993331,1cyclictest1952647-21diskmemload11:29:007
1718975993331,2cyclictest2370100-21kworker/u16:1+flush-8:011:59:106
1718975993331,2cyclictest2370100-21kworker/u16:1+flush-8:011:59:106
1718975993331,2cyclictest2338461-21kworker/u16:2+events_unbound11:56:316
1718975993331,2cyclictest2038224-21kworker/u16:2+flush-8:009:58:316
1718975993331,2cyclictest1942270-21kworker/u16:1+flush-8:009:15:006
1718975993330,2cyclictest2370100-21kworker/u16:1+flush-8:012:33:596
1718975993330,2cyclictest2338461-21kworker/u16:2+flush-8:012:24:056
1718967993331,2cyclictest2123639-21kworker/u16:0+flush-8:010:43:445
1718967993331,2cyclictest2123639-21kworker/u16:0+flush-8:010:43:445
1718979993229,2cyclictest2365749-21ssh11:58:097
1718979993229,2cyclictest2197420-21ps10:49:067
1718975993230,2cyclictest2208307-21kworker/u16:4+events_unbound11:43:476
1718975993230,2cyclictest2123639-21kworker/u16:0+flush-8:011:27:156
1718975993230,2cyclictest2074144-21kworker/u16:3+events_unbound10:12:046
1718975993129,2cyclictest2338461-21kworker/u16:2+flush-8:011:49:316
1718975993129,2cyclictest2074144-21kworker/u16:3+flush-8:010:14:596
1718975993129,2cyclictest1635599-21kworker/u16:4+flush-8:007:14:206
1718979993029,0cyclictest0-21swapper/712:16:027
1718979993029,0cyclictest0-21swapper/711:59:457
1718979993029,0cyclictest0-21swapper/711:59:457
1718975993028,2cyclictest2123639-21kworker/u16:0+events_unbound10:32:006
1718975993028,2cyclictest2123639-21kworker/u16:0+events_unbound10:28:006
1718979992928,0cyclictest0-21swapper/707:09:177
1718975992927,2cyclictest1988995-21kworker/u16:0+flush-8:009:34:486
1718975992927,2cyclictest1988995-21kworker/u16:0+events_unbound10:02:596
1718975992927,2cyclictest1988995-21kworker/u16:0+events_unbound10:02:596
1718967992927,2cyclictest2038224-21kworker/u16:2+events_unbound10:54:035
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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