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2025-12-29 - 12:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Mon Dec 29, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
140933926655,8sleep60-21swapper/619:06:586
140938525747,7sleep40-21swapper/419:07:364
140107325520,29sleep70-21swapper/719:04:107
140937723928,8sleep50-21swapper/519:07:295
1409777993734,2cyclictest1635733-21kworker/u16:1+flush-8:021:38:545
1409772993634,2cyclictest1809653-21kworker/u16:0+events_unbound22:58:534
1409772993634,2cyclictest1809653-21kworker/u16:0+events_unbound22:58:534
1409772993533,2cyclictest1409490-21kworker/u16:1+events_unbound19:43:544
1409785993431,2cyclictest1994703-21cat00:08:537
1409785993431,2cyclictest1655395-21awk21:13:537
1409777993331,2cyclictest1809653-21kworker/u16:0+events_unbound22:58:555
1409777993330,2cyclictest1809653-21kworker/u16:0+flush-8:022:54:125
1409777993330,2cyclictest1809653-21kworker/u16:0+flush-8:022:54:125
1409780993229,2cyclictest1965888-21kworker/u16:3+flush-8:000:04:096
1409777993129,2cyclictest1432835-21kworker/u16:0+flush-8:019:29:165
1409777993028,2cyclictest1995001-21kworker/u16:0+events_unbound00:12:005
1409777993027,2cyclictest1792248-21kworker/u16:1+events_unbound00:14:015
1409777992927,2cyclictest1762379-21kworker/u16:3+events_unbound22:18:045
1409777992927,2cyclictest1582550-21kworker/u16:0+events_unbound20:43:055
1409777992927,2cyclictest1142872-21kworker/u16:4+events_unbound19:54:165
1409777992926,2cyclictest1809653-21kworker/u16:0+events_unbound22:39:035
1409777992826,2cyclictest1868754-21kworker/u16:3+events_unbound23:10:055
1409777992826,2cyclictest1792248-21kworker/u16:1+events_unbound23:18:535
1409777992826,2cyclictest1762379-21kworker/u16:3+events_unbound22:29:035
1409777992826,2cyclictest1635733-21kworker/u16:1+events_unbound21:05:065
1409777992826,2cyclictest1558652-21kworker/u16:1+flush-8:020:25:055
1409772992825,2cyclictest1995001-21kworker/u16:0+flush-8:000:38:534
1409777992725,2cyclictest1878378-21kworker/u16:4+events_unbound23:56:035
1409777992725,2cyclictest1792248-21kworker/u16:1+events_unbound23:21:045
1409777992725,2cyclictest1409490-21kworker/u16:1+events_unbound19:47:045
1409777992725,2cyclictest1409490-21kworker/u16:1+events_unbound19:47:045
1409777992724,2cyclictest1635733-21kworker/u16:1+flush-8:021:44:045
1409772992724,2cyclictest1995001-21kworker/u16:0+flush-8:000:23:584
1409785992625,0cyclictest0-21swapper/720:04:127
1409777992624,2cyclictest1792248-21kworker/u16:1+events_unbound23:53:035
1409777992624,2cyclictest1792248-21kworker/u16:1+events_unbound23:47:155
1409777992624,2cyclictest1703832-21kworker/u16:0+events_unbound22:08:045
1409777992624,2cyclictest1703832-21kworker/u16:0+events_unbound22:08:045
1409777992624,2cyclictest1568284-21kworker/u16:2+events_unbound20:33:055
1409777992624,2cyclictest1432835-21kworker/u16:0+flush-8:019:26:125
1409777992623,2cyclictest1432835-21kworker/u16:0+flush-8:019:19:045
1409785992524,0cyclictest0-21swapper/723:14:007
1409777992523,2cyclictest1896746-21kworker/u16:2+events_unbound23:32:005
1409777992523,2cyclictest1762379-21kworker/u16:3+flush-8:022:22:165
1409777992523,2cyclictest1762379-21kworker/u16:3+events_unbound22:38:005
1409777992523,2cyclictest1674892-21kworker/u16:2+events_unbound21:28:165
1409772992523,2cyclictest1142872-21kworker/u16:4+flush-8:021:19:164
1409772992523,2cyclictest1142872-21kworker/u16:4+flush-8:021:19:164
1409785992423,0cyclictest0-21swapper/700:22:377
1409785992419,4cyclictest1674704-21latency_hist21:23:547
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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