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2025-12-01 - 19:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Mon Dec 01, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2611967996357,5cyclictest589235-21systemd-journal17:29:377
261158625420,30sleep70-21swapper/715:22:317
2611967994943,5cyclictest2898545-21latency_hist17:42:557
2611967994943,5cyclictest2898545-21latency_hist17:42:557
261161524838,7sleep40-21swapper/415:22:534
2611967994746,0cyclictest0-21swapper/719:33:077
2611967994641,4cyclictest2767182-21latency_hist16:37:567
261143324636,7sleep60-21swapper/615:20:226
2611967994539,4cyclictest2868107-21latency_hist17:27:557
2611966994341,2cyclictest2878036-21kworker/u16:3+events_unbound18:41:516
2611966994341,2cyclictest2666231-21kworker/u16:1+events_unbound16:08:286
2611966994341,2cyclictest2666231-21kworker/u16:1+events_unbound16:08:286
2611957994139,2cyclictest2878036-21kworker/u16:3+flush-8:017:34:484
2611967994035,4cyclictest3151759-21latency_hist19:47:557
2611966993937,2cyclictest3160963-21kworker/u16:3+flush-8:020:01:086
2611966993937,2cyclictest3121334-21kworker/u16:4+flush-8:019:48:206
2611966993937,2cyclictest2716619-21kworker/u16:3+events_unbound16:25:366
2611957993937,2cyclictest2878036-21kworker/u16:3+flush-8:017:51:234
261148023929,7sleep50-21swapper/515:21:015
261196799380,36cyclictest3106458-21grep19:23:157
2611966993836,2cyclictest2918981-21kworker/u16:7+flush-8:019:23:206
2611966993836,2cyclictest2878089-21kworker/u16:6+flush-8:018:15:556
2611966993836,2cyclictest2571339-21kworker/u16:6+flush-8:015:40:346
2611966993735,2cyclictest2726410-21kworker/u16:4+flush-8:016:54:446
2611957993735,2cyclictest2666231-21kworker/u16:1+events_unbound16:43:174
2611966993634,2cyclictest3202231-21kworker/u16:2+events_unbound20:21:526
2611962993635,1cyclictest2878036-21kworker/u16:3+flush-8:017:51:475
2611966993533,2cyclictest2918981-21kworker/u16:7+events_unbound17:58:556
2611966993533,2cyclictest2809239-21kworker/u16:2+flush-8:016:59:486
2611966993533,2cyclictest2767407-21kworker/u16:2+events_unbound16:46:056
2611966993533,2cyclictest2766938-21kworker/u16:0+events_unbound17:22:466
2611962993533,2cyclictest2666231-21kworker/u16:1+flush-8:017:29:335
2611966993432,2cyclictest3233693-21kworker/u16:0+flush-8:020:32:546
2611966993432,2cyclictest2878036-21kworker/u16:3+events_unbound17:36:466
2611966993432,2cyclictest2571339-21kworker/u16:6+events_unbound16:06:566
2611966993432,2cyclictest2571339-21kworker/u16:6+events_unbound15:46:566
2611966993431,2cyclictest3040814-21kworker/u16:2+flush-8:018:57:556
2611966993331,2cyclictest3024746-21kworker/u16:1+events_unbound18:45:576
2611962993331,2cyclictest2666231-21kworker/u16:1+events_unbound16:42:365
2611966993230,2cyclictest3121334-21kworker/u16:4+events_unbound20:15:556
2611966993230,2cyclictest2809239-21kworker/u16:2+flush-8:017:05:466
2611966993229,2cyclictest3121334-21kworker/u16:4+events_unbound19:43:076
2611962993230,2cyclictest2918981-21kworker/u16:7+events_unbound19:35:205
2611967993130,0cyclictest0-21swapper/715:58:247
2611966993129,2cyclictest3233693-21kworker/u16:0+events_unbound20:48:476
2611966993129,2cyclictest3010182-21kworker/u16:0+events_unbound18:48:596
2611966993129,2cyclictest2726410-21kworker/u16:4+flush-8:016:52:056
2611966993128,2cyclictest3081084-21kworker/u16:0+flush-8:019:12:556
2611962993129,2cyclictest2766938-21kworker/u16:0+events_unbound16:46:445
2611962993128,2cyclictest2666231-21kworker/u16:1+events_unbound17:37:555
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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