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2026-06-06 - 04:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sat Jun 06, 2026 00:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2450792995754,2cyclictest2628364-21kworker/u16:2+events_unbound21:22:045
245041725747,7sleep40-21swapper/419:05:154
2450792995553,2cyclictest2412658-21kworker/u16:4+flush-8:020:02:005
245030325545,7sleep50-21swapper/519:03:405
2450792995452,2cyclictest2635834-21kworker/u16:4+events_unbound20:52:015
2450802995349,3cyclictest124-21kswapd023:26:467
2450792995351,2cyclictest2827008-21kworker/u16:2+events_unbound22:02:045
2450792995048,2cyclictest2635834-21kworker/u16:4+flush-8:020:47:025
2450792995047,2cyclictest3072821-21kworker/u16:0+events_unbound00:06:455
2450792994947,2cyclictest3012163-21kworker/u16:4+flush-8:023:41:475
2450792994947,2cyclictest2827008-21kworker/u16:2+events_unbound22:27:055
2450792994745,2cyclictest2936150-21kworker/u16:3+events_unbound23:11:545
2450792994745,2cyclictest2879105-21kworker/u16:0+events_unbound22:47:035
2450792994745,2cyclictest2532478-21kworker/u16:0+flush-8:020:12:015
2450792994644,2cyclictest3155660-21kworker/u16:4+flush-8:000:22:045
2450792994644,2cyclictest2532478-21kworker/u16:0+events_unbound20:22:015
2450789994643,2cyclictest2839976-21kworker/u16:1+flush-8:022:21:574
2450792994543,2cyclictest2412658-21kworker/u16:4+flush-8:019:11:485
2450789994543,2cyclictest2532478-21kworker/u16:0+events_unbound20:11:594
24496152443,35sleep70-21swapper/719:02:057
2450792994341,2cyclictest3146226-21kworker/u16:0+flush-8:000:26:475
2450792994341,2cyclictest3146226-21kworker/u16:0+flush-8:000:26:475
2450792994341,2cyclictest2936150-21kworker/u16:3+flush-8:023:01:465
2450789994341,2cyclictest2635834-21kworker/u16:4+flush-8:021:01:594
2450789994341,2cyclictest2635834-21kworker/u16:4+flush-8:021:01:594
2450792994241,1cyclictest2915428-21kworker/u16:1+events_unbound23:36:475
2450792994240,2cyclictest2915428-21kworker/u16:1+flush-8:022:42:045
2450792994240,2cyclictest2635834-21kworker/u16:4+events_unbound21:46:595
2450792994240,2cyclictest2460278-21kworker/u16:2+events_unbound19:57:005
2450792994139,2cyclictest3072821-21kworker/u16:0+events_unbound23:46:595
2450792994139,2cyclictest2827008-21kworker/u16:2+events_unbound22:32:065
2450792994139,2cyclictest2460278-21kworker/u16:2+flush-8:020:07:005
2450802994034,5cyclictest635-21systemd-journal19:21:327
2450792993937,2cyclictest3119955-21kworker/u16:1+events_unbound00:21:175
2450792993937,2cyclictest2948857-21kworker/u16:2+events_unbound23:21:545
2450792993937,2cyclictest2936150-21kworker/u16:3+flush-8:022:58:065
2450792993937,2cyclictest2628364-21kworker/u16:2+flush-8:021:37:005
2450792993936,2cyclictest2559827-21kworker/u16:1+flush-8:020:26:475
2450792993935,2cyclictest3119955-21kworker/u16:1+events_unbound00:31:505
2450792993935,2cyclictest3119955-21kworker/u16:1+events_unbound00:31:505
2450802993832,5cyclictest2854476-21latency_hist22:16:327
2450792993836,2cyclictest3012163-21kworker/u16:4+flush-8:023:34:175
2450792993836,2cyclictest2948857-21kworker/u16:2+events_unbound23:56:455
2450792993836,2cyclictest2635834-21kworker/u16:4+flush-8:021:51:595
2450792993836,2cyclictest2635834-21kworker/u16:4+events_unbound21:28:145
2450792993836,2cyclictest2635834-21kworker/u16:4+events_unbound21:20:035
2450792993835,2cyclictest2628364-21kworker/u16:2+flush-8:021:31:455
2450792993735,2cyclictest3119955-21kworker/u16:1+events_unbound00:13:145
2450792993735,2cyclictest2948857-21kworker/u16:2+events_unbound23:29:535
2450792993735,2cyclictest2839976-21kworker/u16:1+flush-8:022:21:145
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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