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2026-07-17 - 04:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Fri Jul 17, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18194352970,1sleep40-21swapper/421:20:004
155697324611,30sleep70-21swapper/719:07:117
1557444994442,2cyclictest1904681-21kworker/u16:2+flush-8:022:40:026
1557444994139,2cyclictest2124915-21kworker/u16:4+events_unbound00:15:026
1557439994138,2cyclictest1930016-21kworker/u16:0+flush-8:022:55:034
632489400,33rtkit-daemon0-21swapper/519:04:535
1557439994037,2cyclictest1990629-21kworker/u16:4+flush-8:022:50:184
1557444993937,2cyclictest2124915-21kworker/u16:4+events_unbound23:35:066
1557444993937,2cyclictest1765460-21kworker/u16:0+flush-8:021:00:186
155701123929,7sleep60-21swapper/619:07:426
1557444993835,2cyclictest2124915-21kworker/u16:4+events_unbound23:55:026
1557444993835,2cyclictest1672805-21kworker/u16:2+events_unbound21:09:506
1557439993836,2cyclictest1941353-21kworker/u16:3+flush-8:022:25:034
1557439993836,2cyclictest1941353-21kworker/u16:3+events_unbound22:19:384
1557439993836,2cyclictest1765460-21kworker/u16:0+events_unbound21:42:424
1557439993836,2cyclictest1711348-21kworker/u16:4+flush-8:021:35:034
1557444993734,2cyclictest1711348-21kworker/u16:4+events_unbound21:25:186
1557439993735,2cyclictest1941353-21kworker/u16:3+flush-8:022:42:594
1557439993734,2cyclictest2124915-21kworker/u16:4+events_unbound23:49:554
1557444993634,2cyclictest1990628-21kworker/u16:1+events_unbound00:11:196
1557444993634,2cyclictest1930016-21kworker/u16:0+events_unbound23:05:066
1557444993634,2cyclictest1672805-21kworker/u16:2+flush-8:020:15:036
1557439993634,2cyclictest2124915-21kworker/u16:4+events_unbound00:05:244
1557439993634,2cyclictest1990628-21kworker/u16:1+events_unbound23:42:394
1557444993534,1cyclictest2124915-21kworker/u16:4+events_unbound00:27:296
1557444993533,2cyclictest2149735-21kworker/u16:0+events_unbound00:07:386
1557444993533,2cyclictest2124915-21kworker/u16:4+events_unbound23:59:556
1557444993533,2cyclictest1990628-21kworker/u16:1+events_unbound22:47:586
1557444993533,2cyclictest1941353-21kworker/u16:3+flush-8:022:38:226
1557444993532,2cyclictest1528570-21kworker/u16:3+events_unbound20:20:066
1557439993533,2cyclictest1990628-21kworker/u16:1+events_unbound00:17:344
1557439993533,2cyclictest1990628-21kworker/u16:1+events_unbound00:09:554
1557448993432,1cyclictest0-21swapper/719:35:187
1557444993432,2cyclictest1765460-21kworker/u16:0+flush-8:021:44:306
1557444993432,2cyclictest1711348-21kworker/u16:4+flush-8:020:25:116
1557444993432,2cyclictest1711348-21kworker/u16:4+flush-8:020:25:116
1557444993431,2cyclictest1876868-21kworker/u16:1+flush-8:022:00:026
1557439993432,2cyclictest2272049-21kworker/u16:6+events_unbound00:31:024
1557439993432,2cyclictest2272049-21kworker/u16:6+events_unbound00:31:024
1557439993432,2cyclictest2235184-21kworker/u16:3+events_unbound00:28:194
1557439993432,2cyclictest2137477-21kworker/u16:2+events_unbound23:33:214
1557439993432,2cyclictest2124915-21kworker/u16:4+events_unbound00:36:384
1557439993432,2cyclictest2124915-21kworker/u16:4+events_unbound00:36:384
1557439993432,2cyclictest1930016-21kworker/u16:0+events_unbound23:13:034
1557439993432,2cyclictest1793280-21kworker/u16:1+events_unbound21:18:184
1557439993432,2cyclictest1711348-21kworker/u16:4+events_unbound21:58:514
1557439993432,2cyclictest1711348-21kworker/u16:4+events_unbound21:27:024
1557444993331,2cyclictest2124915-21kworker/u16:4+events_unbound23:50:256
1557444993331,2cyclictest1930016-21kworker/u16:0+flush-8:022:10:106
1557439993331,2cyclictest2124915-21kworker/u16:4+flush-8:023:25:034
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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