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2026-05-31 - 21:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sun May 31, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1684397996260,2cyclictest2268560-21kworker/u16:3+events_unbound12:27:195
168401625848,7sleep40-21swapper/407:05:374
1684397995755,2cyclictest2341130-21kworker/u16:2+events_unbound12:02:125
1684397995452,2cyclictest2169454-21kworker/u16:5+flush-8:011:52:235
1684397995351,2cyclictest972153-21kworker/u16:2+flush-8:011:42:095
168386525342,7sleep50-21swapper/507:03:305
1684397995149,2cyclictest2305954-21kworker/u16:0+events_unbound12:32:265
1684397995149,2cyclictest2124041-21kworker/u16:0+events_unbound11:27:115
1684397995149,2cyclictest2124041-21kworker/u16:0+events_unbound11:12:265
1684409994846,1cyclictest1918623-21diskmemload12:07:277
1684409994846,1cyclictest1918623-21diskmemload12:07:277
1684395994744,2cyclictest2124041-21kworker/u16:0+flush-8:011:03:334
1684397994643,2cyclictest2124041-21kworker/u16:0+events_unbound11:22:085
1684409994541,2cyclictest2350481-21users12:02:307
1684397994543,2cyclictest972153-21kworker/u16:2+events_unbound11:47:235
1684395994543,2cyclictest1752622-21kworker/u16:1+flush-8:008:16:544
1684409994239,2cyclictest2294732-21kthreadcore11:42:127
1684397994139,2cyclictest972153-21kworker/u16:2+events_unbound11:19:125
1684397994139,2cyclictest2169454-21kworker/u16:5+events_unbound11:02:225
1684395994138,2cyclictest972153-21kworker/u16:2+flush-8:008:26:544
1684397994038,2cyclictest2305954-21kworker/u16:0+events_unbound11:57:135
1684397994038,2cyclictest2268560-21kworker/u16:3+events_unbound12:14:435
1684397994038,2cyclictest1880200-21kworker/u16:0+events_unbound09:34:295
1684397994037,2cyclictest1752622-21kworker/u16:1+flush-8:008:17:215
168440999380,36cyclictest1940811-21ssh09:13:297
168440999380,36cyclictest1930593-21latency_hist09:11:547
1684397993836,2cyclictest972153-21kworker/u16:2+events_unbound09:15:365
1684397993836,2cyclictest2305954-21kworker/u16:0+events_unbound12:10:235
1684397993836,2cyclictest2305954-21kworker/u16:0+events_unbound12:10:235
1684397993836,2cyclictest2268560-21kworker/u16:3+events_unbound12:22:125
1684397993836,2cyclictest1880200-21kworker/u16:0+events_unbound09:58:085
1684397993835,2cyclictest2124041-21kworker/u16:0+events_unbound10:52:365
16800152382,30sleep70-21swapper/707:02:197
1684409993734,2cyclictest2414065-21df12:32:087
1684397993735,2cyclictest972153-21kworker/u16:2+events_unbound10:43:315
1684397993735,2cyclictest2365102-21kworker/u16:1+events_unbound12:20:405
1684397993735,2cyclictest2268560-21kworker/u16:3+events_unbound11:33:155
1684397993735,2cyclictest2024440-21kworker/u16:1+events_unbound10:18:245
1684397993735,2cyclictest1880200-21kworker/u16:0+events_unbound10:03:135
1684397993735,2cyclictest1880200-21kworker/u16:0+events_unbound09:08:495
1684395993735,2cyclictest2268560-21kworker/u16:3+events_unbound12:21:544
1684397993634,2cyclictest972153-21kworker/u16:2+flush-8:010:35:565
1684397993634,2cyclictest972153-21kworker/u16:2+flush-8:007:07:235
1684397993634,2cyclictest972153-21kworker/u16:2+events_unbound11:01:165
1684397993634,2cyclictest972153-21kworker/u16:2+events_unbound09:48:535
1684397993634,2cyclictest972153-21kworker/u16:2+events_unbound08:36:565
1684397993634,2cyclictest2169454-21kworker/u16:5+events_unbound10:50:095
1684397993634,2cyclictest2169454-21kworker/u16:5+events_unbound10:50:095
1684397993632,2cyclictest1880200-21kworker/u16:0+events_unbound09:28:205
1684397993533,2cyclictest972153-21kworker/u16:2+events_unbound10:38:455
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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