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2026-08-13 - 13:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Thu Aug 13, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
90381925646,7sleep40-21swapper/407:06:404
9031752485,32sleep70-21swapper/707:03:387
89459924534,7sleep50-21swapper/507:03:045
904212994340,2cyclictest946544-21kworker/u16:1+flush-8:007:28:016
904203994341,2cyclictest1346942-21kworker/u16:2+flush-8:010:33:324
904203994037,2cyclictest1410659-21kworker/u16:4+flush-8:011:19:214
904203993836,2cyclictest1155869-21kworker/u16:5+events_unbound09:14:134
904203993835,2cyclictest1074336-21kworker/u16:3+events_unbound09:23:024
904203993533,2cyclictest1016356-21kworker/u16:2+events_unbound09:28:014
904203993432,2cyclictest946544-21kworker/u16:1+flush-8:008:03:014
904212993331,2cyclictest1188075-21kworker/u16:1+events_unbound09:53:246
904203993331,2cyclictest1599225-21kworker/u16:5+events_unbound12:26:094
904203993331,2cyclictest1410659-21kworker/u16:4+events_unbound12:05:244
904203993331,2cyclictest1261138-21kworker/u16:3+flush-8:009:54:524
904203993331,2cyclictest1175634-21kworker/u16:0+events_unbound10:12:564
904217993226,5cyclictest648-21systemd-journal10:16:537
904207993229,2cyclictest1188075-21kworker/u16:1+flush-8:010:18:295
904203993230,2cyclictest1631195-21kworker/u16:3+events_unbound12:34:454
904203993230,2cyclictest1310900-21kworker/u16:4+events_unbound10:20:534
904203993129,2cyclictest1520007-21kworker/u16:0+events_unbound12:08:364
904203993129,2cyclictest1310900-21kworker/u16:4+events_unbound10:44:574
904203993129,2cyclictest1016356-21kworker/u16:2+flush-8:009:47:524
904203993128,2cyclictest1384699-21kworker/u16:1+events_unbound11:58:074
90376723121,7sleep60-21swapper/607:05:536
904217993028,1cyclictest0-21swapper/707:13:057
904212993027,2cyclictest1188075-21kworker/u16:1+flush-8:010:18:166
904207993028,2cyclictest1410659-21kworker/u16:4+flush-8:011:53:295
904203993028,2cyclictest1530629-21kworker/u16:3+events_unbound11:50:124
904203993028,2cyclictest1214453-21kworker/u16:3+events_unbound09:41:564
904203993028,2cyclictest1016356-21kworker/u16:2+events_unbound09:30:574
904212992927,2cyclictest1188075-21kworker/u16:1+events_unbound10:23:246
904212992926,2cyclictest1410659-21kworker/u16:4+events_unbound11:28:156
904203992927,2cyclictest956399-21kworker/u16:2+events_unbound07:43:324
904203992927,2cyclictest1410659-21kworker/u16:4+flush-8:011:06:334
904203992927,2cyclictest1408474-21kworker/u16:0+events_unbound10:54:284
904203992927,2cyclictest1408474-21kworker/u16:0+events_unbound10:54:284
904212992824,3cyclictest1175634-21kworker/u16:0+events_unbound09:23:146
904203992826,2cyclictest1471238-21kworker/u16:0+events_unbound11:32:524
904203992826,2cyclictest1188075-21kworker/u16:1+events_unbound10:25:294
904203992826,2cyclictest1016356-21kworker/u16:2+events_unbound09:49:124
904217992721,5cyclictest648-21systemd-journal09:03:017
904217992721,5cyclictest648-21systemd-journal09:03:017
904203992725,2cyclictest1520007-21kworker/u16:0+flush-8:011:44:164
904203992725,2cyclictest1520007-21kworker/u16:0+events_unbound11:41:404
904203992725,2cyclictest1471238-21kworker/u16:0+flush-8:011:25:194
904203992725,2cyclictest1384699-21kworker/u16:1+flush-8:010:59:004
904203992725,2cyclictest1346942-21kworker/u16:2+events_unbound10:32:134
904203992725,2cyclictest1016356-21kworker/u16:2+events_unbound10:13:414
13570472270,1chrt1357052-21sh10:33:247
904217992625,0cyclictest0-21swapper/711:33:297
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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