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2026-03-07 - 14:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sat Mar 07, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7334012720,1sleep40-21swapper/410:34:404
27693626351,8sleep60-21swapper/607:00:556
27694425848,7sleep50-21swapper/507:01:025
277461995551,3cyclictest979376-21kworker/u16:0+flush-8:012:19:474
277476995248,3cyclictest764645-21sed10:49:437
27688925242,7sleep40-21swapper/407:00:134
277461994947,2cyclictest568856-21kworker/u16:5+flush-8:010:19:554
27747699470,45cyclictest570503-21date09:29:187
27747699430,41cyclictest991355-21latency_hist12:24:187
277461994240,2cyclictest568855-21kworker/u16:3+flush-8:009:29:184
277476993934,4cyclictest606609-21latency_hist09:44:197
277461993835,2cyclictest500769-21kworker/u16:1+events_unbound09:49:314
2762422383,30sleep70-21swapper/706:59:527
277476993631,4cyclictest630700-21latency_hist09:54:187
277461993633,2cyclictest809025-21kworker/u16:3+flush-8:011:44:234
7367402340,1chrt736741-21unixbench_singl10:34:517
277469993432,2cyclictest809025-21kworker/u16:3+flush-8:011:09:595
277461993431,3cyclictest809025-21kworker/u16:3+flush-8:011:34:134
277461993431,2cyclictest631090-21kworker/u16:2+events_unbound10:09:314
277461993431,2cyclictest568856-21kworker/u16:5+events_unbound10:04:324
27747699320,30cyclictest824613-21sed11:14:367
277469993230,2cyclictest568856-21kworker/u16:5+events_unbound10:09:395
277461993230,2cyclictest568855-21kworker/u16:3+flush-8:010:44:544
277469993129,2cyclictest205325-21kworker/u16:0+events_unbound07:14:525
277469993129,2cyclictest205325-21kworker/u16:0+events_unbound07:04:445
277476992929,0cyclictest0-21swapper/711:46:017
277476992925,2cyclictest376577-21sed07:54:187
277461992927,2cyclictest631090-21kworker/u16:2+flush-8:011:04:464
8445362280,1sleep576-21ksoftirqd/511:19:535
8445362280,1sleep576-21ksoftirqd/511:19:535
277469992826,2cyclictest500769-21kworker/u16:1+events_unbound09:09:355
277469992826,2cyclictest462204-21kworker/u16:3+events_unbound08:49:455
277461992825,2cyclictest979376-21kworker/u16:0+flush-8:012:29:134
277476992725,1cyclictest610179-21ssh09:44:387
277476992725,1cyclictest510147-21diskmemload09:29:397
27747699271,24cyclictest481487-21grep08:49:187
27747699270,25cyclictest347817-21latency_hist07:39:197
5704272260,0sleep60-21swapper/609:29:186
277469992624,2cyclictest319601-21kworker/u16:2+flush-8:007:24:345
277469992624,2cyclictest277672-21kworker/u16:3+flush-8:007:09:235
277469992624,2cyclictest277672-21kworker/u16:3+flush-8:007:09:235
277469992623,2cyclictest386029-21kworker/u16:3+events_unbound08:19:475
277469992623,2cyclictest3757659-21kworker/u16:1+events_unbound08:24:385
277461992523,2cyclictest386029-21kworker/u16:3+flush-8:008:04:184
8503092240,1chrt850312-21kthreadcore11:24:367
277469992422,2cyclictest773590-21kworker/u16:1+events_unbound11:54:395
277469992422,2cyclictest568855-21kworker/u16:3+events_unbound09:39:315
277469992422,2cyclictest319601-21kworker/u16:2+flush-8:007:54:465
277469992422,2cyclictest319601-21kworker/u16:2+flush-8:007:54:465
277469992422,2cyclictest277672-21kworker/u16:3+flush-8:007:29:475
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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