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2026-05-10 - 15:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sun May 10, 2026 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
378960825226,8sleep40-21swapper/407:05:134
3790121994543,2cyclictest24978-21kworker/u16:3+flush-8:011:48:426
3790121994543,2cyclictest11916-21kworker/u16:0+events_unbound11:18:446
3790121993937,2cyclictest4024579-21kworker/u16:2+events_unbound09:31:036
3790120993937,2cyclictest4024579-21kworker/u16:2+events_unbound09:51:205
3790120993937,2cyclictest4024579-21kworker/u16:2+events_unbound09:18:035
37888812393,30sleep70-21swapper/707:03:487
3790121993836,2cyclictest11916-21kworker/u16:0+events_unbound11:32:116
3790121993835,2cyclictest4169466-21kworker/u16:3+events_unbound10:13:216
3790120993836,2cyclictest24978-21kworker/u16:3+events_unbound11:14:475
3790121993735,2cyclictest4024579-21kworker/u16:2+events_unbound09:44:206
3790121993735,2cyclictest232544-21kworker/u16:1+events_unbound12:29:076
3790121993735,2cyclictest232544-21kworker/u16:1+events_unbound12:05:086
3790120993735,2cyclictest11916-21kworker/u16:0+events_unbound11:00:315
3790122993630,5cyclictest186335-21latency_hist11:33:187
3790121993634,2cyclictest4024579-21kworker/u16:2+events_unbound09:50:596
3790121993634,2cyclictest11916-21kworker/u16:0+events_unbound10:54:596
3790120993634,2cyclictest4144845-21kworker/u16:1+events_unbound10:06:435
378955223625,8sleep50-21swapper/507:04:265
3790121993533,2cyclictest4097969-21kworker/u16:1+events_unbound09:43:006
3790121993533,2cyclictest3870877-21kworker/u16:0+events_unbound09:14:036
3790121993533,2cyclictest11916-21kworker/u16:0+events_unbound10:21:086
3790120993533,2cyclictest4074336-21kworker/u16:1+events_unbound09:29:195
3790120993533,2cyclictest4034561-21kworker/u16:4+events_unbound09:55:565
3790120993533,2cyclictest4024579-21kworker/u16:2+events_unbound10:09:115
3790120993533,2cyclictest24978-21kworker/u16:3+flush-8:012:04:555
3790120993533,2cyclictest24978-21kworker/u16:3+events_unbound11:04:435
3790120993533,2cyclictest24978-21kworker/u16:3+events_unbound10:50:235
3790120993533,2cyclictest11916-21kworker/u16:0+flush-8:010:40:475
3790120993533,2cyclictest11916-21kworker/u16:0+events_unbound11:28:165
3790121993432,2cyclictest74441-21kworker/u16:1+events_unbound11:36:116
3790121993432,2cyclictest74441-21kworker/u16:1+events_unbound10:49:236
3790121993432,2cyclictest4024579-21kworker/u16:2+events_unbound10:07:476
3790121993432,2cyclictest3870877-21kworker/u16:0+events_unbound09:27:086
3790121993432,2cyclictest11916-21kworker/u16:0+events_unbound11:46:036
3790121993432,2cyclictest11916-21kworker/u16:0+events_unbound10:38:076
3790120993432,2cyclictest3789830-21kworker/u16:3+events_unbound08:08:195
3790120993432,2cyclictest24978-21kworker/u16:3+events_unbound10:53:195
3790120993432,2cyclictest24978-21kworker/u16:3+events_unbound10:35:155
3790120993432,2cyclictest232544-21kworker/u16:1+events_unbound12:26:115
3790121993331,2cyclictest74441-21kworker/u16:1+events_unbound11:11:046
3790121993331,2cyclictest4144845-21kworker/u16:1+events_unbound10:11:206
3790121993331,2cyclictest4034561-21kworker/u16:4+events_unbound09:56:476
3790121993331,2cyclictest4024579-21kworker/u16:2+events_unbound10:44:206
3790121993331,2cyclictest4024579-21kworker/u16:2+events_unbound10:01:246
3790121993331,2cyclictest24978-21kworker/u16:3+events_unbound12:22:116
3790121993331,2cyclictest232544-21kworker/u16:1+events_unbound12:37:396
3790121993331,2cyclictest232544-21kworker/u16:1+events_unbound12:37:396
3790121993330,2cyclictest3870877-21kworker/u16:0+flush-8:009:18:356
3790120993331,2cyclictest4123255-21kworker/u16:0+flush-8:010:01:315
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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