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2026-04-21 - 06:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Tue Apr 21, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16353452940,1sleep50-21swapper/520:19:565
14926952940,0sleep50-21swapper/519:09:535
149039325848,7sleep40-21swapper/419:08:094
149033525025,7sleep50-21swapper/519:07:225
14818782446,32sleep70-21swapper/719:04:517
1490801993835,2cyclictest2051408-21kworker/u16:3+events_unbound23:26:015
1490805993533,2cyclictest1580868-21kworker/u16:3+events_unbound20:09:366
1490805993432,2cyclictest2015460-21kworker/u16:1+flush-8:023:27:496
1490801993432,2cyclictest1989149-21kworker/u16:2+flush-8:023:06:295
1490801993432,2cyclictest1989149-21kworker/u16:2+events_unbound23:43:145
1490801993432,2cyclictest1878855-21kworker/u16:0+events_unbound23:13:225
1490801993432,2cyclictest1724657-21kworker/u16:2+events_unbound21:17:115
1490801993431,2cyclictest2051408-21kworker/u16:3+events_unbound23:49:395
1490805993331,2cyclictest2100208-21kworker/u16:1+events_unbound00:18:456
1490805993331,2cyclictest1866582-21kworker/u16:1+events_unbound22:19:386
1490805993331,2cyclictest1784540-21kworker/u16:0+events_unbound21:50:466
1490805993331,2cyclictest1784540-21kworker/u16:0+events_unbound21:50:466
1490801993331,2cyclictest2073133-21kworker/u16:0+events_unbound23:47:215
1490801993331,2cyclictest1989149-21kworker/u16:2+flush-8:000:24:455
1490801993331,2cyclictest1878855-21kworker/u16:0+events_unbound22:22:305
1490801993230,2cyclictest2100208-21kworker/u16:1+events_unbound00:13:425
1490801993230,2cyclictest1989149-21kworker/u16:2+flush-8:023:36:425
1490801993230,2cyclictest1989149-21kworker/u16:2+flush-8:023:32:465
1490801993230,2cyclictest1989149-21kworker/u16:2+events_unbound00:19:065
1490801993230,2cyclictest1878855-21kworker/u16:0+events_unbound23:18:415
1490801993230,2cyclictest1878855-21kworker/u16:0+events_unbound23:18:415
1490801993230,2cyclictest1878855-21kworker/u16:0+events_unbound22:36:265
1490801993230,2cyclictest1866582-21kworker/u16:1+flush-8:022:31:105
1490801993230,2cyclictest1733716-21kworker/u16:4+events_unbound21:57:415
1490801993230,2cyclictest1695369-21kworker/u16:3+events_unbound22:18:105
1490805993129,2cyclictest1695369-21kworker/u16:3+flush-8:021:29:356
1490801993129,2cyclictest2073133-21kworker/u16:0+events_unbound00:03:555
1490801993129,2cyclictest1989149-21kworker/u16:2+flush-8:022:59:095
1490801993129,2cyclictest1906053-21kworker/u16:4+events_unbound22:29:265
1490801993129,2cyclictest1878855-21kworker/u16:0+events_unbound23:03:385
1490801993129,2cyclictest1845635-21kworker/u16:0+events_unbound22:01:575
1490801993129,2cyclictest1757895-21kworker/u16:1+events_unbound21:27:025
1490801993129,2cyclictest1628388-21kworker/u16:0+events_unbound20:57:535
1490801993128,2cyclictest2073133-21kworker/u16:0+flush-8:000:04:375
1490796993128,2cyclictest1866582-21kworker/u16:1+flush-8:022:14:354
149045123120,8sleep60-21swapper/619:08:596
1490805993028,2cyclictest1906053-21kworker/u16:4+events_unbound22:35:306
1490805993027,2cyclictest1695369-21kworker/u16:3+events_unbound21:14:576
1490801993028,2cyclictest1989149-21kworker/u16:2+events_unbound23:58:255
1490801993028,2cyclictest1989149-21kworker/u16:2+events_unbound00:24:135
1490801993028,2cyclictest1866582-21kworker/u16:1+events_unbound22:06:095
1490801993028,2cyclictest1757895-21kworker/u16:1+events_unbound21:21:145
1490801993028,2cyclictest1695369-21kworker/u16:3+flush-8:021:52:255
1490801993028,2cyclictest1695369-21kworker/u16:3+flush-8:021:52:255
1490805992927,2cyclictest1989149-21kworker/u16:2+events_unbound23:17:296
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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