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2025-12-16 - 15:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Tue Dec 16, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21929562610,0sleep72192957-21uname12:04:597
161472325520,30sleep70-21swapper/707:05:187
1615322994239,2cyclictest2239874-21kworker/u16:4+events_unbound12:29:564
1615332993730,6cyclictest1735345-21latency_hist08:09:437
161487823727,7sleep60-21swapper/607:07:256
1615327993532,2cyclictest2065130-21kworker/u16:4+flush-8:010:59:565
1615332993428,5cyclictest1686859-21latency_hist07:44:437
1615322993431,2cyclictest2006642-21kworker/u16:2+events_unbound11:04:434
1615322993331,2cyclictest1726017-21kworker/u16:2+events_unbound08:29:454
161500023321,9sleep40-21swapper/407:09:084
1615322993231,1cyclictest1861527-21kworker/u16:0+flush-8:009:49:424
161479423221,8sleep50-21swapper/507:06:125
1615322993129,2cyclictest2152897-21kworker/u16:3+events_unbound12:15:024
1615328993028,2cyclictest2006642-21kworker/u16:2+flush-8:010:40:126
1615328992927,2cyclictest2041656-21kworker/u16:0+events_unbound11:02:546
1615327992927,2cyclictest2143207-21kworker/u16:1+flush-8:012:05:115
1615327992927,2cyclictest2025336-21kworker/u16:3+events_unbound11:17:535
1615322992927,2cyclictest1948904-21kworker/u16:2+events_unbound10:09:584
19478892280,1chrt1939382-21/usr/sbin/munin09:55:117
1615328992826,2cyclictest2216109-21kworker/u16:2+events_unbound12:27:136
1615328992826,2cyclictest2025336-21kworker/u16:3+events_unbound11:24:596
1615328992826,2cyclictest2025336-21kworker/u16:3+events_unbound11:24:596
1615328992826,2cyclictest1821770-21kworker/u16:4+events_unbound09:03:536
1615328992826,2cyclictest1821770-21kworker/u16:4+events_unbound09:03:536
1615327992826,2cyclictest1657821-21kworker/u16:1+events_unbound07:39:455
1615328992725,2cyclictest1975695-21kworker/u16:3+events_unbound10:17:496
1615328992725,2cyclictest1850834-21kworker/u16:5+events_unbound09:05:176
1615328992724,2cyclictest1881086-21kworker/u16:2+events_unbound09:24:456
1615322992725,2cyclictest2041656-21kworker/u16:0+flush-8:010:49:374
1615322992725,2cyclictest2006642-21kworker/u16:2+flush-8:010:50:024
1615328992624,2cyclictest2239874-21kworker/u16:4+flush-8:012:39:426
1615328992624,2cyclictest2216109-21kworker/u16:2+events_unbound12:31:536
1615328992624,2cyclictest2143207-21kworker/u16:1+events_unbound12:07:136
1615328992624,2cyclictest2006642-21kworker/u16:2+events_unbound11:59:056
1615327992624,2cyclictest2152897-21kworker/u16:3+events_unbound12:01:535
1615327992624,2cyclictest1861527-21kworker/u16:0+events_unbound09:53:535
1615327992624,2cyclictest1821770-21kworker/u16:4+events_unbound10:24:305
1615327992624,2cyclictest1745291-21kworker/u16:3+events_unbound08:29:065
1615327992624,2cyclictest1726017-21kworker/u16:2+events_unbound08:15:545
1615327992623,2cyclictest1821770-21kworker/u16:4+flush-8:010:14:585
1615327992623,2cyclictest1764594-21kworker/u16:0+events_unbound08:39:455
1615322992624,2cyclictest1915219-21kworker/u16:1+events_unbound09:54:434
1615322992624,2cyclictest1821770-21kworker/u16:4+flush-8:009:10:064
1615328992523,2cyclictest2041656-21kworker/u16:0+events_unbound11:08:576
1615328992523,2cyclictest2025336-21kworker/u16:3+events_unbound10:50:536
1615328992523,2cyclictest1915219-21kworker/u16:1+events_unbound09:53:336
1615328992523,2cyclictest1614293-21kworker/u16:0+events_unbound07:10:016
1615327992524,1cyclictest2006642-21kworker/u16:2+events_unbound11:19:565
1615327992523,2cyclictest2216109-21kworker/u16:2+events_unbound12:25:535
1615327992523,2cyclictest1915219-21kworker/u16:1+events_unbound10:11:345
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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