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2026-08-10 - 12:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Mon Aug 10, 2026 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32658072720,1sleep50-21swapper/523:54:215
262023725822,31sleep70-21swapper/719:05:197
262035825141,7sleep40-21swapper/419:07:014
2620741994944,4cyclictest3219544-21latency_hist23:38:147
262027624737,7sleep60-21swapper/619:05:516
2620735994341,2cyclictest3173074-21kworker/u16:0+events_unbound23:33:425
262040424131,7sleep50-21swapper/519:07:425
2620735993836,2cyclictest2892272-21kworker/u16:3+events_unbound21:58:435
2620735993835,2cyclictest1834744-21kworker/u16:5+events_unbound19:53:175
2620735993735,2cyclictest3231744-21kworker/u16:4+events_unbound00:29:125
2620735993735,2cyclictest3217933-21kworker/u16:3+flush-8:000:03:145
2620735993735,2cyclictest3147587-21kworker/u16:1+events_unbound23:27:135
2620741993633,2cyclictest2857640-21diskmemload00:08:297
2620739993634,2cyclictest3217933-21kworker/u16:3+events_unbound00:35:216
2620735993634,2cyclictest2644220-21kworker/u16:2+events_unbound21:11:025
2620739993533,2cyclictest2926892-21kworker/u16:4+events_unbound22:55:216
2620739993533,2cyclictest2926892-21kworker/u16:4+events_unbound22:22:376
2620739993533,2cyclictest2892272-21kworker/u16:3+events_unbound21:58:476
2620735993533,2cyclictest3111074-21kworker/u16:3+events_unbound22:57:425
2620735993533,2cyclictest3035537-21kworker/u16:0+events_unbound22:19:185
2620726993533,2cyclictest2610852-21kworker/u16:3+flush-8:019:38:434
262074199340,32cyclictest2881761-21latency_hist21:18:157
2620739993432,2cyclictest3173074-21kworker/u16:0+flush-8:023:32:366
2620739993432,2cyclictest2859399-21kworker/u16:0+events_unbound21:12:536
2620739993432,2cyclictest2789457-21kworker/u16:1+events_unbound21:21:046
2620735993432,2cyclictest3292391-21kworker/u16:2+flush-8:000:16:485
2620735993432,2cyclictest3159607-21kworker/u16:5+events_unbound23:16:065
2620735993432,2cyclictest3147587-21kworker/u16:1+events_unbound23:42:375
2620735993432,2cyclictest3147587-21kworker/u16:1+events_unbound23:42:375
2620735993432,2cyclictest2926892-21kworker/u16:4+events_unbound22:32:575
2620735993432,2cyclictest2918001-21kworker/u16:2+events_unbound21:36:055
2620735993432,2cyclictest2892272-21kworker/u16:3+events_unbound21:22:065
2620741993327,5cyclictest648-21systemd-journal21:13:157
2620739993331,2cyclictest3173074-21kworker/u16:0+events_unbound23:41:176
2620739993331,2cyclictest3173074-21kworker/u16:0+events_unbound23:41:176
2620739993331,2cyclictest2892272-21kworker/u16:3+events_unbound21:33:056
2620735993331,2cyclictest3217933-21kworker/u16:3+events_unbound00:35:135
2620735993331,2cyclictest2951875-21kworker/u16:0+events_unbound21:54:415
2620735993331,2cyclictest2926892-21kworker/u16:4+flush-8:021:50:335
2620735993331,2cyclictest2926892-21kworker/u16:4+events_unbound22:42:495
2620735993331,2cyclictest2926892-21kworker/u16:4+events_unbound22:37:485
2620735993331,2cyclictest2926892-21kworker/u16:4+events_unbound22:12:025
2620735993331,2cyclictest2892272-21kworker/u16:3+events_unbound22:16:575
2620735993331,2cyclictest2859399-21kworker/u16:0+events_unbound21:32:225
2620726993331,2cyclictest3231744-21kworker/u16:4+flush-8:000:28:294
2620741993227,4cyclictest3014491-21latency_hist22:13:157
2620739993230,2cyclictest3231744-21kworker/u16:4+events_unbound00:24:486
2620739993230,2cyclictest3147587-21kworker/u16:1+events_unbound23:27:486
2620739993230,2cyclictest3048750-21kworker/u16:1+flush-8:022:30:096
2620739993230,2cyclictest2926892-21kworker/u16:4+events_unbound23:08:096
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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