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2025-12-01 - 06:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Mon Dec 01, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
410902325848,7sleep60-21swapper/603:18:486
4109681995451,2cyclictest30610-21kworker/u16:5+flush-8:005:02:576
410923525039,7sleep40-21swapper/403:21:434
4109684994843,4cyclictest556389-21latency_hist08:42:567
4109681994644,2cyclictest505475-21kworker/u16:5+events_unbound08:13:216
4109681994240,2cyclictest364805-21kworker/u16:3+events_unbound07:08:206
410916024231,7sleep50-21swapper/503:20:405
41090432427,30sleep70-21swapper/703:19:057
410968499410,39cyclictest589235-21systemd-journal07:07:577
4109681994138,2cyclictest302373-21kworker/u16:3+flush-8:006:37:576
4109673994139,2cyclictest130874-21kworker/u16:3+events_unbound05:13:124
410968499400,38cyclictest293255-21latency_hist06:27:577
4109676993836,2cyclictest353582-21kworker/u16:2+flush-8:006:58:235
4109676993735,2cyclictest302373-21kworker/u16:3+events_unbound06:35:205
4109676993634,2cyclictest30610-21kworker/u16:5+flush-8:004:25:205
4109681993533,2cyclictest3396967-21kworker/u16:7+events_unbound03:23:126
4109681993533,2cyclictest242783-21kworker/u16:1+events_unbound06:53:216
4109681993532,2cyclictest212293-21kworker/u16:3+flush-8:006:03:206
4109676993533,2cyclictest60443-21kworker/u16:0+flush-8:004:53:235
4109676993533,2cyclictest251947-21kworker/u16:4+events_unbound06:13:255
4109681993431,2cyclictest323223-21kworker/u16:4+flush-8:006:42:576
4109676993432,2cyclictest434637-21kworker/u16:4+events_unbound07:50:055
4109676993431,2cyclictest505475-21kworker/u16:5+flush-8:008:18:235
4109673993432,2cyclictest353582-21kworker/u16:2+flush-8:007:08:244
4109676993331,2cyclictest242783-21kworker/u16:1+events_unbound06:26:095
4109676993330,2cyclictest60985-21kworker/u16:2+flush-8:005:02:595
4109684993231,0cyclictest0-21swapper/704:49:177
4109684993231,0cyclictest0-21swapper/703:39:087
4109676993230,2cyclictest60443-21kworker/u16:0+flush-8:005:08:285
4109676993230,2cyclictest364805-21kworker/u16:3+events_unbound07:42:115
4109676993230,2cyclictest323223-21kworker/u16:4+events_unbound07:14:125
4109676993230,2cyclictest323223-21kworker/u16:4+events_unbound07:03:525
4109676993230,2cyclictest251947-21kworker/u16:4+events_unbound06:03:395
4109676993230,2cyclictest242783-21kworker/u16:1+flush-8:006:51:205
4109676993230,2cyclictest212293-21kworker/u16:3+flush-8:005:55:395
4109676993229,3cyclictest4179563-21kworker/u16:2+events_unbound04:05:195
4109673993230,2cyclictest60443-21kworker/u16:0+flush-8:005:23:234
4109673993230,2cyclictest242783-21kworker/u16:1+flush-8:006:03:124
4109673993230,2cyclictest19672-21kworker/u16:0+flush-8:004:13:124
4109681993129,2cyclictest364805-21kworker/u16:3+events_unbound07:18:206
4109681993128,2cyclictest323223-21kworker/u16:4+flush-8:007:13:126
4109676993129,2cyclictest60443-21kworker/u16:0+events_unbound06:01:495
4109676993129,2cyclictest535998-21kworker/u16:4+events_unbound08:35:245
4109676993129,2cyclictest30610-21kworker/u16:5+events_unbound04:40:005
4109676993129,2cyclictest19672-21kworker/u16:0+events_unbound04:12:055
4109676993129,2cyclictest162505-21kworker/u16:2+flush-8:005:28:485
4109684993029,0cyclictest0-21swapper/708:43:367
4109684993029,0cyclictest0-21swapper/707:25:247
4109684993029,0cyclictest0-21swapper/704:19:047
4109684993029,0cyclictest0-21swapper/703:47:167
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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