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2026-03-14 - 13:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sat Mar 14, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12885352710,0sleep40-21swapper/408:48:514
1083934996155,5cyclictest650-21systemd-journal09:28:517
108332125747,7sleep40-21swapper/406:59:304
1083922995654,2cyclictest1666034-21kworker/u16:2+events_unbound12:24:245
1083922995654,2cyclictest1399671-21kworker/u16:0+events_unbound10:29:205
1083922995452,2cyclictest1399671-21kworker/u16:0+events_unbound11:14:055
1083922995351,2cyclictest1497834-21kworker/u16:1+flush-8:012:14:205
1083922995149,2cyclictest1497834-21kworker/u16:1+flush-8:011:39:185
1083922995147,2cyclictest1497834-21kworker/u16:1+events_unbound11:12:085
1083934995045,4cyclictest1677991-21latency_hist11:33:507
1083922995049,1cyclictest1497834-21kworker/u16:1+events_unbound10:38:515
1083922995048,2cyclictest1106697-21kworker/u16:3+events_unbound07:54:165
1083921995047,2cyclictest1666034-21kworker/u16:2+events_unbound11:54:074
1083926994947,2cyclictest1317632-21kworker/u16:3+flush-8:009:23:516
1083922994947,2cyclictest1399671-21kworker/u16:0+flush-8:010:34:175
1083922994846,2cyclictest1530445-21kworker/u16:3+events_unbound10:49:205
1083922994846,2cyclictest1497834-21kworker/u16:1+events_unbound10:55:125
1083922994744,2cyclictest1193213-21kworker/u16:0+flush-8:008:43:515
1083922994644,2cyclictest1399671-21kworker/u16:0+events_unbound11:02:085
1083922994644,2cyclictest1399671-21kworker/u16:0+events_unbound11:02:085
1083922994644,2cyclictest1338925-21kworker/u16:2+events_unbound09:19:165
1083922994644,2cyclictest1317632-21kworker/u16:3+events_unbound09:27:425
1083934994539,5cyclictest1240706-21latency_hist08:23:507
1083934994539,5cyclictest1240706-21latency_hist08:23:507
1083922994543,2cyclictest1497834-21kworker/u16:1+events_unbound11:29:185
1083922994543,2cyclictest1338925-21kworker/u16:2+events_unbound09:13:135
1083922994542,2cyclictest1497834-21kworker/u16:1+flush-8:011:04:185
1083921994543,2cyclictest1666034-21kworker/u16:2+events_unbound12:09:184
1083922994442,2cyclictest1338925-21kworker/u16:2+events_unbound09:54:195
1083922994442,2cyclictest1174063-21kworker/u16:0+flush-8:007:49:215
1083922994341,2cyclictest1711625-21kworker/u16:0+flush-8:011:59:055
1083922994341,2cyclictest1641127-21kworker/u16:3+events_unbound11:25:125
1083922994341,2cyclictest1497834-21kworker/u16:1+events_unbound10:27:565
1083922994341,2cyclictest1437663-21kworker/u16:4+events_unbound10:21:375
1083922994341,2cyclictest1437663-21kworker/u16:4+events_unbound10:21:375
1083922994341,2cyclictest1317632-21kworker/u16:3+events_unbound09:38:335
1083922994341,2cyclictest1183449-21kworker/u16:2+flush-8:008:49:195
1083922994240,2cyclictest1784406-21kworker/u16:3+events_unbound12:32:415
1083922994240,2cyclictest1666034-21kworker/u16:2+flush-8:012:09:285
1083922994240,2cyclictest1497834-21kworker/u16:1+events_unbound12:21:485
1083922994240,2cyclictest1338925-21kworker/u16:2+events_unbound10:00:175
1083922994240,2cyclictest1338925-21kworker/u16:2+events_unbound09:52:105
1083922994240,2cyclictest1193213-21kworker/u16:0+flush-8:008:14:205
1083921994240,2cyclictest1530445-21kworker/u16:3+events_unbound10:41:484
1083921994240,2cyclictest1497834-21kworker/u16:1+events_unbound10:56:064
1083921994239,2cyclictest1641127-21kworker/u16:3+events_unbound11:23:084
107451724232,7sleep50-21swapper/506:58:595
12718862410,0sleep71271887-21cat08:39:087
1083922994140,1cyclictest1497834-21kworker/u16:1+events_unbound11:34:115
1083922994139,2cyclictest1437663-21kworker/u16:4+events_unbound10:17:345
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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