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2025-12-27 - 15:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sat Dec 27, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
180299724636,7sleep60-21swapper/607:06:496
180300524432,9sleep50-21swapper/507:06:565
18031112406,30sleep70-21swapper/707:08:277
180303123927,8sleep40-21swapper/407:07:194
1803459993629,6cyclictest2185978-21latency_hist10:23:597
1803450993533,2cyclictest1784108-21kworker/u16:3+flush-8:007:09:144
1803450993331,2cyclictest2118398-21kworker/u16:0+events_unbound10:24:154
1803459993125,5cyclictest2079144-21latency_hist09:29:007
22246672300,0chrt2224665-21sshd-session10:42:187
1803458993028,2cyclictest2233617-21kworker/u16:1+events_unbound10:44:256
1803458993028,2cyclictest1924387-21kworker/u16:0+events_unbound08:11:066
1803458992927,2cyclictest2118398-21kworker/u16:0+events_unbound09:53:176
1803458992927,2cyclictest2118398-21kworker/u16:0+events_unbound09:53:176
1803458992826,2cyclictest1835976-21kworker/u16:4+events_unbound07:30:236
1803458992826,2cyclictest1535055-21kworker/u16:2+events_unbound07:39:546
1803450992825,2cyclictest1903966-21kworker/u16:3+events_unbound09:54:194
1803458992725,2cyclictest2430545-21kworker/u16:1+flush-8:012:37:256
1803458992725,2cyclictest2301648-21kworker/u16:3+events_unbound11:21:546
1803458992725,2cyclictest2156860-21kworker/u16:3+flush-8:011:09:006
1803458992725,2cyclictest2156860-21kworker/u16:3+events_unbound10:59:436
1803458992624,2cyclictest2312017-21kworker/u16:2+events_unbound11:26:436
1803458992624,2cyclictest2312017-21kworker/u16:2+events_unbound11:26:436
1803458992624,2cyclictest1942808-21kworker/u16:1+events_unbound09:32:186
1803458992624,2cyclictest1835976-21kworker/u16:4+flush-8:007:25:586
1803458992624,2cyclictest1803213-21kworker/u16:1+events_unbound07:13:546
1803450992624,2cyclictest2030747-21kworker/u16:0+events_unbound09:04:154
1803458992523,2cyclictest2361000-21kworker/u16:5+events_unbound12:18:176
1803458992523,2cyclictest2361000-21kworker/u16:5+events_unbound12:02:456
1803458992523,2cyclictest2312017-21kworker/u16:2+flush-8:011:39:306
1803458992523,2cyclictest2254388-21kworker/u16:2+events_unbound11:15:066
1803458992523,2cyclictest2156860-21kworker/u16:3+events_unbound11:13:226
1803458992523,2cyclictest2020674-21kworker/u16:2+events_unbound09:38:576
1803458992523,2cyclictest1942808-21kworker/u16:1+events_unbound10:09:266
1803458992523,2cyclictest1942808-21kworker/u16:1+events_unbound08:59:466
1803458992523,2cyclictest1903966-21kworker/u16:3+events_unbound08:41:376
1803458992523,2cyclictest1784108-21kworker/u16:3+events_unbound07:23:036
1803450992523,2cyclictest2254388-21kworker/u16:2+events_unbound11:04:274
1803450992523,2cyclictest1535055-21kworker/u16:2+events_unbound08:14:124
1803450992523,2cyclictest1535055-21kworker/u16:2+events_unbound08:14:124
1803458992422,2cyclictest2361000-21kworker/u16:5+events_unbound12:11:346
1803458992422,2cyclictest2361000-21kworker/u16:5+events_unbound12:07:136
1803458992422,2cyclictest2312017-21kworker/u16:2+events_unbound11:52:066
1803458992422,2cyclictest2200556-21kworker/u16:2+events_unbound10:33:136
1803458992422,2cyclictest2118398-21kworker/u16:0+events_unbound10:20:176
1803458992422,2cyclictest1942808-21kworker/u16:1+events_unbound09:41:236
1803458992422,2cyclictest1942808-21kworker/u16:1+events_unbound09:13:586
1803458992422,2cyclictest1924387-21kworker/u16:0+events_unbound08:23:546
1803458992422,2cyclictest1903966-21kworker/u16:3+events_unbound08:16:346
1803458992422,2cyclictest1903966-21kworker/u16:3+events_unbound08:16:346
1803458992422,2cyclictest1784108-21kworker/u16:3+events_unbound07:17:236
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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