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2026-03-22 - 18:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot3.osadl.org (updated Sun Mar 22, 2026 12:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13735342412392,14sleep30-21swapper/307:05:489
137404699387386,1cyclictest0-21swapper/912:19:5915
137404699386386,0cyclictest0-21swapper/911:36:5815
137404699386386,0cyclictest0-21swapper/911:21:5915
137404699386386,0cyclictest0-21swapper/910:32:5815
137404699386386,0cyclictest0-21swapper/910:03:5815
137404699386386,0cyclictest0-21swapper/909:16:5815
137404699386386,0cyclictest0-21swapper/908:47:5815
137404699385385,0cyclictest0-21swapper/911:31:5915
137404699385385,0cyclictest0-21swapper/911:25:5815
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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