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2026-07-01 - 16:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot3.osadl.org (updated Wed Jul 01, 2026 12:45:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
274831994220,422cyclictest0-21swapper/1211:26:594
2745342362356,4sleep80-21swapper/807:09:0814
2743302357350,4sleep70-21swapper/707:06:2713
2742812350329,14sleep140-21swapper/1407:05:456
2744222349329,14sleep120-21swapper/1207:07:364
2743802347307,14sleep00-21swapper/007:07:090
2743782347326,14sleep150-21swapper/1507:07:077
2744752346326,13sleep40-21swapper/407:08:1710
2744762345321,13sleep50-21swapper/507:08:1811
2745672344339,3sleep20-21swapper/207:09:368
2743982343323,13sleep110-21swapper/1107:07:193
2744582339319,14sleep60-21swapper/607:08:0212
2742942339318,14sleep90-21swapper/907:05:5615
2714052339318,14sleep30-21swapper/307:05:039
2743712338317,14sleep100-21swapper/1007:07:022
2744482337317,14sleep130-21swapper/1307:07:535
2744722332306,20sleep10-21swapper/107:08:141
27482299322322,0cyclictest0-21swapper/312:35:599
27482299322322,0cyclictest0-21swapper/309:20:009
27482299322322,0cyclictest0-21swapper/307:47:589
27482299322322,0cyclictest0-21swapper/307:41:599
274828992860,286cyclictest0-21swapper/911:50:5915
274828992860,1cyclictest0-21swapper/911:57:5815
274824992850,1cyclictest0-21swapper/509:28:0011
274824992850,1cyclictest0-21swapper/509:27:5911
274828992840,284cyclictest0-21swapper/911:40:5815
27483399283281,2cyclictest2172-21Xorg10:54:596
27483399283279,4cyclictest2172-21Xorg10:40:006
27483399283279,4cyclictest2172-21Xorg10:40:006
27483399282280,2cyclictest2172-21Xorg11:10:596
27483399282279,3cyclictest2172-21Xorg10:16:596
27482899282279,3cyclictest0-21swapper/912:32:5915
27482899282279,3cyclictest0-21swapper/912:32:5915
27483399281278,3cyclictest2172-21Xorg10:04:006
27482899281279,2cyclictest0-21swapper/911:49:5915
27482899281279,2cyclictest0-21swapper/910:50:5815
27482899281278,3cyclictest0-21swapper/910:31:5915
27483399280277,3cyclictest2172-21Xorg10:56:006
27483399280277,3cyclictest2172-21Xorg10:12:006
27483299280278,2cyclictest2172-21Xorg11:18:005
27483299280278,2cyclictest2172-21Xorg11:18:005
27482899280278,2cyclictest0-21swapper/911:02:5915
27483399279275,4cyclictest2172-21Xorg09:25:006
27482899279276,3cyclictest0-21swapper/910:55:5915
27482499279278,1cyclictest0-21swapper/511:32:0011
27482899278276,2cyclictest0-21swapper/910:15:5815
27482499278276,2cyclictest0-21swapper/511:03:5911
27483399277274,3cyclictest2172-21Xorg10:46:596
27483399277274,3cyclictest2172-21Xorg09:55:006
27482499277276,1cyclictest0-21swapper/512:25:0011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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