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2026-03-23 - 12:45

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot3s.osadl.org (updated Mon Mar 23, 2026 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28808822281219,16sleep70-21swapper/719:06:307
28809842259217,33sleep40-21swapper/419:07:474
28788142258216,34sleep00-21swapper/019:05:020
28808542256247,6sleep60-21swapper/619:06:056
28808312256214,32sleep30-21swapper/319:05:453
28811152254214,16sleep50-21swapper/519:09:335
28809812252210,32sleep10-21swapper/119:07:451
28811392247223,15sleep20-21swapper/219:09:552
29738722450,0sleep30-21swapper/321:55:163
2881407993318,2cyclictest2577915-21kworker/0:0+events19:46:400
288142599320,31cyclictest0-21swapper/400:20:524
2881425993130,1cyclictest0-21swapper/420:15:144
2881407993029,1cyclictest2577915-21kworker/0:0+events22:25:220
2881425992927,1cyclictest0-21swapper/421:20:174
2881407992928,1cyclictest0-21swapper/000:20:530
2881407992926,2cyclictest2577915-21kworker/0:0+events20:15:140
2881411992827,1cyclictest0-21swapper/100:01:581
2881416992724,2cyclictest3052072-21updatedb00:18:232
30324762260,0sleep10-21swapper/123:40:251
288144299260,1cyclictest0-21swapper/722:30:157
288143499260,24cyclictest0-21swapper/621:57:186
288143499260,22cyclictest0-21swapper/622:10:166
288141699260,26cyclictest0-21swapper/222:14:232
288141199260,24cyclictest0-21swapper/122:32:201
288141199260,24cyclictest0-21swapper/100:12:411
2881407992623,2cyclictest2954788-21cat21:20:160
2881442992521,3cyclictest1385-21snmpd19:56:207
2881442992521,3cyclictest1385-21snmpd00:28:217
2881442992518,5cyclictest0-21swapper/722:18:547
2881442992518,5cyclictest0-21swapper/721:43:307
2881434992521,3cyclictest1385-21snmpd23:30:256
2881434992521,3cyclictest1385-21snmpd21:45:486
2881434992521,3cyclictest1385-21snmpd19:10:226
2881434992521,3cyclictest1385-21snmpd00:27:026
288143499250,23cyclictest0-21swapper/621:08:056
2881429992520,4cyclictest1385-21snmpd20:41:015
288142999251,1cyclictest0-21swapper/500:19:375
2881420992521,3cyclictest1385-21snmpd19:51:523
2881420992521,3cyclictest1385-21snmpd19:10:123
2881420992518,3cyclictest0-21swapper/300:15:153
2881420992513,1cyclictest0-21swapper/319:25:133
2881416992522,3cyclictest1385-21snmpd21:58:192
2881416992521,3cyclictest2957512-21cat21:25:152
2881416992518,3cyclictest0-21swapper/221:39:502
2881407992521,2cyclictest2577915-21kworker/0:0+events21:40:200
2881442992420,3cyclictest3001437-21awk22:45:157
288144299240,24cyclictest0-21swapper/723:53:347
288144299240,24cyclictest0-21swapper/723:38:367
288144299240,24cyclictest0-21swapper/720:32:467
288144299240,24cyclictest0-21swapper/719:41:027
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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