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2026-08-09 - 02:04

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot3s.osadl.org (updated Sun Aug 09, 2026 00:44:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22286342262214,16sleep40-21swapper/418:51:124
22286482259217,32sleep70-21swapper/718:51:237
22285512257214,33sleep00-21swapper/018:49:590
22283492257216,33sleep50-21swapper/518:47:405
22284602255207,38sleep10-21swapper/118:48:521
22285542248224,16sleep30-21swapper/318:50:033
22284912248223,8sleep60-21swapper/618:49:156
22286802246222,16sleep20-21swapper/218:51:432
23775732900,0sleep60-21swapper/623:31:476
23775732900,0sleep60-21swapper/623:31:476
2229031993634,1cyclictest2201132-21kworker/1:0+events20:53:251
2229031993331,2cyclictest2201132-21kworker/1:0+events21:30:301
2229031993230,1cyclictest2201132-21kworker/1:0+events22:23:201
2229031993130,1cyclictest2201132-21kworker/1:0+events20:27:241
2229054992927,1cyclictest0-21swapper/622:23:216
2229046992910,17cyclictest0-21swapper/422:03:014
2229041992821,6cyclictest1390-21snmpd19:08:463
222905899270,1cyclictest0-21swapper/723:23:487
222905099270,22cyclictest0-21swapper/519:14:155
2229046992724,2cyclictest0-21swapper/423:10:394
222904199270,25cyclictest0-21swapper/320:42:213
222905899260,24cyclictest0-21swapper/720:02:387
222905899260,22cyclictest0-21swapper/720:56:567
2229050992621,3cyclictest2256163-21ntpq19:40:065
2229050992620,4cyclictest2301290-21latency_hist21:09:125
2229050992620,4cyclictest2301290-21latency_hist21:09:125
222905099260,24cyclictest0-21swapper/500:13:055
222905099260,22cyclictest0-21swapper/520:15:115
2229046992619,5cyclictest0-21swapper/423:42:094
222904699260,24cyclictest0-21swapper/420:49:374
222904699260,22cyclictest0-21swapper/423:36:014
222904699260,22cyclictest0-21swapper/423:36:004
222904699260,22cyclictest0-21swapper/422:14:494
2229041992622,3cyclictest1390-21snmpd22:03:203
2229031992624,1cyclictest2201132-21kworker/1:0+events23:47:271
222902699260,24cyclictest0-21swapper/020:01:080
2229058992522,2cyclictest1390-21snmpd19:18:537
2229058992521,3cyclictest1390-21snmpd19:58:327
2229058992518,3cyclictest0-21swapper/721:32:017
222905899250,24cyclictest0-21swapper/720:53:257
222905899250,1cyclictest0-21swapper/719:52:327
2229054992521,3cyclictest1390-21snmpd21:48:546
2229050992521,3cyclictest1390-21snmpd23:19:325
2229050992518,5cyclictest0-21swapper/523:42:455
2229046992518,5cyclictest0-21swapper/419:16:124
222904699250,24cyclictest0-21swapper/400:19:144
2229041992521,4cyclictest1390-21snmpd21:54:363
2229041992521,3cyclictest1390-21snmpd23:56:203
2229041992520,4cyclictest1390-21snmpd22:52:573
2229041992519,2cyclictest1390-21snmpd20:11:423
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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