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2026-07-09 - 12:07

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot3s.osadl.org (updated Thu Jul 09, 2026 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13622632268259,6sleep30-21swapper/318:26:113
13625332262213,16sleep00-21swapper/018:29:350
13624282257217,16sleep10-21swapper/118:28:251
13624542255215,16sleep60-21swapper/618:28:386
13622262252214,29sleep20-21swapper/218:25:332
13622582250208,32sleep70-21swapper/718:26:077
13623492240215,17sleep40-21swapper/418:27:244
13622202239214,17sleep50-21swapper/518:25:275
1362855993634,1cyclictest1039879-21kworker/3:0+events19:59:453
136285099350,34cyclictest0-21swapper/220:32:422
1362866993210,1cyclictest0-21swapper/619:27:276
1362859993222,6cyclictest1433641-21awk20:50:124
1362866993129,1cyclictest1390-21snmpd20:28:416
136286299310,30cyclictest1266528-21kworker/5:1+mm_percpu_wq18:30:105
1362855993129,1cyclictest1039879-21kworker/3:0+events18:30:103
1362855993029,1cyclictest1039879-21kworker/3:0+events23:43:493
1362850993029,1cyclictest0-21swapper/220:11:352
1362842993029,1cyclictest0-21swapper/100:05:551
1362855992927,1cyclictest1039879-21kworker/3:0+events18:52:463
1362842992928,1cyclictest1390-21snmpd19:30:151
1362862992828,0cyclictest0-21swapper/521:29:285
1362859992822,5cyclictest1390-21snmpd21:40:094
1362855992827,1cyclictest1039879-21kworker/3:0+events21:29:283
1362850992822,4cyclictest0-21swapper/219:37:262
1362842992827,1cyclictest1390-21snmpd19:45:331
136286299270,1cyclictest0-21swapper/518:50:265
136287099260,22cyclictest0-21swapper/723:20:207
136286699260,22cyclictest0-21swapper/619:20:516
136286699260,22cyclictest0-21swapper/618:50:466
136286299260,22cyclictest0-21swapper/522:28:025
136286299260,22cyclictest0-21swapper/519:20:575
1362842992622,3cyclictest1390-21snmpd20:52:241
136283799260,24cyclictest0-21swapper/021:50:440
136283799260,24cyclictest0-21swapper/021:42:230
1362870992521,3cyclictest1390-21snmpd19:36:047
1362870992521,3cyclictest1390-21snmpd19:36:047
1362870992518,5cyclictest0-21swapper/721:57:167
1362866992521,3cyclictest1403345-21cat19:48:366
1362866992521,3cyclictest1390-21snmpd23:56:116
1362862992521,3cyclictest1390-21snmpd23:06:065
1362862992521,3cyclictest1390-21snmpd20:39:525
1362862992521,3cyclictest1390-21snmpd00:01:535
1362862992518,5cyclictest0-21swapper/518:39:585
136286299250,23cyclictest0-21swapper/522:54:305
1362859992521,4cyclictest1390-21snmpd21:50:534
1362859992521,3cyclictest1390-21snmpd23:58:384
1362859992521,3cyclictest1390-21snmpd19:59:534
1362859992516,3cyclictest0-21swapper/419:14:004
136285999250,24cyclictest0-21swapper/418:40:314
136285999250,23cyclictest0-21swapper/419:07:244
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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