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2025-12-21 - 10:02
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Note that this system runs a non-RT kernel.
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot4.osadl.org (updated Tue Dec 09, 2025 00:46:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22735722360352,5sleep150-21swapper/1519:06:087
22737262358318,32sleep90-21swapper/919:08:1215
22736872355311,14sleep110-21swapper/1119:07:423
22736462352308,14sleep100-21swapper/1019:07:082
22738252346324,14sleep120-21swapper/1219:09:364
22736012344322,14sleep80-21swapper/819:06:3414
22737912343320,15sleep140-21swapper/1419:09:046
22737492343320,15sleep130-21swapper/1319:08:315
22737232342319,15sleep60-21swapper/619:08:0812
22736532341319,14sleep00-21swapper/019:07:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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