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2025-11-22 - 19:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot4.osadl.org (updated Sat Nov 22, 2025 00:46:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14557142364342,14sleep30-21swapper/319:08:399
14556402362319,15sleep60-21swapper/619:07:3712
14556562358315,14sleep50-21swapper/519:07:5211
14556772354311,34sleep80-21swapper/819:08:1214
14556552350309,33sleep40-21swapper/419:07:5110
14555832349326,15sleep110-21swapper/1119:06:543
14555742347325,14sleep20-21swapper/219:06:458
14540152346337,6sleep120-21swapper/1219:05:184
14555032342319,14sleep100-21swapper/1019:05:492
14556412341318,15sleep70-21swapper/719:07:3813
14558112340318,14sleep90-21swapper/919:09:4915
14557442339314,16sleep150-21swapper/1519:09:077
14522432338315,15sleep10-21swapper/119:05:061
14556342337314,15sleep00-21swapper/019:07:310
14554902337315,14sleep140-21swapper/1419:05:366
14555062336312,15sleep130-21swapper/1319:05:525
145623699264263,1cyclictest1660757-21nodev-device-ev23:05:1915
145624299260258,1cyclictest1468371-21nodev-device-ev19:20:203
145621799259259,0cyclictest0-21swapper/319:20:209
145621799259258,1cyclictest1562439-21nodev-device-ev21:10:189
145624299258258,0cyclictest0-21swapper/1121:10:183
145621299176176,0cyclictest0-21swapper/223:30:188
145623999121120,1cyclictest1682116-21nodev-device-ev23:30:192
1456239999694,2cyclictest0-21swapper/1021:35:202
1456217999391,2cyclictest1694957-21nodev-device-ev23:45:189
1456242999290,2cyclictest0-21swapper/1123:45:183
1456212999291,1cyclictest0-21swapper/220:50:178
1456229999190,1cyclictest1737707-21nodev-device-ev00:35:1913
1456209999190,1cyclictest0-21swapper/121:00:181
1456254998988,1cyclictest1523933-21nodev-device-ev20:25:177
1456209998888,0cyclictest0-21swapper/123:05:181
1456232998685,1cyclictest0-21swapper/823:55:1514
1456207998685,1cyclictest1703498-21nodev-device-ev23:55:150
1456236998583,2cyclictest1536771-21nodev-device-ev20:40:1615
1456236998281,1cyclictest0-21swapper/921:15:2015
1456227997372,1cyclictest1673566-21nodev-device-ev23:20:1712
1456227997372,1cyclictest1673566-21nodev-device-ev23:20:1712
1456242997271,1cyclictest0-21swapper/1100:25:163
1456239997271,1cyclictest1630825-21nodev-device-ev22:30:172
1456217997271,1cyclictest1729155-21nodev-device-ev00:25:169
1456209996967,1cyclictest0-21swapper/121:40:171
1456236996766,1cyclictest1553871-21nodev-device-ev21:00:1815
1456239996665,1cyclictest0-21swapper/1022:15:182
1456212996362,1cyclictest0-21swapper/223:25:218
1456212996362,1cyclictest0-21swapper/223:25:208
1456219995655,1cyclictest1639376-21nodev-device-ev22:40:1810
1456242995352,1cyclictest1481198-21nodev-device-ev19:35:163
1456217995352,1cyclictest0-21swapper/319:35:169
1456229994948,1cyclictest1571299-21ntpq21:20:2213
1456229994948,1cyclictest1508077-21kworker/u32:3+flush-259:020:21:0213
1456229994948,1cyclictest1508077-21kworker/u32:3+flush-259:020:21:0213
1456229994642,4cyclictest0-21swapper/723:05:3213
1456252994544,1cyclictest0-21swapper/1423:00:196
1456229994541,4cyclictest1449994-21kworker/7:2-events21:25:1413
1456229994541,4cyclictest0-21swapper/700:26:4213
1456227994544,1cyclictest1665036-21nodev-device-ev23:10:2212
1456245994443,1cyclictest0-21swapper/1222:40:184
1456236994342,1cyclictest1588063-21nodev-device-ev21:40:1715
1456229994339,4cyclictest0-21swapper/720:15:5013
1456229994339,4cyclictest0-21swapper/720:15:5013
1456229994238,4cyclictest0-21swapper/723:00:2213
1456229994238,0cyclictest0-21swapper/700:23:3213
1456229994234,4cyclictest861ktimers/723:15:1613
1456229994234,4cyclictest861ktimers/723:15:1613
1456229994234,4cyclictest861ktimers/722:00:1813
1456229994137,4cyclictest0-21swapper/720:50:2013
1456229994137,0cyclictest0-21swapper/720:43:3813
1456229994133,4cyclictest1449994-21kworker/7:2-events22:11:5813
1456229994113,24cyclictest1449994-21kworker/7:2+mm_percpu_wq21:45:1813
145622999410,36cyclictest1449994-21kworker/7:2+mm_percpu_wq21:30:2013
1456254994039,1cyclictest0-21swapper/1500:35:197
1456229994036,4cyclictest851rcuc/700:17:1013
1456229994036,4cyclictest0-21swapper/721:05:2613
1456229994036,0cyclictest0-21swapper/719:35:2413
1456229994032,4cyclictest1449994-21kworker/7:2-events22:05:1413
1456229994032,4cyclictest0-21swapper/723:29:4813
1456229994032,4cyclictest0-21swapper/723:29:4813
1456229993936,3cyclictest0-21swapper/721:15:3013
1456229993936,3cyclictest0-21swapper/719:20:2813
1456229993935,4cyclictest0-21swapper/723:55:1813
1456229993935,4cyclictest0-21swapper/720:31:3213
1456229993935,4cyclictest0-21swapper/720:06:5013
1456229993935,4cyclictest0-21swapper/719:55:1613
1456229993935,0cyclictest0-21swapper/720:36:0413
1456229993931,4cyclictest1449994-21kworker/7:2-mm_percpu_wq23:39:0013
1456229993931,4cyclictest1449994-21kworker/7:2+events21:50:5813
1456229993931,4cyclictest1449994-21kworker/7:2-events00:14:3413
1456229993931,4cyclictest0-21swapper/700:09:2413
1456229993834,4cyclictest0-21swapper/722:40:2613
1456229993834,4cyclictest0-21swapper/700:05:0013
1456229993834,0cyclictest0-21swapper/722:47:2413
1456229993830,4cyclictest861ktimers/700:33:3013
1456229993830,4cyclictest1602321-21pgrep21:58:3013
1456229993830,4cyclictest1449994-21kworker/7:2+events22:54:5413
1456229993830,4cyclictest1449994-21kworker/7:2-events19:16:2813
1456229993830,4cyclictest0-21swapper/721:44:1013
1456229993830,4cyclictest0-21swapper/721:11:3813
1456229993830,4cyclictest0-21swapper/720:28:0613
1456229993830,4cyclictest0-21swapper/719:54:4413
1456229993811,23cyclictest0-21swapper/719:40:2613
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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