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2026-08-26 - 15:02

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot4s.osadl.org (updated Wed Aug 26, 2026 00:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
38082502367329,13sleep150-21swapper/1519:09:597
38079672361343,12sleep60-21swapper/619:06:2112
38080132357347,6sleep110-21swapper/1119:06:583
38079062354334,13sleep90-21swapper/919:05:3515
38045562352331,14sleep70-21swapper/719:05:0113
38079872351331,13sleep80-21swapper/819:06:3914
38079732351332,12sleep120-21swapper/1219:06:274
38081842350330,13sleep40-21swapper/419:09:1610
38081382349329,13sleep10-21swapper/119:08:411
38081032349329,13sleep20-21swapper/219:08:098
38080122349329,13sleep100-21swapper/1019:06:572
38079662349329,13sleep50-21swapper/519:06:2111
38079922348327,14sleep130-21swapper/1319:06:445
38079412348339,6sleep00-21swapper/019:05:590
38081582347327,13sleep140-21swapper/1419:08:546
38079472346325,14sleep30-21swapper/319:06:029
38976352600,1sleep352-21ksoftirqd/320:54:599
38861882570,0sleep130-21swapper/1320:40:135
3808679995554,1cyclictest4056872-21kworker/u32:4+flush-259:000:07:438
3808679995353,0cyclictest4059064-21ssh23:04:378
380871699511,25cyclictest0-21swapper/1400:16:546
380871699511,25cyclictest0-21swapper/1400:16:546
3808679995050,0cyclictest4129659-21ssh23:58:108
3808679995045,5cyclictest0-21swapper/223:54:378
3808679995040,9cyclictest3915973-21kworker/u32:0+flush-259:021:39:278
3808679994945,4cyclictest0-21swapper/222:25:578
3808679994842,6cyclictest0-21swapper/223:42:158
3808679994743,4cyclictest0-21swapper/222:39:428
3808679994741,6cyclictest0-21swapper/200:04:558
3808679994738,5cyclictest4121862-21kworker/u32:3+events_unbound00:17:178
3808679994738,5cyclictest4121862-21kworker/u32:3+events_unbound00:17:178
3808679994734,9cyclictest4092278-21latency_hist23:29:598
3808679994642,4cyclictest0-21swapper/222:59:288
3808679994642,4cyclictest0-21swapper/222:03:128
3808679994543,2cyclictest0-21swapper/222:09:538
3808679994541,4cyclictest4044953-21ssh22:52:308
3808679994541,4cyclictest0-21swapper/223:33:098
3808679994541,4cyclictest0-21swapper/223:08:308
3808679994541,4cyclictest0-21swapper/222:10:218
3808679994535,4cyclictest211rcu_preempt21:16:158
3808679994535,4cyclictest211rcu_preempt21:16:158
3808679994440,4cyclictest0-21swapper/223:14:228
3808679994440,4cyclictest0-21swapper/221:13:178
3808679994440,4cyclictest0-21swapper/221:13:178
3808679994440,4cyclictest0-21swapper/200:34:238
3808679994440,0cyclictest0-21swapper/223:38:248
3808679994440,0cyclictest0-21swapper/221:25:518
3808679994436,4cyclictest0-21swapper/221:41:178
3808679994423,17cyclictest4167789-21kworker/2:2-events00:29:038
3808679994423,17cyclictest0-21swapper/223:17:148
3808679994423,17cyclictest0-21swapper/221:50:558
3808716994343,0cyclictest0-21swapper/1422:12:426
3808679994339,4cyclictest0-21swapper/221:55:598
3808679994339,4cyclictest0-21swapper/200:37:098
3808679994337,6cyclictest0-21swapper/221:45:418
3808716994242,0cyclictest0-21swapper/1421:09:116
3808716994242,0cyclictest0-21swapper/1419:43:216
3808679994240,0cyclictest211rcu_preempt22:30:138
3808679994239,3cyclictest0-21swapper/200:22:488
3808679994239,3cyclictest0-21swapper/200:22:478
3808679994238,4cyclictest0-21swapper/200:14:558
3808679994238,0cyclictest0-21swapper/219:45:188
3808679994234,4cyclictest43-21ksoftirqd/219:19:518
3808679994234,4cyclictest421ktimers/222:46:398
3808679994234,4cyclictest0-21swapper/223:49:378
3808679994221,19cyclictest0-21swapper/220:30:238
3808679994221,17cyclictest0-21swapper/222:43:298
3808679994221,17cyclictest0-21swapper/222:21:598
3808679994221,17cyclictest0-21swapper/221:31:468
3808716994129,12cyclictest0-21swapper/1420:57:296
380871699411,39cyclictest0-21swapper/1419:32:056
3808679994137,4cyclictest3980937-21kworker/2:2-events22:15:418
3808679994137,4cyclictest0-21swapper/223:21:598
3808679994137,4cyclictest0-21swapper/221:20:058
3808679994137,0cyclictest0-21swapper/219:20:218
3808679994126,4cyclictest3745384-21kworker/2:2+mm_percpu_wq20:00:138
3808679994036,4cyclictest0-21swapper/221:00:138
3808679994024,16cyclictest0-21swapper/221:05:378
3808679993933,6cyclictest0-21swapper/220:46:378
3808679993928,4cyclictest211rcu_preempt20:58:378
3808679993922,17cyclictest0-21swapper/219:35:218
3808679993826,12cyclictest0-21swapper/220:50:298
3808679993822,12cyclictest3745384-21kworker/2:2+mm_percpu_wq19:56:318
3808679993733,0cyclictest0-21swapper/219:25:518
3808679993720,17cyclictest0-21swapper/219:10:158
3808679993716,17cyclictest0-21swapper/220:27:258
3808704993613,4cyclictest0-21swapper/1023:08:582
380868699360,30cyclictest0-21swapper/420:10:1610
3808679993632,4cyclictest0-21swapper/219:50:178
3808679993631,5cyclictest3870798-21libvirt-ifstat20:20:178
3808679993615,17cyclictest0-21swapper/219:42:558
3808679993615,17cyclictest0-21swapper/219:31:118
3808679993516,16cyclictest0-21swapper/220:10:058
380867999350,31cyclictest0-21swapper/220:40:238
3808679993430,4cyclictest0-21swapper/220:35:218
3808679993426,4cyclictest0-21swapper/220:19:578
3808716993333,0cyclictest0-21swapper/1420:18:236
3808716993333,0cyclictest0-21swapper/1419:54:236
380868699330,30cyclictest0-21swapper/421:06:0910
3808679993329,0cyclictest3745384-21kworker/2:2+mm_percpu_wq20:07:278
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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