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2026-06-21 - 13:22

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot4s.osadl.org (updated Sun Jun 21, 2026 00:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30115232363342,14sleep60-21swapper/619:09:0812
30114702363343,13sleep120-21swapper/1219:08:274
30113752360353,5sleep150-21swapper/1519:07:097
30115612356319,13sleep70-21swapper/719:09:4213
30112592355315,14sleep50-21swapper/519:05:3911
30115272350330,13sleep100-21swapper/1019:09:132
30112582347327,13sleep40-21swapper/419:05:3810
30114272346326,13sleep110-21swapper/1119:07:533
30113112346327,12sleep130-21swapper/1319:06:185
30115622343322,14sleep80-21swapper/819:09:4314
30113162343323,13sleep10-21swapper/119:06:231
30113632342321,14sleep90-21swapper/919:07:0315
30113572342321,14sleep30-21swapper/319:06:579
30112892342324,12sleep140-21swapper/1419:06:046
30115192341321,13sleep20-21swapper/219:09:058
30113772340320,13sleep00-21swapper/019:07:100
301201699415,25cyclictest0-21swapper/1421:00:206
3011981994037,1cyclictest3238139-21ntpq22:45:198
3011981993933,2cyclictest211rcu_preempt00:24:218
3012002993736,1cyclictest3335533-21kworker/u32:5+events_unbound00:05:1915
3011981993736,1cyclictest1769-21arpwatch23:30:138
3011981993734,3cyclictest0-21swapper/200:09:298
3011981993634,2cyclictest3011968-21cyclictest22:59:478
3011981993634,0cyclictest0-21swapper/223:59:338
3011981993633,3cyclictest0-21swapper/223:26:588
301199599356,0cyclictest0-21swapper/700:28:4213
3011995993535,0cyclictest0-21swapper/723:04:3913
3011981993533,2cyclictest3169957-21ssh21:53:198
3011981993533,2cyclictest3169957-21ssh21:53:198
3011981993533,2cyclictest0-21swapper/200:04:358
3011981993533,1cyclictest1769-21arpwatch22:13:258
3011981993532,3cyclictest0-21swapper/221:41:258
3012002993434,0cyclictest0-21swapper/923:00:1515
301200299343,30cyclictest0-21swapper/922:15:0915
3011981993433,1cyclictest3303809-21ssh23:36:278
3011981993432,2cyclictest0-21swapper/223:22:558
3011981993432,2cyclictest0-21swapper/221:11:278
3011981993431,3cyclictest3252587-21kworker/u32:1+events_unbound23:11:218
3011981993431,3cyclictest0-21swapper/222:04:558
3011981993431,3cyclictest0-21swapper/222:04:558
3011981993431,3cyclictest0-21swapper/200:35:278
3011981993430,1cyclictest211rcu_preempt22:07:498
301201699339,11cyclictest0-21swapper/1421:33:176
3011995993331,0cyclictest211rcu_preempt23:15:4313
301198999330,30cyclictest0-21swapper/523:15:1611
301198999330,1cyclictest0-21swapper/523:00:4111
3011981993333,0cyclictest0-21swapper/222:36:278
301198199333,29cyclictest0-21swapper/200:12:298
3011981993332,1cyclictest1769-21arpwatch22:43:598
3011981993332,1cyclictest0-21swapper/223:50:538
3011981993332,1cyclictest0-21swapper/222:54:198
3011981993331,2cyclictest0-21swapper/221:21:538
3011981993331,2cyclictest0-21swapper/220:39:398
3011981993331,2cyclictest0-21swapper/219:50:238
3011981993331,2cyclictest0-21swapper/200:15:238
3011981993331,0cyclictest0-21swapper/219:10:218
3011981993329,3cyclictest3107076-21irqstats21:00:158
3011981993328,3cyclictest3183572-21kworker/2:0+mm_percpu_wq22:19:578
301198199330,31cyclictest3309869-21kworker/2:0+mm_percpu_wq23:41:098
301198199330,31cyclictest0-21swapper/223:03:178
301198199330,31cyclictest0-21swapper/200:25:558
301198199330,30cyclictest3132341-21kworker/2:1+mm_percpu_wq21:48:398
301198199330,1cyclictest211rcu_preempt19:45:198
3011977993333,0cyclictest0-21swapper/123:42:591
301201699328,11cyclictest0-21swapper/1419:54:266
301201099320,29cyclictest0-21swapper/1219:15:014
301200899320,29cyclictest0-21swapper/1120:25:163
3011995993232,0cyclictest0-21swapper/723:24:4513
301199599320,30cyclictest3141872-21kworker/7:0-events22:40:2913
301198799320,29cyclictest0-21swapper/422:10:1610
3011981993232,0cyclictest0-21swapper/221:59:038
3011981993232,0cyclictest0-21swapper/221:59:038
3011981993231,1cyclictest0-21swapper/222:22:318
3011981993230,2cyclictest0-21swapper/223:18:078
3011981993229,3cyclictest3309869-21kworker/2:0-events23:48:458
3011981993229,3cyclictest0-21swapper/220:05:178
3011981993229,3cyclictest0-21swapper/220:00:238
3011981993227,3cyclictest3183572-21kworker/2:0-events22:30:458
301198199320,30cyclictest0-21swapper/221:19:518
301198199320,30cyclictest0-21swapper/220:10:158
301198199320,29cyclictest3132341-21kworker/2:1+mm_percpu_wq21:30:218
301197799320,0cyclictest0-21swapper/121:14:411
3012019993130,1cyclictest1774-21snmpd23:11:037
301201999310,30cyclictest0-21swapper/1520:43:107
301201699310,31cyclictest0-21swapper/1422:46:176
301201699310,30cyclictest0-21swapper/1423:59:046
301201699310,30cyclictest0-21swapper/1419:14:426
301201499310,30cyclictest0-21swapper/1322:46:085
301201499310,30cyclictest0-21swapper/1300:25:155
3012010993129,2cyclictest3014062-21mii-tool19:10:154
3012010993129,2cyclictest0-21swapper/1200:35:564
301201099310,30cyclictest3118565-21ssh21:13:114
301200899310,30cyclictest0-21swapper/1123:43:463
3012005993128,3cyclictest1774-21snmpd21:10:592
3012005993125,1cyclictest1774-21snmpd19:51:452
3012002993131,0cyclictest0-21swapper/923:58:3915
3012002993131,0cyclictest0-21swapper/923:46:5115
3012002993131,0cyclictest0-21swapper/923:11:0315
3012002993131,0cyclictest0-21swapper/921:50:2915
3012002993131,0cyclictest0-21swapper/921:50:2915
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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