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2026-03-06 - 23:14

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot4s.osadl.org (updated Fri Mar 06, 2026 00:45:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12462282367331,12sleep130-21swapper/1319:09:115
12460302360323,13sleep00-21swapper/019:06:330
12461312358317,13sleep150-21swapper/1519:07:537
12462442357337,13sleep90-21swapper/919:09:2315
12461242356337,13sleep80-21swapper/819:07:4514
12462972353334,13sleep110-21swapper/1119:09:573
12462412353333,13sleep60-21swapper/619:09:2112
12461232352332,13sleep70-21swapper/719:07:4413
12461022352332,13sleep50-21swapper/519:07:2711
12462722350330,13sleep100-21swapper/1019:09:412
12459712350330,13sleep40-21swapper/419:05:4910
12460502347328,13sleep10-21swapper/119:06:511
12460322347326,14sleep20-21swapper/219:06:368
12461802346328,12sleep30-21swapper/319:08:299
12459852343322,14sleep140-21swapper/1419:05:596
12460002342322,13sleep120-21swapper/1219:06:124
12466819910821,28cyclictest0-21swapper/1220:22:014
1246683999940,30cyclictest0-21swapper/1320:21:595
1246660999218,74cyclictest0-21swapper/420:22:0010
1246675999031,30cyclictest0-21swapper/1020:22:012
1246665998022,30cyclictest0-21swapper/620:22:0112
1246663997719,29cyclictest0-21swapper/520:22:0011
124666999750,75cyclictest0-21swapper/720:22:0113
1246653995959,0cyclictest3318-21Xorg20:22:018
1246690995554,1cyclictest3318-21Xorg20:22:017
1246683994343,0cyclictest0-21swapper/1300:19:535
1246657994230,12cyclictest0-21swapper/320:22:009
1246653994241,1cyclictest1472851-21kworker/u32:2+events_unbound00:08:588
1246686994039,1cyclictest3318-21Xorg20:22:006
1246671993910,0cyclictest0-21swapper/923:21:4315
1246653993938,1cyclictest0-21swapper/222:59:418
1246653993938,1cyclictest0-21swapper/200:38:298
1246653993934,0cyclictest211rcu_preempt22:48:458
1246653993837,1cyclictest1288212-21grep19:55:208
1246653993836,2cyclictest0-21swapper/223:54:048
1246653993835,3cyclictest1358547-21kworker/2:2-events21:15:338
1246683993635,1cyclictest0-21swapper/1323:48:255
1246653993635,1cyclictest1442649-21ssh22:23:288
1246653993635,1cyclictest0-21swapper/223:18:318
1246653993635,1cyclictest0-21swapper/222:12:458
1246653993635,1cyclictest0-21swapper/200:25:058
1246653993634,2cyclictest1573233-21kworker/2:0-events00:11:258
1246653993634,2cyclictest0-21swapper/223:58:098
1246653993633,3cyclictest0-21swapper/223:12:158
1246653993631,3cyclictest0-21swapper/223:48:038
1246653993630,2cyclictest211rcu_preempt21:37:418
124665399362,29cyclictest211rcu_preempt23:35:158
124665399362,29cyclictest211rcu_preempt23:35:158
124665399360,33cyclictest1338182-21kworker/2:1+mm_percpu_wq21:25:098
1246677993535,0cyclictest0-21swapper/1123:32:533
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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