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2026-08-04 - 09:35

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot4s.osadl.org (updated Tue Aug 04, 2026 00:45:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
37354872360352,5sleep100-21swapper/1019:09:012
37353082358352,4sleep150-21swapper/1519:06:407
37352132358351,5sleep60-21swapper/619:05:2812
37353362353346,5sleep50-21swapper/519:07:0311
37353642348340,5sleep70-21swapper/719:07:2213
37353652338330,5sleep80-21swapper/819:07:2314
37352392332323,6sleep140-21swapper/1419:05:516
37353842319310,6sleep90-21swapper/919:07:3915
37352622316306,6sleep120-21swapper/1219:06:064
37353352311305,4sleep40-21swapper/419:07:0210
37354692305300,3sleep110-21swapper/1119:08:463
37355432302294,5sleep30-21swapper/319:09:429
37354132205193,9sleep00-21swapper/019:08:030
37355422198191,4sleep20-21swapper/219:09:418
373532329997,1sleep130-21swapper/1319:06:545
373549729793,3sleep10-21swapper/119:09:081
3736112996414,26cyclictest618598-21thunderbird00:20:576
3736112996314,25cyclictest618598-21thunderbird23:48:006
3736112996314,25cyclictest618598-21thunderbird00:31:566
3736112995214,25cyclictest618598-21thunderbird21:14:146
3736112995214,25cyclictest618598-21thunderbird21:14:146
3736074994541,3cyclictest3837206-21kworker/u32:4+events_unbound21:22:478
3736069994342,1cyclictest3675498-1kworker/u33:1+i915_flip21:34:330
373607499408,30cyclictest3734053-21kworker/u32:0+events_unbound19:54:378
373607499382,32cyclictest3787164-21kworker/u32:2+flush-259:020:56:058
3736071993836,2cyclictest3734053-21kworker/u32:0+flush-259:020:05:171
373611299371,11cyclictest0-21swapper/1423:04:046
373611299371,11cyclictest0-21swapper/1422:09:096
373611299371,11cyclictest0-21swapper/1421:25:136
373611299371,11cyclictest0-21swapper/1420:52:166
373611299371,11cyclictest0-21swapper/1420:41:176
373611299371,11cyclictest0-21swapper/1419:46:216
373611299371,11cyclictest0-21swapper/1419:13:256
373611299371,11cyclictest0-21swapper/1400:09:586
373611299370,36cyclictest0-21swapper/1419:35:236
3736091993718,2cyclictest4019344-21kworker/u32:2+events_unbound23:46:5013
3736080993736,0cyclictest0-21swapper/421:10:1710
3736080993736,0cyclictest0-21swapper/421:10:1710
3736074993733,2cyclictest3827596-21kworker/u32:0+events_unbound21:00:018
373611299360,11cyclictest0-21swapper/1422:53:056
373611299360,11cyclictest0-21swapper/1422:42:066
3736079993636,0cyclictest3675498-1kworker/u33:1+i915_flip20:49:109
3736079993635,1cyclictest3929329-21kworker/u32:1+flush-259:023:00:199
373607499367,27cyclictest3962105-21kworker/u32:3+flush-259:023:04:278
3736074993632,2cyclictest3725650-21kworker/u32:1+flush-259:019:32:098
3736074993630,3cyclictest618598-21thunderbird23:44:398
3736071993635,1cyclictest3837206-21kworker/u32:4+events_unbound21:50:211
373611299350,10cyclictest0-21swapper/1419:57:216
3736096993535,0cyclictest0-21swapper/919:53:2315
3736086993532,2cyclictest3765799-21kworker/u32:3+flush-259:019:49:1112
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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