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2026-06-09 - 02:56

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot4s.osadl.org (updated Tue Jun 09, 2026 00:46:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15945992394373,14sleep140-21swapper/1419:08:246
15947172386367,12sleep100-21swapper/1019:09:562
15945962371331,13sleep110-21swapper/1119:08:213
15944142371333,13sleep70-21swapper/719:06:0913
15912342367359,5sleep120-21swapper/1219:05:094
15946482360343,11sleep50-21swapper/519:09:0311
15945752357348,6sleep150-21swapper/1519:08:107
15945862354333,13sleep30-21swapper/319:08:139
15945982352332,13sleep130-21swapper/1319:08:235
15944602352331,14sleep20-21swapper/219:06:358
15945842349330,12sleep10-21swapper/119:08:121
15943932349312,13sleep90-21swapper/919:05:5415
15944832348329,12sleep60-21swapper/619:06:5512
15924312348329,13sleep40-21swapper/419:05:1710
15944462347327,13sleep80-21swapper/819:06:2514
15946022343322,14sleep00-21swapper/019:08:270
1595182993528,7cyclictest1904711-21kworker/u32:0+flush-259:000:09:3014
1595182993434,0cyclictest0-21swapper/822:30:3114
1595196993332,1cyclictest1321ktimers/1200:09:294
1595182993332,1cyclictest1688683-21kworker/u32:2+events_unbound23:05:1814
1595182993331,2cyclictest961ktimers/822:19:3414
159516499333,27cyclictest1598723-21kworker/u32:5+events_unbound20:00:118
1595164993328,4cyclictest1718060-21cat21:25:148
1595196993232,0cyclictest0-21swapper/1223:53:444
1595196993232,0cyclictest0-21swapper/1223:05:234
1595196993232,0cyclictest0-21swapper/1221:11:524
1595187993229,3cyclictest0-21swapper/1021:25:142
1595187993229,2cyclictest1752586-21kworker/10:2+events22:24:472
1595182993232,0cyclictest0-21swapper/823:42:2914
1595182993232,0cyclictest0-21swapper/821:17:2614
1595182993232,0cyclictest0-21swapper/800:27:1114
1595182993231,1cyclictest1644620-21kworker/u32:1+flush-259:020:15:1814
159517499320,31cyclictest0-21swapper/523:40:5811
159515999320,29cyclictest0-21swapper/021:25:130
159515999320,29cyclictest0-21swapper/019:35:150
159520799310,30cyclictest0-21swapper/1500:15:147
1595196993131,0cyclictest0-21swapper/1223:42:304
1595196993131,0cyclictest0-21swapper/1223:03:594
1595196993130,0cyclictest211rcu_preempt22:44:554
159519199310,30cyclictest0-21swapper/1122:36:533
1595187993130,1cyclictest1752586-21kworker/10:2+events22:57:272
1595187993130,1cyclictest1752586-21kworker/10:2+events21:54:182
1595187993130,1cyclictest1752586-21kworker/10:2+events21:54:172
1595187993129,1cyclictest1951573-21kworker/10:0+events00:30:162
1595187993129,1cyclictest1899540-21kworker/10:2+events00:08:362
1595187993129,1cyclictest1854907-21kworker/10:0+events23:23:582
1595187993129,1cyclictest1837431-21kworker/10:1+events23:07:502
1595187993129,1cyclictest1752586-21kworker/10:2+events22:32:512
1595187993129,1cyclictest1752586-21kworker/10:2+events21:59:532
1595187993129,1cyclictest1718403-21kworker/10:0+events21:45:542
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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