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2025-11-16 - 01:02

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot4s.osadl.org (updated Sat Nov 15, 2025 00:46:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15835882368327,14sleep30-21swapper/319:06:289
15836412366327,14sleep50-21swapper/519:07:0111
15835472365321,14sleep20-21swapper/219:05:558
15814612365357,5sleep130-21swapper/1319:05:185
15838122362341,14sleep150-21swapper/1519:09:047
15836432360353,4sleep60-21swapper/619:07:0212
15835622348326,14sleep110-21swapper/1119:06:043
15835462348325,14sleep10-21swapper/119:05:531
15837482347327,13sleep100-21swapper/1019:08:112
15837232347325,14sleep80-21swapper/819:07:5414
15838142346323,15sleep00-21swapper/019:09:050
15837642346324,15sleep90-21swapper/919:08:2715
15835632346325,14sleep120-21swapper/1219:06:054
15835722345325,13sleep40-21swapper/419:06:1310
15838282344320,15sleep140-21swapper/1419:09:196
15837792342318,15sleep70-21swapper/719:08:4013
1584311999929,43cyclictest0-21swapper/521:20:5911
1584294999336,28cyclictest0-21swapper/021:21:000
1584313998454,30cyclictest0-21swapper/621:21:0112
1584338998123,29cyclictest0-21swapper/1421:20:596
1584336997720,28cyclictest0-21swapper/1321:20:595
1584297995410,44cyclictest0-21swapper/121:21:001
1584316994515,29cyclictest0-21swapper/721:21:0113
1584321994039,1cyclictest3411-21Xorg21:21:0114
158433299330,30cyclictest0-21swapper/1223:00:184
158432399330,32cyclictest0-21swapper/923:22:2815
158430199330,1cyclictest0-21swapper/200:03:548
158433699320,31cyclictest0-21swapper/1321:27:185
1584332993231,1cyclictest1579190-21kworker/u32:4+events_unbound21:20:224
1584332993230,1cyclictest1675041-21kworker/12:2-events21:50:124
1584294993230,1cyclictest2395797-21snmpd22:19:120
158434299310,30cyclictest0-21swapper/1523:53:037
158434299310,30cyclictest0-21swapper/1523:53:037
1584336993130,1cyclictest2395797-21snmpd00:29:225
1584332993129,2cyclictest1697214-21kworker/u32:2+events_unbound22:40:524
1584329993130,1cyclictest2395797-21snmpd23:47:093
1584329993130,1cyclictest2395797-21snmpd23:47:093
1584329993129,1cyclictest1579190-21kworker/u32:4+events_unbound21:21:313
158432699310,1cyclictest0-21swapper/1000:00:002
1584323993130,1cyclictest2395797-21snmpd20:02:4615
158432399310,30cyclictest0-21swapper/923:29:1315
1584321993130,1cyclictest0-21swapper/820:52:0014
158432199310,30cyclictest0-21swapper/800:04:4214
158431399310,30cyclictest0-21swapper/621:45:1612
158431199317,13cyclictest0-21swapper/519:28:5911
158431199317,13cyclictest0-21swapper/500:14:3311
158431199310,30cyclictest0-21swapper/520:34:5711
158431199310,30cyclictest0-21swapper/520:28:1811
1584306993130,1cyclictest2395797-21snmpd21:34:3410
1584306993130,1cyclictest0-21swapper/422:24:3810
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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