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2025-12-19 - 13:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Fri Dec 19, 2025 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
35936599954926,522cyclictest0-21swapper/200:38:488
35936599954926,522cyclictest0-21swapper/200:38:488
3593712995298,490cyclictest0-21swapper/1519:33:487
359367799529528,1cyclictest0-21swapper/700:27:4813
3593704995065,499cyclictest0-21swapper/1320:12:485
35936899949920,59cyclictest0-21swapper/1020:56:482
359366699496466,30cyclictest0-21swapper/423:51:4810
359367799488486,2cyclictest3676733-21kworker/7:0+i915-unordered20:48:4813
3593651994751,30cyclictest0-21swapper/000:17:470
359366699474472,2cyclictest0-21swapper/420:25:4810
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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