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2026-08-20 - 21:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Thu Aug 20, 2026 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24853509951810,507cyclictest0-21swapper/220:52:118
248539399510480,30cyclictest0-21swapper/1223:38:104
248535999509508,1cyclictest2707081-21kworker/4:0+i915-unordered23:38:1010
248538499500499,1cyclictest2554396-21kworker/10:2+i915-unordered20:52:112
248538499494492,2cyclictest0-21swapper/1019:51:112
2485346994932,490cyclictest0-21swapper/121:04:111
24853469947713,463cyclictest0-21swapper/100:14:101
24853429947612,463cyclictest0-21swapper/019:51:110
2485354994750,57cyclictest0-21swapper/323:46:569
248534699475474,1cyclictest0-21swapper/119:53:111
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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