You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-05 - 18:52
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Wed Nov 05, 2025 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9997479955520,534cyclictest0-21swapper/1320:37:195
99971799547546,1cyclictest1086634-21kworker/6:0+i915-unordered21:39:1912
999729995391,536cyclictest0-21swapper/900:22:1815
999747995309,520cyclictest0-21swapper/1320:34:195
9997359953010,519cyclictest0-21swapper/1021:27:192
9997479952223,499cyclictest0-21swapper/1321:36:195
9997569951627,488cyclictest0-21swapper/1522:01:197
9997399951524,29cyclictest0-21swapper/1123:23:183
9997399951511,504cyclictest124-21ksoftirqd/1121:27:193
99973599515515,0cyclictest0-21swapper/1023:19:182
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional