You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-02 - 22:58
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Thu Jul 02, 2026 00:43:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7530049954927,521cyclictest0-21swapper/519:42:4311
7529899953414,520cyclictest0-21swapper/121:32:431
75299999529528,1cyclictest852671-21kworker/4:1+i915-unordered20:58:4310
75301899513511,2cyclictest876249-21kworker/9:2+i915-unordered21:32:4315
75303299496495,1cyclictest0-21swapper/1220:58:434
75302899488488,0cyclictest0-21swapper/1123:50:433
75299699482482,0cyclictest967663-21kworker/3:2+i915-unordered23:50:439
7530049946625,30cyclictest0-21swapper/521:49:5511
7529949946619,445cyclictest0-21swapper/220:12:188
75298999466465,1cyclictest940618-21kworker/1:2+i915-unordered22:37:431
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional