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2026-05-04 - 07:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Mon May 04, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4081700995200,519cyclictest0-21swapper/1523:57:337
40816429950616,43cyclictest0-21swapper/121:44:331
4081662994988,489cyclictest0-21swapper/600:29:3312
408165099498468,30cyclictest0-21swapper/322:39:339
408165099490489,1cyclictest0-21swapper/319:59:349
40816629948819,468cyclictest0-21swapper/622:04:3312
40816429948321,0cyclictest0-21swapper/122:39:331
40816859947625,30cyclictest0-21swapper/1120:42:563
408165099476474,2cyclictest0-21swapper/321:54:339
40817009947325,30cyclictest0-21swapper/1522:13:577
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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