You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-30 - 16:52
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Sat May 30, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4050711995387,530cyclictest0-21swapper/200:35:458
4050741995318,521cyclictest0-21swapper/1023:16:452
405071199522521,1cyclictest42589-21kworker/2:1+i915-unordered23:16:458
40507589951938,480cyclictest142-21ksoftirqd/1322:31:455
405072399503501,2cyclictest4103405-21kworker/5:2+i915-unordered20:11:4511
405075899497496,0cyclictest34540-21kworker/13:1+i915-unordered22:45:455
40507629949316,59cyclictest0-21swapper/1420:37:086
405072099493492,1cyclictest4172022-21kworker/4:2+i915-unordered21:48:0710
405073599491490,1cyclictest28589-21kworker/8:2+i915-unordered23:05:4514
40507399948725,461cyclictest0-21swapper/900:04:4515
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional