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2025-11-12 - 18:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Wed Nov 12, 2025 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110886999698302,396cyclictest0-21swapper/719:08:0613
11088969956140,520cyclictest0-21swapper/1319:48:065
11088539956039,520cyclictest0-21swapper/319:43:069
11088569953914,521cyclictest0-21swapper/420:13:0610
11088649952826,501cyclictest0-21swapper/619:11:0612
110888799518516,2cyclictest1138402-21kworker/11:2+i915-unordered19:43:063
1108887995170,0cyclictest0-21swapper/1100:27:053
110890399509508,1cyclictest1143750-21kworker/15:0+i915-unordered20:01:067
110890099502499,2cyclictest1167158-21kworker/14:1+i915-unordered20:27:066
110886999493492,1cyclictest0-21swapper/720:01:0613
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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