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2026-08-05 - 09:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Wed Aug 05, 2026 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
357435499753332,420cyclictest0-21swapper/1520:02:247
3574307995544,29cyclictest0-21swapper/420:19:3910
3574307995544,29cyclictest0-21swapper/420:19:3910
357430099525524,1cyclictest3591216-21kworker/2:2+i915-unordered19:32:398
357431699497497,0cyclictest0-21swapper/620:07:3912
357433999488487,1cyclictest3816390-21kworker/11:0+i915-unordered00:13:393
3574316994859,476cyclictest0-21swapper/620:32:3912
3574304994858,59cyclictest0-21swapper/322:57:229
35743009948410,59cyclictest43-21ksoftirqd/219:19:398
35743169948039,440cyclictest0-21swapper/619:16:3912
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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