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2026-04-30 - 05:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Thu Apr 30, 2026 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
47477399622622,0cyclictest0-21swapper/523:05:0311
4748159953236,494cyclictest0-21swapper/1523:35:417
474812995309,520cyclictest151-21ksoftirqd/1419:57:416
474812995309,520cyclictest151-21ksoftirqd/1419:57:416
4747779952921,507cyclictest0-21swapper/622:29:4112
47478899512512,0cyclictest0-21swapper/900:27:4115
47479799500499,1cyclictest0-21swapper/1120:32:413
47476799485485,0cyclictest539887-21kworker/3:2+i915-unordered20:32:419
4747889948215,466cyclictest0-21swapper/922:37:4115
474754994824,477cyclictest0-21swapper/022:11:410
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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