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2025-12-24 - 20:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Wed Dec 24, 2025 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
337488499713315,397cyclictest0-21swapper/619:49:2112
33749229947325,30cyclictest0-21swapper/1523:50:227
33748929946925,29cyclictest0-21swapper/823:36:5914
33748929946925,29cyclictest0-21swapper/823:36:5914
33749229946822,30cyclictest0-21swapper/1500:13:007
33749229946522,29cyclictest0-21swapper/1523:03:217
33749229946518,29cyclictest0-21swapper/1522:20:227
33749229946415,30cyclictest0-21swapper/1523:44:247
33749029946410,59cyclictest0-21swapper/1019:55:012
33748659946325,31cyclictest0-21swapper/122:56:381
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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