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2026-09-20 - 09:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Sun Sep 20, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
414381899546545,1cyclictest43184-21kworker/11:1+i915-unordered21:28:123
414381899542540,2cyclictest123638-21kworker/11:0+i915-unordered22:45:123
414381099536535,1cyclictest55147-21kworker/9:1+i915-unordered21:18:1215
4143828995294,44cyclictest0-21swapper/1322:42:125
41437919951616,455cyclictest61-21ksoftirqd/419:07:1210
4143808994900,58cyclictest0-21swapper/822:35:3414
41437949948812,59cyclictest0-21swapper/519:46:5611
414383699481451,30cyclictest0-21swapper/1500:08:127
4143810994810,480cyclictest0-21swapper/900:03:1215
41437919947944,434cyclictest0-21swapper/419:17:1210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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