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2026-06-29 - 22:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Mon Jun 29, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
431217995297,520cyclictest0-21swapper/720:07:4913
4312469952636,489cyclictest0-21swapper/1421:24:496
4312359949950,448cyclictest0-21swapper/1119:20:493
4311899949516,59cyclictest0-21swapper/021:49:320
4312179947322,30cyclictest0-21swapper/722:46:3413
43121299471470,1cyclictest0-21swapper/621:29:4912
4312299946921,30cyclictest0-21swapper/1000:11:122
4312299946821,29cyclictest0-21swapper/1019:26:112
4312359946726,29cyclictest0-21swapper/1120:29:493
43122399466466,0cyclictest0-21swapper/922:28:1115
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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