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2026-05-24 - 12:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Sun May 24, 2026 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
363879999728726,2cyclictest0-21swapper/421:25:3910
363884099549100,444cyclictest3655497-21kworker/14:1+i915-unordered19:29:576
36388459954221,519cyclictest0-21swapper/1522:39:577
36388409952018,44cyclictest0-21swapper/1422:20:576
363881199515514,1cyclictest3860721-21kworker/7:1+i915-unordered23:55:5613
363881199515513,2cyclictest3715797-21kworker/7:0+i915-unordered20:54:5713
3638811995128,503cyclictest0-21swapper/700:19:5613
36388409950518,27cyclictest151-21ksoftirqd/1422:58:576
363878799503501,2cyclictest34-21ksoftirqd/122:20:571
36388409950237,26cyclictest0-21swapper/1419:16:576
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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