You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-03 - 07:22
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Sun May 03, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1419369957622,553cyclictest0-21swapper/719:40:3513
1419639956615,29cyclictest0-21swapper/1321:12:355
1419369955431,522cyclictest0-21swapper/721:50:3513
14191499543542,1cyclictest186742-21kworker/1:0+i915-unordered20:29:351
1419229954117,523cyclictest0-21swapper/323:25:359
141930995340,534cyclictest0-21swapper/520:39:3511
141948995274,521cyclictest0-21swapper/1000:30:352
1419309952665,15cyclictest0-21swapper/519:26:3511
1419309952665,15cyclictest0-21swapper/519:26:3511
14193099521516,3cyclictest235061-21kworker/5:1+i915-unordered21:12:3511
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional