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2025-12-27 - 23:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Sat Dec 27, 2025 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32473819944421,30cyclictest0-21swapper/123:58:331
32473819944421,30cyclictest0-21swapper/123:58:331
32474399944320,29cyclictest0-21swapper/1521:02:337
32474399944320,29cyclictest0-21swapper/1521:02:337
32473819944318,422cyclictest0-21swapper/122:22:331
32474289944118,29cyclictest0-21swapper/1223:00:334
32474059944115,424cyclictest0-21swapper/719:46:3313
32474009943914,423cyclictest0-21swapper/623:45:3312
32474009943914,423cyclictest0-21swapper/623:45:3312
32474059943711,29cyclictest0-21swapper/720:42:3313
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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