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2026-06-23 - 21:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Tue Jun 23, 2026 00:43:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
41433509955228,523cyclictest0-21swapper/322:46:009
41433509955228,523cyclictest0-21swapper/322:46:009
41433929954536,508cyclictest0-21swapper/1322:28:005
41433929952521,503cyclictest0-21swapper/1323:09:005
4143361995211,519cyclictest0-21swapper/620:26:0012
414336499512511,1cyclictest4172051-21kworker/7:2+i915-unordered19:40:0013
414339599503503,0cyclictest4189116-21kworker/14:2+i915-unordered20:26:006
414338399484483,1cyclictest102936-21kworker/11:1+i915-unordered22:46:003
414338399484483,1cyclictest102936-21kworker/11:1+i915-unordered22:46:003
41433759948027,59cyclictest115-21ksoftirqd/1020:11:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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