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2026-06-26 - 21:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Fri Jun 26, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3383019954016,523cyclictest0-21swapper/020:02:550
338339995373,0cyclictest0-21swapper/1021:44:542
3383209953039,490cyclictest0-21swapper/519:13:5511
33830799511511,0cyclictest0-21swapper/220:37:558
33830799511511,0cyclictest0-21swapper/220:37:558
3383479949734,462cyclictest0-21swapper/1100:30:543
33832699496466,30cyclictest0-21swapper/722:44:5413
33835499494494,0cyclictest0-21swapper/1321:42:545
33835299493493,0cyclictest598956-21kworker/12:1+i915-unordered00:20:544
3383399949217,59cyclictest0-21swapper/1020:25:172
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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