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2025-11-29 - 05:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot5.osadl.org (updated Fri Nov 28, 2025 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19058869947927,30cyclictest0-21swapper/621:47:5912
1905879994600,459cyclictest0-21swapper/421:58:5710
190591699458458,0cyclictest0-21swapper/1322:20:595
1905865994589,29cyclictest0-21swapper/022:54:580
1905865994589,29cyclictest0-21swapper/022:54:580
1905865994526,30cyclictest0-21swapper/023:52:230
190588299450447,2cyclictest2037764-21kworker/u64:2+events_unbound21:58:5711
19059129944723,0cyclictest0-21swapper/1220:17:574
19059129944422,419cyclictest0-21swapper/1220:42:234
19058719944315,30cyclictest0-21swapper/200:19:218
19059129944221,419cyclictest0-21swapper/1219:41:234
19058979944221,420cyclictest0-21swapper/900:33:2315
19059169944122,419cyclictest0-21swapper/1300:09:575
19059129944118,422cyclictest0-21swapper/1219:54:214
19058659943911,30cyclictest0-21swapper/019:52:210
19059169943818,419cyclictest0-21swapper/1320:31:225
19059169943816,421cyclictest0-21swapper/1320:13:225
19059059943818,418cyclictest0-21swapper/1122:46:233
19058719943711,29cyclictest0-21swapper/223:12:238
19059169943614,421cyclictest0-21swapper/1323:44:575
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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