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2025-10-16 - 06:55
OSADL QA Farm

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of system in rack #0, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot5.osadl.org (updated Thu Oct 16, 2025 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)		T*(,W**)
latency
(µs)		CmdPIDPrioCmd
276894699539537,2cyclictest2768624-21kworker/2:5+i915-unordered19:37:578
27689659953815,522cyclictest0-21swapper/721:04:5713
2768965995368,27cyclictest0-21swapper/722:07:5713
2768939995343,531cyclictest0-21swapper/019:26:570
27689439953314,29cyclictest0-21swapper/123:11:561
2768965995265,519cyclictest0-21swapper/700:21:5613
2768950995252,522cyclictest0-21swapper/319:57:579
2768946995230,522cyclictest0-21swapper/222:52:568
276897299518516,2cyclictest2967808-21kworker/9:2+i915-unordered23:11:5615
276900199503501,2cyclictest3000558-21kworker/15:2+i915-unordered00:21:567
276895899502500,2cyclictest3008879-21kworker/5:0+i915-unordered00:01:5611
276895899502500,2cyclictest3008879-21kworker/5:0+i915-unordered00:01:5611
27689909949936,461cyclictest0-21swapper/1220:12:574
2768965994965,490cyclictest0-21swapper/720:24:5713
276897799495494,1cyclictest2818893-21kworker/10:1+i915-unordered20:12:572
276898599487484,2cyclictest2810588-21kworker/11:2+i915-unordered19:57:573
276900199486485,1cyclictest2910413-21kworker/15:0+i915-unordered22:07:577
276894699486456,30cyclictest0-21swapper/220:12:578
276900199484483,1cyclictest2851676-21kworker/15:0+i915-unordered21:04:577
276897799484484,0cyclictest0-21swapper/1000:23:562
276895899483482,1cyclictest0-21swapper/521:39:5711
276899399482482,0cyclictest2893728-21kworker/13:0+i915-unordered21:39:575
276897799480480,0cyclictest0-21swapper/1022:23:562
276897299478448,30cyclictest0-21swapper/919:38:5715
276897799477476,1cyclictest2935004-21kworker/10:2+i915-unordered22:52:562
27689629947726,29cyclictest0-21swapper/620:41:1812
276900199472472,0cyclictest2835376-21kworker/15:0+i915-unordered20:24:577
276899399472470,2cyclictest0-21swapper/1300:01:565
276899399472470,2cyclictest0-21swapper/1300:01:565
2768996994699,459cyclictest0-21swapper/1400:23:566
27689779946923,29cyclictest0-21swapper/1022:31:562
276897799465464,1cyclictest0-21swapper/1019:37:572
27689779946519,29cyclictest0-21swapper/1021:52:562
276897799462459,3cyclictest1811-21snmpd20:49:542
2768996994610,460cyclictest0-21swapper/1422:52:566
276899699458456,2cyclictest0-21swapper/1422:06:576
276899699456455,1cyclictest1811-21snmpd00:35:316
276899699453451,2cyclictest0-21swapper/1423:11:566
276895399453452,1cyclictest77250irq/159-i91520:12:5710
276895399452452,0cyclictest77250irq/159-i91522:23:5610
2768990994481,29cyclictest0-21swapper/1222:10:524
276900199446445,1cyclictest1811-21snmpd22:58:527
27689729944524,420cyclictest0-21swapper/923:34:3915
27689469944526,419cyclictest0-21swapper/222:21:568
27689659944424,419cyclictest0-21swapper/700:29:1913
27689659944424,419cyclictest0-21swapper/700:01:3813
27689659944424,419cyclictest0-21swapper/700:01:3813
27689629944424,420cyclictest0-21swapper/620:10:4112
27689629944422,422cyclictest0-21swapper/600:34:4112
27689629944422,420cyclictest0-21swapper/622:21:2012
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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