You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-14 - 02:43

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #0, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot5s.osadl.org (updated Thu May 14, 2026 00:44:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1946992351302,38sleep50-21swapper/511
1947122347322,16sleep10-21swapper/11
1946532340314,16sleep110-21swapper/113
1946222338314,16sleep20-21swapper/28
1946152337311,17sleep120-21swapper/124
1946832335309,17sleep60-21swapper/612
1945522335310,16sleep130-21swapper/135
1946242333308,16sleep40-21swapper/410
1948672332308,16sleep80-21swapper/814
1948352330303,17sleep150-21swapper/157
1947142329304,16sleep30-21swapper/39
1947452327301,17sleep140-21swapper/146
1946302326300,17sleep100-21swapper/102
1948282325299,17sleep90-21swapper/915
1947482325301,15sleep00-21swapper/00
1946102322296,17sleep70-21swapper/713
19527299555,25cyclictest91048-21CPU7
19527299456,25cyclictest91048-21CPU7
2594162420,0sleep1321rcuc/11
195237994139,1cyclictest91048-21CPU13
19527299401,26cyclictest0-21swapper/157
195272993913,25cyclictest0-21swapper/157
19527299390,14cyclictest91048-21CPU7
195272993813,14cyclictest91048-21CPU7
195272993713,11cyclictest0-21swapper/157
19527299370,12cyclictest91048-21CPU7
195246993735,1cyclictest91048-21CPU15
19527299360,11cyclictest91048-21CPU7
195218993636,0cyclictest0-21swapper/28
195221993434,0cyclictest0-21swapper/39
195261993333,0cyclictest0-21swapper/135
19524699334,15cyclictest0-21swapper/915
19527299327,12cyclictest0-21swapper/157
19524899300,13cyclictest0-21swapper/102
19527299294,25cyclictest0-21swapper/157
195256992924,4cyclictest91059-21CPU4
19522699290,29cyclictest435789-21ntpq10
19527299284,11cyclictest0-21swapper/157
19527299284,11cyclictest0-21swapper/157
19527299284,11cyclictest0-21swapper/157
19527299284,11cyclictest0-21swapper/157
19527299284,11cyclictest0-21swapper/157
19527299284,11cyclictest0-21swapper/157
19527299280,28cyclictest618765-31munin-graph7
195261992827,1cyclictest0-21swapper/135
195261992826,1cyclictest1561-21snmpd5
19525699280,27cyclictest0-21swapper/124
19524899280,27cyclictest0-21swapper/102
195246992827,1cyclictest0-21swapper/915
19524699280,21cyclictest0-21swapper/915
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional