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2026-07-02 - 15:24

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot5s.osadl.org (updated Thu Jul 02, 2026 00:45:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3843682351310,33sleep10-21swapper/11
3844212349307,16sleep100-21swapper/102
3843622349305,15sleep120-21swapper/124
3844162345319,17sleep60-21swapper/612
3843502344320,16sleep40-21swapper/410
3846152341315,17sleep30-21swapper/39
3845732341315,17sleep150-21swapper/157
3845652341315,17sleep70-21swapper/713
3845132341314,17sleep110-21swapper/113
3844812341316,16sleep140-21swapper/146
3843632341315,17sleep130-21swapper/135
3845502340314,17sleep90-21swapper/915
3846542339315,16sleep80-21swapper/814
3844522339313,16sleep50-21swapper/511
3844312337311,17sleep20-21swapper/28
3846292335310,17sleep00-21swapper/00
385019994240,1cyclictest1612-21snmpd15
385034994017,10cyclictest0-21swapper/135
385019994013,1cyclictest0-21swapper/915
385040993939,0cyclictest0-21swapper/157
385019993838,0cyclictest0-21swapper/915
385034993636,0cyclictest0-21swapper/135
385029993612,23cyclictest881654-21nfsd4
385005993636,0cyclictest0-21swapper/511
385029993527,6cyclictest0-21swapper/124
384985993433,1cyclictest1612-21snmpd1
385040993310,1cyclictest0-21swapper/157
38502999338,19cyclictest240380-21kworker/12:1-events4
385029993327,3cyclictest240380-21kworker/12:1-events4
385029993325,6cyclictest0-21swapper/124
385007993333,0cyclictest0-21swapper/612
38503699320,31cyclictest0-21swapper/146
385029993230,2cyclictest0-21swapper/124
385029993230,0cyclictest0-21swapper/124
385029993223,6cyclictest0-21swapper/124
385029993223,6cyclictest0-21swapper/124
385029993223,6cyclictest0-21swapper/124
385029993212,17cyclictest240380-21kworker/12:1+mm_percpu_wq4
385011993232,0cyclictest0-21swapper/713
38500799327,3cyclictest0-21swapper/612
385007993232,0cyclictest0-21swapper/612
385000993231,1cyclictest0-21swapper/410
384988993231,0cyclictest0-21swapper/28
384988993228,3cyclictest1612-21snmpd8
38502999317,18cyclictest0-21swapper/124
38502999316,20cyclictest0-21swapper/124
385029993123,8cyclictest0-21swapper/124
385029993122,6cyclictest0-21swapper/124
385007993131,0cyclictest0-21swapper/612
38498199310,1cyclictest0-21swapper/00
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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