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2026-08-18 - 03:56

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot8s.osadl.org (updated Tue Aug 18, 2026 00:44:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
940801160,111rtkit-daemon0-21swapper/1019:07:582
2834911120,46ptp4l0-21swapper/119:08:241
3081327563,10sleep110-21swapper/1119:05:533
3089427059,9sleep70-21swapper/719:07:029
3101326856,10sleep50-21swapper/519:08:487
3093426755,10sleep60-21swapper/619:07:378
3093226756,9sleep40-21swapper/419:07:356
3090026554,9sleep00-21swapper/019:07:060
211492620,0sleep10-21swapper/120:15:261
120752600,0sleep50-21swapper/519:25:007
313272590,0sleep6501rcuc/623:20:148
48062550,0sleep20-21swapper/222:00:254
264622550,0sleep10-21swapper/120:25:141
91512520,0sleep40-21swapper/423:30:256
3148199273,16cyclictest0-21swapper/600:00:018
3146199202,11cyclictest0-21swapper/220:30:014
3148699191,3cyclictest0-21swapper/700:00:159
31495991810,2cyclictest18108-21ls00:25:2111
3146199183,9cyclictest0-21swapper/223:00:004
3146199183,10cyclictest0-21swapper/221:30:014
3146199183,10cyclictest0-21swapper/220:45:004
3146199182,10cyclictest0-21swapper/200:15:224
283491180,1ptp4l21-21ksoftirqd/100:35:141
3149599172,9cyclictest0-21swapper/923:25:0111
3149099173,8cyclictest0-21swapper/800:20:0110
3146199173,9cyclictest0-21swapper/222:30:014
3146199173,9cyclictest0-21swapper/221:10:014
3146199173,8cyclictest0-21swapper/200:40:014
31461991714,2cyclictest0-21swapper/219:45:004
3149599160,7cyclictest0-21swapper/922:44:5511
3148699163,8cyclictest0-21swapper/719:50:019
3148699162,8cyclictest0-21swapper/723:00:019
3147799163,8cyclictest0-21swapper/519:55:017
3146199163,8cyclictest0-21swapper/222:35:004
3146199162,9cyclictest0-21swapper/222:35:014
3146199162,9cyclictest0-21swapper/220:00:254
3145799162,8cyclictest0-21swapper/121:40:011
308102167,7sleep80-21swapper/819:05:4910
283491160,1ptp4l21-21ksoftirqd/119:55:141
3150499151,8cyclictest0-21swapper/1119:20:013
3149599153,7cyclictest0-21swapper/920:50:0111
3149599152,7cyclictest0-21swapper/920:15:2511
3148699153,7cyclictest0-21swapper/721:20:019
3148699152,8cyclictest0-21swapper/723:35:019
3148199152,8cyclictest0-21swapper/623:05:018
31481991513,1cyclictest0-21swapper/600:05:008
3147799153,7cyclictest0-21swapper/519:45:017
3147799151,2cyclictest0-21swapper/521:40:177
3146899153,8cyclictest0-21swapper/319:15:015
3146199153,8cyclictest0-21swapper/223:10:254
3146199152,8cyclictest0-21swapper/200:30:014
31461991513,1cyclictest31326-21turbostat21:14:594
3146199151,13cyclictest0-21swapper/223:40:164
3145799154,7cyclictest0-21swapper/122:55:011
3145799152,8cyclictest0-21swapper/119:25:001
3145299152,8cyclictest0-21swapper/019:30:010
3145299152,7cyclictest0-21swapper/019:35:000
3145299151,8cyclictest0-21swapper/021:25:000
283491150,1ptp4l21-21ksoftirqd/121:21:231
283491150,1ptp4l21-21ksoftirqd/121:05:131
283491150,0ptp4l0-21swapper/121:10:101
283491150,0ptp4l0-21swapper/120:00:181
283491150,0ptp4l0-21swapper/119:45:241
3150499143,7cyclictest0-21swapper/1123:50:013
3149599142,7cyclictest0-21swapper/922:10:2311
3149599142,7cyclictest0-21swapper/922:10:2311
3148699142,7cyclictest0-21swapper/722:20:259
3148699142,7cyclictest0-21swapper/722:20:259
3148199143,6cyclictest0-21swapper/621:55:278
3147799143,7cyclictest0-21swapper/522:25:017
3147799143,7cyclictest0-21swapper/522:25:007
3146899140,14cyclictest0-21swapper/323:52:275
3146199143,8cyclictest0-21swapper/200:25:014
3145799142,7cyclictest0-21swapper/121:05:011
3145299143,7cyclictest0-21swapper/023:15:000
3145299142,7cyclictest0-21swapper/000:20:010
283491140,1ptp4l21-21ksoftirqd/122:15:121
283491140,1ptp4l21-21ksoftirqd/122:15:111
283491140,0ptp4l0-21swapper/123:35:261
283491140,0ptp4l0-21swapper/119:15:021
283491140,0ptp4l0-21swapper/119:10:221
3150499132,7cyclictest0-21swapper/1123:45:013
3149599132,7cyclictest0-21swapper/923:00:2411
3148199130,8cyclictest0-21swapper/621:00:158
3146899132,6cyclictest0-21swapper/300:15:005
3146199131,8cyclictest0-21swapper/223:35:014
3145799134,8cyclictest0-21swapper/120:36:241
291702130,0sleep100-21swapper/1022:35:122
283491130,1ptp4l21-21ksoftirqd/119:40:151
283491130,0ptp4l0-21swapper/122:35:181
283491130,0ptp4l0-21swapper/122:21:281
283491130,0ptp4l0-21swapper/122:21:281
222492130,1sleep3321rcuc/319:35:245
3150499122,6cyclictest0-21swapper/1122:25:253
3149599122,6cyclictest0-21swapper/923:45:0111
3149599122,6cyclictest0-21swapper/919:55:2511
3149099129,2cyclictest11369-21latency_hist22:55:0110
3148199122,6cyclictest0-21swapper/623:00:018
3148199122,6cyclictest0-21swapper/621:10:018
3147799122,6cyclictest0-21swapper/523:37:037
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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