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2025-08-29 - 12:02

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot8s.osadl.org (updated Fri Aug 29, 2025 00:44:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
275991890,80ptp4l0-21swapper/119:07:571
94980820,77rtkit-daemon0-21swapper/1019:06:112
2929326655,9sleep50-21swapper/519:06:447
2938026454,8sleep00-21swapper/019:07:510
2936326453,9sleep110-21swapper/1119:07:383
2934626452,10sleep70-21swapper/719:07:229
2927926352,9sleep60-21swapper/619:06:338
152402580,0sleep20-21swapper/220:10:234
2937125746,9sleep40-21swapper/419:07:436
29941992315,8cyclictest0-21swapper/1020:45:232
321012200,0sleep20-21swapper/220:35:144
2991099202,6cyclictest0-21swapper/420:10:016
2990199193,9cyclictest0-21swapper/220:30:014
2990199193,10cyclictest0-21swapper/223:30:004
2990199192,10cyclictest0-21swapper/219:20:014
2989799190,17cyclictest0-21swapper/123:15:171
2991099181,14cyclictest0-21swapper/422:20:006
2990199182,11cyclictest0-21swapper/219:50:014
2989799183,8cyclictest0-21swapper/123:45:001
2989299183,9cyclictest0-21swapper/021:00:000
2994599170,15cyclictest0-21swapper/1119:25:163
2992099172,9cyclictest0-21swapper/600:40:008
2992099172,9cyclictest0-21swapper/600:40:008
2989799172,9cyclictest0-21swapper/119:20:011
2989299174,7cyclictest0-21swapper/021:15:000
2989299173,8cyclictest0-21swapper/023:40:000
275991170,0ptp4l0-21swapper/119:55:211
275991170,0ptp4l0-21swapper/119:30:201
2992599163,8cyclictest0-21swapper/721:05:009
2992099163,8cyclictest0-21swapper/622:45:008
2992099163,8cyclictest0-21swapper/600:00:018
2992099163,7cyclictest0-21swapper/621:20:008
2992099160,15cyclictest0-21swapper/620:05:208
2990199162,8cyclictest0-21swapper/200:05:284
2989799162,8cyclictest0-21swapper/123:25:001
2989799162,8cyclictest0-21swapper/122:50:251
2989299163,8cyclictest0-21swapper/021:55:000
2989299163,8cyclictest0-21swapper/020:00:010
2989299161,9cyclictest0-21swapper/022:25:000
275991160,0ptp4l0-21swapper/123:30:171
275991160,0ptp4l0-21swapper/123:05:001
275991160,0ptp4l0-21swapper/119:50:271
2994199152,8cyclictest0-21swapper/1021:40:262
2992599152,7cyclictest0-21swapper/700:00:009
2992599152,7cyclictest0-21swapper/700:00:009
2992599151,11cyclictest23603-21kworker/u24:219:45:019
2992099153,7cyclictest0-21swapper/621:50:308
2992099152,8cyclictest0-21swapper/621:30:008
2991699152,8cyclictest0-21swapper/519:55:017
2990199150,3cyclictest0-21swapper/200:30:174
2990199150,3cyclictest0-21swapper/200:30:174
2989799152,7cyclictest0-21swapper/120:25:011
2989299153,7cyclictest0-21swapper/019:50:010
275991150,1ptp4l21-21ksoftirqd/122:35:151
275991150,0ptp4l0-21swapper/121:50:211
275991150,0ptp4l0-21swapper/120:35:201
2994199143,7cyclictest0-21swapper/1019:30:252
2993099143,6cyclictest0-21swapper/823:25:0010
2993099141,8cyclictest63-21ksoftirqd/823:15:0010
2993099141,10cyclictest25380-21kworker/u24:123:40:0010
2992599142,7cyclictest0-21swapper/720:20:019
2992099143,7cyclictest0-21swapper/623:00:248
2992099143,6cyclictest0-21swapper/622:25:008
2991699143,7cyclictest0-21swapper/520:40:017
2991099142,7cyclictest0-21swapper/400:35:006
2991099142,7cyclictest0-21swapper/400:35:006
2990199143,8cyclictest0-21swapper/222:45:004
2990199142,7cyclictest0-21swapper/200:15:004
2989799141,8cyclictest0-21swapper/122:47:411
2989799141,8cyclictest0-21swapper/120:25:011
2989299143,6cyclictest0-21swapper/021:45:000
2989299142,8cyclictest25380-21kworker/u24:122:05:000
275991140,0ptp4l0-21swapper/122:55:271
275991140,0ptp4l0-21swapper/121:20:001
275991140,0ptp4l0-21swapper/121:00:171
316242130,0sleep50-21swapper/521:55:267
2994199133,6cyclictest0-21swapper/1022:05:272
2994199130,1cyclictest0-21swapper/1019:25:142
2993099132,6cyclictest0-21swapper/822:35:2610
2992599132,8cyclictest0-21swapper/722:20:309
2992099133,6cyclictest0-21swapper/619:30:018
2992099132,6cyclictest0-21swapper/620:50:008
2990199132,7cyclictest0-21swapper/223:45:004
2990199132,7cyclictest0-21swapper/221:05:284
2989799132,6cyclictest0-21swapper/119:50:011
2989299134,6cyclictest0-21swapper/019:15:010
2989299132,6cyclictest0-21swapper/019:45:010
275991130,1ptp4l5777-21needreboot00:10:181
275991130,0ptp4l0-21swapper/120:10:141
2994599122,6cyclictest0-21swapper/1123:35:003
2994199127,4cyclictest0-21swapper/1020:20:152
2994199127,4cyclictest0-21swapper/1019:20:172
2994199123,2cyclictest3292-21idleruntime21:20:212
2993099122,6cyclictest0-21swapper/821:35:0010
2992599122,6cyclictest0-21swapper/722:25:249
2992599122,6cyclictest0-21swapper/719:30:019
2992599120,7cyclictest0-21swapper/723:30:249
2992599120,6cyclictest23871-21munin-run20:25:019
2992099123,6cyclictest0-21swapper/620:20:018
2992099122,6cyclictest25380-21kworker/u24:122:55:008
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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