You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-09-13 - 10:09
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Sat Sep 13, 2025 00:45:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
242412204149,22sleep10-21swapper/119:05:461
245422201162,26sleep20-21swapper/219:09:402
224582201161,26sleep00-21swapper/019:05:080
242732198160,25sleep30-21swapper/319:06:113
24670992120,1cyclictest9-21ksoftirqd/022:45:000
24670991919,0cyclictest9-21ksoftirqd/021:15:560
24670991918,1cyclictest9-21ksoftirqd/023:45:150
24670991918,1cyclictest9-21ksoftirqd/022:10:150
24670991818,0cyclictest9-21ksoftirqd/022:16:330
24670991818,0cyclictest9-21ksoftirqd/021:21:430
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional