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2026-04-28 - 06:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Tue Apr 28, 2026 00:45:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
309792211173,24sleep00-21swapper/019:09:420
309002208154,22sleep30-21swapper/319:08:393
309882207149,46sleep20-21swapper/219:09:482
308582199160,26sleep10-21swapper/119:08:061
3109599139,4cyclictest0-21swapper/119:34:541
31088991312,1cyclictest9-21ksoftirqd/000:10:000
3109599129,0cyclictest0-21swapper/122:34:021
130782120,0sleep00-21swapper/022:20:120
31107991111,0cyclictest0-21swapper/320:29:163
3109599117,4cyclictest56-21kworker/1:122:56:261
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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