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2025-10-28 - 18:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Tue Oct 28, 2025 12:45:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
205062218154,22sleep00-21swapper/007:08:210
203752208157,26sleep20-21swapper/207:06:392
203542205156,24sleep30-21swapper/307:06:233
203572197158,26sleep10-21swapper/107:06:251
295592680,0sleep10-21swapper/111:41:491
319022650,1sleep121-21ksoftirqd/109:33:361
246042610,0sleep30-21swapper/312:20:163
2071499140,7cyclictest0-21swapper/209:20:022
218452120,0sleep20-21swapper/211:31:042
2071499120,11cyclictest0-21swapper/211:40:452
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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