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2026-04-08 - 00:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Tue Apr 07, 2026 12:45:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71142212161,25sleep20-21swapper/207:08:102
69212210171,25sleep00-21swapper/007:05:380
71602205168,24sleep10-21swapper/107:08:461
69362199160,25sleep30-21swapper/307:05:503
142672620,0sleep10-21swapper/111:32:381
262232600,0sleep30-21swapper/310:25:033
153412590,0sleep30-21swapper/310:10:133
63522580,0sleep10-21swapper/109:58:461
734499175,12cyclictest0-21swapper/110:15:121
94632160,1sleep08011-21/usr/sbin/munin09:20:200
7344991511,4cyclictest21-21ksoftirqd/111:26:511
7339991412,1cyclictest9-21ksoftirqd/011:00:000
7357991310,1cyclictest35-21ksoftirqd/310:00:003
735299130,13cyclictest0-21swapper/211:45:202
735299130,12cyclictest0-21swapper/210:15:142
735299130,1cyclictest24286-21/usr/sbin/munin09:40:182
733999132,5cyclictest18105-21date08:40:000
7339991311,1cyclictest9-21ksoftirqd/012:40:000
734499128,4cyclictest21-21ksoftirqd/112:00:271
734499117,4cyclictest0-21swapper/108:16:341
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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