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2026-03-07 - 06:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Fri Mar 06, 2026 12:45:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
107172213179,22sleep30-21swapper/307:09:063
104932210172,25sleep20-21swapper/207:06:102
105172199162,24sleep10-21swapper/107:06:291
106152195158,24sleep00-21swapper/007:07:450
318122670,0sleep10-21swapper/107:50:151
310172640,0sleep10-21swapper/109:44:131
23752160,0sleep30-21swapper/312:35:133
10901991513,1cyclictest35-21ksoftirqd/307:40:003
1088299143,5cyclictest22053-21date08:40:010
10901991311,1cyclictest35-21ksoftirqd/309:10:003
10894991312,1cyclictest28-21ksoftirqd/210:00:002
10894991111,0cyclictest0-21swapper/209:16:062
1089499110,10cyclictest0-21swapper/211:50:362
1088299119,1cyclictest9-21ksoftirqd/009:00:000
1090199108,1cyclictest35-21ksoftirqd/311:30:003
1090199101,6cyclictest11364-21kworker/u8:111:47:193
1089499109,1cyclictest28-21ksoftirqd/209:35:012
1089499104,5cyclictest707-21snmpd09:27:462
1088299100,5cyclictest0-21swapper/010:20:110
1515290,1sleep00-21swapper/011:51:410
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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