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2025-06-28 - 22:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Sat Jun 28, 2025 12:45:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
262882233157,25sleep00-21swapper/007:08:480
262432218148,24sleep20-21swapper/207:08:142
262862214152,21sleep30-21swapper/307:08:473
262422198159,26sleep10-21swapper/107:08:131
75512740,0sleep20-21swapper/212:25:182
265382630,0sleep30-21swapper/312:05:253
94732160,0sleep00-21swapper/009:35:460
240822140,0sleep20-21swapper/209:55:192
273622130,0sleep10-21swapper/109:19:251
26467991210,1cyclictest9-21ksoftirqd/007:45:000
2648499119,1cyclictest28-21ksoftirqd/207:30:002
2646799112,4cyclictest24509-21perf12:05:000
2646799109,1cyclictest9-21ksoftirqd/011:15:000
2646799100,9cyclictest2122-21/usr/sbin/munin11:35:190
2646799100,7cyclictest24403-1kworker/u9:210:40:170
264929997,1cyclictest35-21ksoftirqd/310:33:583
264929996,2cyclictest35-21ksoftirqd/308:15:013
264929990,6cyclictest0-21swapper/310:35:153
264769998,1cyclictest21-21ksoftirqd/107:59:271
264679995,3cyclictest26795-21kworker/u8:210:45:350
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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