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2026-03-26 - 21:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Thu Mar 26, 2026 12:45:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
94862230157,24sleep00-21swapper/007:09:170
92942216153,50sleep20-21swapper/207:06:492
93352210156,42sleep10-21swapper/107:07:211
74282198159,25sleep30-21swapper/307:05:063
105272690,5sleep09-21ksoftirqd/008:15:170
235552170,0sleep10-21swapper/107:35:161
151892160,1sleep015190-21needreboot12:10:180
9636991513,1cyclictest9-21ksoftirqd/009:20:000
9636991211,1cyclictest9-21ksoftirqd/010:15:010
9636991210,1cyclictest9-21ksoftirqd/011:55:010
963699113,4cyclictest240-21systemd-journal10:10:000
9636991110,1cyclictest9-21ksoftirqd/008:40:010
966099109,1cyclictest35-21ksoftirqd/307:55:003
9652991010,0cyclictest0-21swapper/208:10:182
965299100,1cyclictest24662-21hddtemp_smartct09:35:132
964699100,6cyclictest0-21swapper/110:23:111
963699102,4cyclictest1428-21latency_hist10:29:590
963699100,5cyclictest6106-21perf12:00:010
96609998,1cyclictest35-21ksoftirqd/312:40:003
96609990,8cyclictest0-21swapper/309:29:553
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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