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2026-06-25 - 11:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Thu Jun 25, 2026 00:45:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
148162211171,26sleep20-21swapper/219:05:262
149482207157,24sleep00-21swapper/019:07:080
149662201160,26sleep30-21swapper/319:07:233
149192199162,24sleep10-21swapper/119:06:461
267882720,0sleep20-21swapper/221:33:052
199782170,0sleep00-21swapper/020:25:100
15270991716,1cyclictest28-21ksoftirqd/220:35:192
15270991615,1cyclictest28-21ksoftirqd/221:38:122
15270991615,1cyclictest28-21ksoftirqd/219:20:112
15270991614,1cyclictest28-21ksoftirqd/219:15:142
327002150,0sleep231544-21/usr/sbin/munin21:40:182
15270991515,0cyclictest28-21ksoftirqd/220:10:122
15270991514,1cyclictest28-21ksoftirqd/221:05:142
15270991514,1cyclictest28-21ksoftirqd/219:30:132
15270991414,0cyclictest28-21ksoftirqd/223:14:082
15270991413,1cyclictest28-21ksoftirqd/223:02:202
15270991413,1cyclictest28-21ksoftirqd/222:51:542
15270991413,1cyclictest28-21ksoftirqd/220:05:172
15270991413,0cyclictest28-21ksoftirqd/200:10:132
15270991412,1cyclictest28-21ksoftirqd/220:20:012
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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