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2025-12-29 - 08:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Mon Dec 29, 2025 00:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
306842234161,26sleep30-21swapper/319:09:203
306532211172,25sleep20-21swapper/219:08:542
304902202162,26sleep10-21swapper/119:06:481
305472201161,26sleep00-21swapper/019:07:320
30836991513,1cyclictest28-21ksoftirqd/222:50:092
30836991312,0cyclictest22050-21apt-get00:30:132
30836991311,1cyclictest28-21ksoftirqd/200:40:002
30836991210,1cyclictest28-21ksoftirqd/221:20:002
3084499119,1cyclictest35-21ksoftirqd/323:00:193
30844991110,1cyclictest35-21ksoftirqd/319:25:013
3083699119,1cyclictest28-21ksoftirqd/200:20:012
105162110,0sleep00-21swapper/020:40:150
3084499109,1cyclictest35-21ksoftirqd/323:30:003
30844991010,0cyclictest35-21ksoftirqd/320:00:003
3084499100,7cyclictest8463-21hddtemp_smartct00:00:153
3083699108,1cyclictest28-21ksoftirqd/223:10:012
3083699108,1cyclictest28-21ksoftirqd/223:10:012
3083699100,5cyclictest0-21swapper/220:50:102
3082699109,1cyclictest9-21ksoftirqd/023:10:010
3082699109,1cyclictest9-21ksoftirqd/023:10:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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