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2026-07-02 - 12:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Thu Jul 02, 2026 00:45:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
125012210139,25sleep00-21swapper/019:05:550
125592208153,21sleep10-21swapper/119:06:401
126992200160,26sleep20-21swapper/219:08:322
124992200150,25sleep30-21swapper/319:05:543
12905991514,1cyclictest35-21ksoftirqd/323:15:133
12892991412,1cyclictest9-21ksoftirqd/021:40:010
12892991412,1cyclictest9-21ksoftirqd/021:40:000
1290199130,12cyclictest11935-21/usr/sbin/munin23:30:162
1290199125,5cyclictest61650irq/122-eno123:15:182
12901991211,1cyclictest28-21ksoftirqd/222:10:002
12892991210,1cyclictest9-21ksoftirqd/019:45:000
1289299119,2cyclictest22018-21sh23:43:220
1289299119,1cyclictest9-21ksoftirqd/023:30:130
1289299119,1cyclictest6193-21diskmemload22:14:330
1289299112,6cyclictest4200-21kworker/u8:121:16:310
12892991110,1cyclictest9-21ksoftirqd/020:45:000
1289299111,5cyclictest22134-21perf20:35:000
1290599109,1cyclictest35-21ksoftirqd/322:05:003
1290599109,1cyclictest35-21ksoftirqd/320:50:013
1290599109,1cyclictest35-21ksoftirqd/320:00:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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