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2026-08-06 - 18:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Thu Aug 06, 2026 12:45:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
78282208174,21sleep00-21swapper/007:05:360
78532202165,23sleep30-21swapper/307:05:553
79242199157,27sleep20-21swapper/207:06:492
78862198160,25sleep10-21swapper/107:06:211
117202630,0sleep00-21swapper/011:40:150
42172580,0sleep30-21swapper/312:15:143
8282991918,1cyclictest35-21ksoftirqd/311:35:143
8282991817,1cyclictest35-21ksoftirqd/309:25:003
117492170,0sleep011751-21aten_r1power_fr10:55:120
8282991615,1cyclictest35-21ksoftirqd/307:25:153
8282991614,1cyclictest35-21ksoftirqd/311:15:003
828299160,6cyclictest0-21swapper/309:10:203
8282991515,0cyclictest35-21ksoftirqd/310:15:193
8282991515,0cyclictest35-21ksoftirqd/310:14:573
8282991515,0cyclictest35-21ksoftirqd/307:55:163
8282991514,1cyclictest35-21ksoftirqd/308:05:103
8282991514,1cyclictest35-21ksoftirqd/308:00:213
8282991513,1cyclictest35-21ksoftirqd/310:30:003
828299147,4cyclictest35-21ksoftirqd/308:30:193
8282991413,1cyclictest35-21ksoftirqd/312:30:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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