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2026-05-11 - 04:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Mon May 11, 2026 00:45:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20352201151,24sleep30-21swapper/319:09:083
18672200147,21sleep00-21swapper/019:06:560
17692200161,25sleep20-21swapper/219:05:412
20182199159,26sleep10-21swapper/119:08:541
291022640,1sleep029103-21ssh23:20:000
130882550,0sleep30-21swapper/319:30:143
52622170,0sleep10-21swapper/100:13:321
212072160,0sleep00-21swapper/020:55:140
219999140,13cyclictest27477-21diskmemload00:15:022
2182991412,1cyclictest9-21ksoftirqd/019:15:000
2182991311,1cyclictest9-21ksoftirqd/021:25:180
2182991311,1cyclictest9-21ksoftirqd/000:25:000
219999124,5cyclictest240-21systemd-journal23:15:002
2182991212,0cyclictest9-21ksoftirqd/023:39:290
2182991211,1cyclictest9-21ksoftirqd/000:15:210
2182991210,1cyclictest9-21ksoftirqd/021:45:140
2182991210,1cyclictest9-21ksoftirqd/020:40:010
220899110,5cyclictest0-21swapper/319:45:103
220899110,0cyclictest0-21swapper/321:59:563
219999119,1cyclictest28-21ksoftirqd/220:05:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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