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2026-03-13 - 11:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Fri Mar 13, 2026 00:45:21)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9612232156,26sleep00-21swapper/019:06:070
315732212151,22sleep30-21swapper/319:05:053
10322210150,47sleep20-21swapper/219:07:012
315712200162,25sleep10-21swapper/119:05:031
12372870,0sleep10-21swapper/100:02:411
263432700,0sleep10-21swapper/120:00:111
1334991614,1cyclictest9-21ksoftirqd/021:50:110
174782130,0sleep30-21swapper/300:24:343
327392120,0sleep20-21swapper/221:15:172
1334991211,1cyclictest9-21ksoftirqd/021:30:000
1334991210,1cyclictest9-21ksoftirqd/000:05:130
134899116,4cyclictest28-21ksoftirqd/222:20:012
1348991110,1cyclictest28-21ksoftirqd/200:05:002
133499114,1cyclictest9-21ksoftirqd/023:05:180
133499112,5cyclictest9930-21ls00:15:000
1334991110,1cyclictest9-21ksoftirqd/022:35:100
134899109,1cyclictest28-21ksoftirqd/220:35:122
134899109,1cyclictest28-21ksoftirqd/200:10:012
134899109,1cyclictest25507-21fschecks_time21:05:142
134899108,1cyclictest28-21ksoftirqd/200:35:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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