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2026-04-12 - 19:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Sun Apr 12, 2026 12:45:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
321152223152,49sleep30-21swapper/307:09:013
321762206156,25sleep00-21swapper/007:09:450
320572204150,22sleep20-21swapper/207:08:142
321942200163,24sleep10-21swapper/107:09:591
6442660,0sleep10-21swapper/107:10:131
59662650,0sleep00-21swapper/010:06:020
32270992423,1cyclictest9-21ksoftirqd/009:10:000
32270991615,1cyclictest9-21ksoftirqd/010:25:010
32270991514,1cyclictest9-21ksoftirqd/012:35:120
32270991513,1cyclictest9-21ksoftirqd/012:10:100
32270991510,0cyclictest9-21ksoftirqd/012:20:170
32270991414,0cyclictest9-21ksoftirqd/010:50:140
32270991413,1cyclictest9-21ksoftirqd/011:05:000
32280991311,1cyclictest28-21ksoftirqd/212:20:012
3228099130,12cyclictest3305-21/usr/sbin/munin07:15:162
32270991313,0cyclictest9-21ksoftirqd/011:25:110
32270991312,1cyclictest9-21ksoftirqd/009:25:180
32270991311,1cyclictest9-21ksoftirqd/012:00:180
32270991311,1cyclictest9-21ksoftirqd/011:20:000
32285991212,0cyclictest35-21ksoftirqd/308:15:203
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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