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2025-05-03 - 01:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Sat May 03, 2025 00:45:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
166852211159,26sleep00-21swapper/019:06:580
167602207159,23sleep30-21swapper/319:07:593
166352202162,26sleep20-21swapper/219:06:212
165792202163,26sleep10-21swapper/119:05:351
113352740,0sleep10-21swapper/123:55:171
178812710,0sleep20-21swapper/223:21:142
201012670,0sleep20-21swapper/223:25:142
209002610,0sleep10-21swapper/100:07:231
197112600,0sleep00-21swapper/021:20:160
22032260,0sleep00-21swapper/023:44:470
1700799140,13cyclictest0-21swapper/020:40:200
1700799140,13cyclictest0-21swapper/000:15:200
1700799140,13cyclictest0-21swapper/000:15:190
1701599130,13cyclictest0-21swapper/120:45:241
1703199110,7cyclictest11861-21/usr/sbin/munin23:15:133
98962100,0sleep30-21swapper/323:54:163
1703199100,1cyclictest0-21swapper/300:00:143
1702399109,1cyclictest0-21swapper/220:35:242
1700799109,1cyclictest9-21ksoftirqd/023:25:000
1700799108,1cyclictest9-21ksoftirqd/021:30:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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