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2026-09-03 - 21:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Thu Sep 03, 2026 12:45:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
287312216151,52sleep20-21swapper/207:09:202
285552214155,26sleep00-21swapper/007:07:000
287522209175,22sleep10-21swapper/107:09:341
286052204160,26sleep30-21swapper/307:07:393
46562630,0sleep30-21swapper/311:02:563
51432560,0sleep30-21swapper/310:16:143
130162170,0sleep10-21swapper/111:15:121
155432160,0sleep30-21swapper/307:45:203
28894991311,1cyclictest35-21ksoftirqd/307:40:003
28873991211,1cyclictest9-21ksoftirqd/010:20:000
28873991211,1cyclictest9-21ksoftirqd/009:40:010
2888499119,1cyclictest28-21ksoftirqd/211:10:122
28884991110,1cyclictest0-21swapper/209:35:132
2888499110,10cyclictest0-21swapper/209:55:202
2888499110,1cyclictest26591-21ssh12:20:132
2887999110,8cyclictest0-21swapper/111:30:151
2887999110,0cyclictest0-21swapper/111:45:411
2887399119,1cyclictest9-21ksoftirqd/008:50:000
2887399119,1cyclictest9-21ksoftirqd/008:30:010
2887399118,1cyclictest9-21ksoftirqd/009:10:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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