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2025-11-19 - 00:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack1slot1.osadl.org (updated Tue Nov 18, 2025 12:45:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
143072213151,49sleep00-21swapper/007:08:120
144362201164,24sleep10-21swapper/107:09:501
144252200162,25sleep20-21swapper/207:09:422
141902198159,25sleep30-21swapper/307:06:423
153732790,1sleep121-21ksoftirqd/108:15:201
1452499175,12cyclictest0-21swapper/007:55:160
211622160,1sleep1201rcuc/107:20:141
1452799130,12cyclictest0-21swapper/212:15:222
1452599130,12cyclictest0-21swapper/108:25:201
14524991312,1cyclictest9-21ksoftirqd/009:35:010
14527991210,1cyclictest20112-21sh07:20:002
1452599120,0cyclictest0-21swapper/112:35:171
14524991211,1cyclictest9-21ksoftirqd/010:25:010
14524991210,1cyclictest9-21ksoftirqd/008:39:590
1453099110,4cyclictest0-21swapper/309:48:203
1452799119,1cyclictest28-21ksoftirqd/211:05:002
14527991110,1cyclictest28-21ksoftirqd/207:44:592
1452499119,1cyclictest9-21ksoftirqd/010:30:010
1452499119,1cyclictest9-21ksoftirqd/010:30:000
14524991110,1cyclictest9-21ksoftirqd/012:20:010
14524991110,1cyclictest9-21ksoftirqd/011:55:000
14524991110,1cyclictest9-21ksoftirqd/010:39:030
14524991110,1cyclictest9-21ksoftirqd/010:20:010
291502100,0sleep00-21swapper/009:35:380
1453099100,2cyclictest0-21swapper/307:25:133
1452799109,1cyclictest28-21ksoftirqd/210:30:212
1452799109,1cyclictest28-21ksoftirqd/209:20:162
1452799108,1cyclictest28-21ksoftirqd/207:35:002
1452799100,6cyclictest27999-21gltestperf12:35:192
1452499109,1cyclictest9-21ksoftirqd/010:35:000
1452499108,1cyclictest9-21ksoftirqd/010:40:170
1452499108,1cyclictest9-21ksoftirqd/008:05:000
1452499102,7cyclictest3017-21fschecks_count12:00:160
1452499100,7cyclictest19110-21snmpd11:42:270
145309997,1cyclictest35-21ksoftirqd/307:49:143
145279999,0cyclictest28-21ksoftirqd/211:50:142
145279999,0cyclictest28-21ksoftirqd/210:15:182
145279999,0cyclictest0-21swapper/211:22:272
145279998,1cyclictest28-21ksoftirqd/212:20:162
145279998,1cyclictest28-21ksoftirqd/211:40:162
145279998,1cyclictest23661-21cat11:00:012
145279997,1cyclictest28-21ksoftirqd/210:30:012
145279997,1cyclictest28-21ksoftirqd/210:30:002
145279997,1cyclictest28-21ksoftirqd/209:50:142
145279994,3cyclictest60950irq/123-eno110:05:142
145279992,4cyclictest819-21lldpd09:10:312
145259990,0cyclictest0-21swapper/109:44:121
145249998,1cyclictest9-21ksoftirqd/011:35:000
145249998,1cyclictest9-21ksoftirqd/011:15:010
145249998,1cyclictest9-21ksoftirqd/011:00:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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