You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-10-23 - 20:44
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack1slot1.osadl.org (updated Thu Oct 23, 2025 12:45:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
117872239151,25sleep00-21swapper/007:09:330
115212213152,21sleep30-21swapper/307:06:063
117072209172,24sleep20-21swapper/207:08:292
116542199161,25sleep10-21swapper/107:07:491
87612590,0sleep00-21swapper/009:56:370
306902570,0sleep30-21swapper/311:55:193
1193099140,2cyclictest4773-21diskmemload11:55:210
1193099140,2cyclictest14846-21aten_r1power_po11:35:130
1193099130,0cyclictest0-21swapper/011:23:260
11950991212,0cyclictest0-21swapper/311:17:223
1193099122,0cyclictest4773-21diskmemload11:09:550
1193099120,11cyclictest22865-21ntp_states11:00:180
1193099112,1cyclictest0-21swapper/008:20:140
1193099112,0cyclictest4773-21diskmemload12:15:100
1193099111,3cyclictest4773-21diskmemload11:51:470
1194499108,1cyclictest28-21ksoftirqd/211:57:022
1194499102,7cyclictest28-21ksoftirqd/209:35:082
1194499100,9cyclictest0-21swapper/212:11:582
1193099108,1cyclictest9-21ksoftirqd/007:45:000
1193099103,1cyclictest17249-21chrt10:53:440
1193099103,1cyclictest13218-21netstat07:10:200
1193099101,4cyclictest7754-21aten_r1power_fr12:10:130
1193099101,1cyclictest4773-21diskmemload10:00:130
1193099100,9cyclictest6249-21ssh10:38:590
1193099100,9cyclictest16049-21ssh10:06:390
1193099100,9cyclictest11126-21ssh11:30:120
1193099100,9cyclictest109792sleep009:16:550
1193099100,9cyclictest0-21swapper/011:28:160
1193099100,6cyclictest0-21swapper/011:44:030
1193099100,5cyclictest0-21swapper/008:35:140
1193099100,4cyclictest18768-21ls10:10:190
1193099100,4cyclictest18768-21ls10:10:190
1193099100,3cyclictest0-21swapper/011:12:430
1193099100,3cyclictest0-21swapper/009:20:200
1193099100,0cyclictest4773-21diskmemload12:25:290
30591297,1sleep228-21ksoftirqd/209:42:462
119509990,4cyclictest0-21swapper/312:20:143
119449998,1cyclictest28-21ksoftirqd/211:50:012
119449998,1cyclictest28-21ksoftirqd/209:15:002
119449990,4cyclictest0-21swapper/208:10:122
119359990,5cyclictest0-21swapper/111:36:401
119309996,2cyclictest5274-21ssh09:52:070
119309995,4cyclictest26181-21ssh09:36:250
119309994,1cyclictest30746-21ssh10:27:070
119309993,1cyclictest22979-21head07:30:150
119309990,8cyclictest0-21swapper/008:50:120
119309990,6cyclictest9518-21ssh10:42:450
119309990,6cyclictest26933-21ssh10:21:290
119309990,6cyclictest17711-21ssh12:23:240
119309990,5cyclictest30492-1kworker/u9:109:44:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional