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2026-08-15 - 05:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack1slot1.osadl.org (updated Sat Aug 15, 2026 00:45:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
122842215150,51sleep00-21swapper/019:07:040
122202205130,25sleep30-21swapper/319:06:143
124042202166,23sleep10-21swapper/119:08:371
122762200161,26sleep20-21swapper/219:06:582
32582790,0sleep10-21swapper/119:55:161
18372150,0sleep10-21swapper/121:50:131
12598991513,1cyclictest9-21ksoftirqd/022:50:000
191632140,0sleep10-21swapper/122:15:001
12610991312,1cyclictest28-21ksoftirqd/221:10:132
12610991210,1cyclictest28-21ksoftirqd/221:40:002
1259899129,1cyclictest9-21ksoftirqd/019:50:000
12598991211,1cyclictest9-21ksoftirqd/023:15:110
77632110,0sleep10-21swapper/121:12:211
1261899119,1cyclictest35-21ksoftirqd/322:25:013
1261099119,1cyclictest28-21ksoftirqd/221:25:002
1259899119,1cyclictest9-21ksoftirqd/022:10:000
1259899119,1cyclictest9-21ksoftirqd/021:50:210
1259899119,1cyclictest9-21ksoftirqd/020:45:130
1259899118,1cyclictest9-21ksoftirqd/022:35:000
1259899114,4cyclictest21929-21cat23:05:000
12598991110,1cyclictest9-21ksoftirqd/000:20:180
1261899108,1cyclictest5254-21diskmemload23:08:043
1261099108,1cyclictest28-21ksoftirqd/221:10:002
1259899109,1cyclictest9-21ksoftirqd/023:25:100
1259899109,1cyclictest9-21ksoftirqd/022:50:110
1259899109,1cyclictest9-21ksoftirqd/022:10:110
1259899109,1cyclictest9-21ksoftirqd/021:30:100
1259899109,1cyclictest9-21ksoftirqd/021:10:110
1259899109,1cyclictest9-21ksoftirqd/020:55:190
1259899108,1cyclictest9-21ksoftirqd/022:55:130
1259899108,1cyclictest9-21ksoftirqd/022:35:120
1259899103,6cyclictest3481-21grep23:25:000
12598991010,0cyclictest9-21ksoftirqd/022:25:110
12598991010,0cyclictest9-21ksoftirqd/022:15:170
126189990,2cyclictest0-21swapper/322:45:113
126109998,1cyclictest28-21ksoftirqd/223:10:002
126109998,1cyclictest28-21ksoftirqd/221:40:122
126109997,1cyclictest28-21ksoftirqd/223:50:002
125989999,0cyclictest9-21ksoftirqd/023:05:150
125989999,0cyclictest9-21ksoftirqd/022:40:130
125989999,0cyclictest9-21ksoftirqd/022:20:140
125989999,0cyclictest9-21ksoftirqd/021:23:290
125989999,0cyclictest9-21ksoftirqd/000:25:160
125989998,1cyclictest9-21ksoftirqd/023:55:090
125989998,1cyclictest9-21ksoftirqd/023:30:020
125989998,1cyclictest9-21ksoftirqd/022:00:150
125989998,1cyclictest9-21ksoftirqd/021:41:310
125989998,1cyclictest9-21ksoftirqd/021:39:400
125989998,1cyclictest9-21ksoftirqd/020:35:200
125989998,1cyclictest9-21ksoftirqd/020:30:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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