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2026-04-12 - 01:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Sun Apr 12, 2026 00:45:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
235212207156,25sleep00-21swapper/019:09:580
233062202161,27sleep30-21swapper/319:07:113
234122201164,24sleep20-21swapper/219:08:352
232552200162,25sleep10-21swapper/119:06:321
274872210,0sleep00-21swapper/023:29:520
2359499132,5cyclictest18253-21perf20:05:010
16442130,0sleep10-21swapper/119:30:001
23596991210,1cyclictest28-21ksoftirqd/219:14:592
2359499122,5cyclictest8612-21perf19:45:010
23596991110,1cyclictest30917-21ntp_states22:50:182
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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