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2026-05-05 - 12:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Tue May 05, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
540027069,0sleep10-21swapper/119:21:081
509623627,0sleep30-21swapper/319:17:343
542523430,0sleep20-21swapper/219:21:212
537423129,0sleep00-21swapper/019:20:470
55459988,0cyclictest0-21swapper/223:19:262
55439960,0cyclictest0-21swapper/021:48:520
339960,0migration/37936-21sh22:28:103
339960,0migration/331463-21sh22:22:423
339960,0migration/311057-21munin-node19:47:103
29805060,0irq/28-eth0-rx-31229-21kthreadcore22:42:103
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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