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2026-06-19 - 14:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Fri Jun 19, 2026 12:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2862523826,0sleep20-21swapper/207:21:422
2873523626,0sleep10-21swapper/107:23:011
2884723221,0sleep30-21swapper/307:24:193
2896123127,0sleep00-21swapper/007:25:320
29035991313,0cyclictest3524-21snmpd11:23:161
8305060,0irq/26-0000:00:32121-21pmu-power08:30:572
8305060,0irq/26-0000:00:29546-21crond08:55:372
35160,0ktimersoftd/30-21swapper/310:54:223
35160,0ktimersoftd/30-21swapper/310:30:333
339960,0migration/33750-21munin-node12:10:513
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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