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2025-11-29 - 05:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Fri Nov 28, 2025 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3199424637,0sleep10-21swapper/106:17:571
3187224645,0sleep20-21swapper/206:16:342
3203524028,0sleep30-21swapper/306:18:273
3175823824,0sleep00-21swapper/006:15:110
322009970,0cyclictest0-21swapper/209:24:502
329970,0watchdog/30-21swapper/308:49:473
329970,0watchdog/30-21swapper/307:54:553
29935070,0irq/33-eth0-tx-0-21swapper/007:39:450
29935070,0irq/33-eth0-tx-0-21swapper/006:39:080
29935070,0irq/33-eth0-tx-0-21swapper/006:29:440
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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