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2026-06-29 - 19:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Mon Jun 29, 2026 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
651424939,0sleep30-21swapper/307:24:393
660424029,0sleep00-21swapper/007:25:400
642223626,0sleep20-21swapper/207:23:342
642623424,0sleep10-21swapper/107:23:371
67499973,0cyclictest8508-21awk08:56:392
67489970,0cyclictest15745-21kthreadcore10:36:461
339970,0migration/3690-21munin-node10:11:413
67499965,0cyclictest0-21swapper/210:00:232
67499963,0cyclictest3571-21lldpd07:54:262
67479960,0cyclictest0-21swapper/010:22:050
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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