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2026-06-13 - 08:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Sat Jun 13, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2936424435,0sleep30-21swapper/319:21:183
2931023927,0sleep20-21swapper/219:20:412
2950723223,0sleep10-21swapper/119:23:001
2939523228,0sleep00-21swapper/019:21:390
29757992323,0cyclictest27779-21awk20:30:191
29758991918,0cyclictest31100-21sadc22:15:052
339960,0migration/329640-21sh00:24:413
339960,0migration/326109-21sh22:47:343
339960,0migration/320915-21kthreadcore20:00:223
339960,0migration/315059-21munin-node22:05:193
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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