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2026-06-18 - 11:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Thu Jun 18, 2026 00:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1342024736,0sleep30-21swapper/319:20:323
2024124334,0sleep20-21swapper/219:24:152
2027123228,0sleep10-21swapper/119:24:381
1997222925,0sleep00-21swapper/019:21:050
339970,0migration/38453-21sh22:43:173
35160,0ktimersoftd/31218-21ssh00:10:523
339960,0migration/37126-21sh00:53:063
339960,0migration/330885-21sh23:35:003
339960,0migration/329207-21sh00:29:583
339960,0migration/32838-21pmu-power23:15:503
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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