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2026-09-11 - 13:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Fri Sep 11, 2026 12:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2300125241,0sleep00-21swapper/007:29:540
2296924435,0sleep10-21swapper/107:29:311
2315924028,0sleep30-21swapper/307:31:453
2296523526,0sleep20-21swapper/207:29:282
23295991212,0cyclictest30048-21sensors09:02:532
8305060,0irq/26-0000:00:1896-21crond08:47:293
339960,0migration/38529-21kthreadcore07:42:463
339960,0migration/37116-21munin-node09:12:443
339960,0migration/35807-21needreboot10:27:493
339960,0migration/31673-21taskset12:21:373
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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