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2026-09-01 - 04:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Tue Sep 01, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1459023626,0sleep30-21swapper/319:30:283
1449223425,0sleep10-21swapper/119:29:181
1459923324,0sleep20-21swapper/219:30:352
1457023024,0sleep00-21swapper/019:30:130
8305060,0irq/26-0000:00:7351-21crond23:51:382
339960,0migration/37343-21sh23:51:383
339960,0migration/33123-21if_eth022:51:543
339960,0migration/320941-21sh22:04:073
329960,0watchdog/323643-21kthreadcore19:56:563
329960,0watchdog/30-21swapper/300:06:533
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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