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2026-05-02 - 11:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Sat May 02, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2323723928,0sleep20-21swapper/219:20:152
2300323525,0sleep10-21swapper/119:17:341
2330223430,0sleep30-21swapper/319:21:043
2302023228,0sleep00-21swapper/019:17:450
8305060,0irq/26-0000:00:3206-17auditd22:01:382
35160,0ktimersoftd/30-21swapper/322:40:173
339960,0migration/39493-21latency_hist20:41:383
339960,0migration/38956-21sh22:19:293
339960,0migration/37920-21kthreadcore20:16:553
339960,0migration/331369-21sh23:11:413
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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