You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-03 - 18:40
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Fri Apr 03, 2026 12:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1594123829,0sleep20-21swapper/207:18:212
1588723423,0sleep10-21swapper/107:17:481
1565722925,0sleep00-21swapper/007:15:030
1593722824,0sleep30-21swapper/307:18:183
160919999,0cyclictest8585-21sensors08:39:381
339960,0migration/38907-21sh12:32:253
339960,0migration/331972-21sh11:11:013
339960,0migration/326177-21kthreadcore09:54:343
339960,0migration/325356-21sh11:25:283
339960,0migration/323396-21sh11:06:153
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional