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2025-11-14 - 22:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Fri Nov 14, 2025 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
905425041,0sleep20-21swapper/206:18:122
909024940,0sleep10-21swapper/106:18:391
887023828,0sleep30-21swapper/306:16:053
890123524,0sleep00-21swapper/006:16:260
9307991010,0cyclictest4585-21sadc09:30:200
93099976,0cyclictest10176-21fschecks_time06:20:342
329970,0watchdog/3299250irq/32-eth0-rx-10:20:413
329970,0watchdog/30-21swapper/311:30:413
29925070,0irq/32-eth0-rx-0-21swapper/311:42:223
93099960,0cyclictest0-21swapper/211:10:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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