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2026-08-18 - 19:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Tue Aug 18, 2026 12:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1016529392,0sleep20-21swapper/207:30:232
987227877,0sleep00-21swapper/007:27:010
10247996363,0cyclictest8353-21md0_resync08:53:531
10246994141,0cyclictest8350-21md1_resync08:53:530
979423938,0sleep10-21swapper/107:26:101
306423424,0sleep30-21swapper/307:25:403
102469970,0cyclictest0-21swapper/007:50:510
8305060,0irq/26-0000:00:4271-21iostat09:15:493
8305060,0irq/26-0000:00:25606-21diskstats07:40:443
8305060,0irq/26-0000:00:18117-21df09:25:453
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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