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2026-08-11 - 09:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Tue Aug 11, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1459524736,0sleep00-21swapper/019:29:020
1458723927,0sleep20-21swapper/219:28:562
1438723827,0sleep30-21swapper/319:26:363
1435423725,0sleep10-21swapper/119:26:101
339960,0migration/3923-21sh23:25:463
339960,0migration/39083-21sh23:30:173
339960,0migration/38823-21sh00:47:073
339960,0migration/35811-21gltestperf20:10:083
339960,0migration/35088-21kthreadcore21:15:113
339960,0migration/331605-21cpuspeed_turbos22:50:063
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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