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2026-07-22 - 20:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Wed Jul 22, 2026 12:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1694327574,0sleep00-21swapper/007:26:290
1684726867,0sleep20-21swapper/207:25:232
1688123828,0sleep30-21swapper/307:25:483
1678223525,0sleep10-21swapper/107:24:381
29805070,0irq/28-eth0-rx-17359-21iostat_ios11:33:353
339960,0migration/33568-21sh12:21:483
339960,0migration/318504-21munin-node10:53:373
339960,0migration/31725-21smart_nvme0n110:43:423
339960,0migration/31075-21sh11:59:583
29805060,0irq/28-eth0-rx-7371-21grep11:43:453
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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