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2026-09-29 - 01:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Tue Sep 29, 2026 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2851126160,0sleep00-21swapper/019:31:170
2857224341,0sleep10-21swapper/119:31:591
2846323728,0sleep20-21swapper/219:30:392
2845723627,0sleep30-21swapper/319:30:363
8305060,0irq/26-0000:00:3207-17auditd20:58:553
339960,0migration/324386-21sh00:31:343
339960,0migration/317307-21sh21:54:303
29815060,0irq/29-eth0-tx-25544-21munin-node19:54:130
29815060,0irq/29-eth0-tx-0-21swapper/200:10:212
29805060,0irq/28-eth0-rx-9804-21kthreadcore22:29:143
29805060,0irq/28-eth0-rx-21716-21users00:09:223
288129960,0cyclictest0-21swapper/222:10:512
288109966,0cyclictest24855-21sensors21:19:180
149960,0migration/01887-21sh23:22:280
149960,0migration/018121-21kthreadcore22:54:190
8305050,0irq/26-0000:00:11940-21needreboot22:29:162
4150,0ktimersoftd/00-21swapper/022:50:150
339950,0migration/38936-21fschecks_count00:24:123
339950,0migration/37177-21unixbench-2d21:29:243
339950,0migration/36252-21kthreadcore20:24:153
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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