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2025-05-03 - 01:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Sat May 03, 2025 00:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1547323929,0sleep30-21swapper/318:28:133
1559123826,0sleep20-21swapper/218:29:362
1563123724,0sleep00-21swapper/018:30:020
1580323626,0sleep10-21swapper/118:32:041
15889991010,0cyclictest29505-21sensors18:37:382
329970,0watchdog/39410-21expr19:12:313
29925070,0irq/32-eth0-rx-13959-21ssh23:29:453
29925070,0irq/32-eth0-rx-0-21swapper/322:09:513
29925070,0irq/32-eth0-rx-0-21swapper/321:02:543
339960,0migration/320185-21sh23:13:313
329960,0watchdog/327003-21ssh22:59:263
329960,0watchdog/31632-21grep20:32:433
329960,0watchdog/311916-21sh23:09:343
329960,0watchdog/30-21swapper/323:59:303
329960,0watchdog/30-21swapper/323:52:463
329960,0watchdog/30-21swapper/323:37:423
329960,0watchdog/30-21swapper/323:35:583
329960,0watchdog/30-21swapper/323:22:223
329960,0watchdog/30-21swapper/323:19:343
329960,0watchdog/30-21swapper/323:02:583
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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