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2026-01-01 - 11:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Thu Jan 01, 2026 00:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1023926463,0sleep20-21swapper/219:09:262
1029223727,0sleep30-21swapper/319:10:073
1034923626,0sleep10-21swapper/119:10:451
1005923228,0sleep00-21swapper/019:07:190
339960,0migration/35063-21irqrtprio19:51:513
339960,0migration/34543-21munin-node21:51:593
339960,0migration/332083-21sh22:08:023
339960,0migration/331797-21munin-node21:16:533
339960,0migration/331674-21sh00:19:263
339960,0migration/329248-21sh21:13:233
339960,0migration/326705-21sh22:23:193
339960,0migration/323074-21sh23:35:133
339960,0migration/319490-21munin-node00:31:543
29805060,0irq/28-eth0-rx-9868-21diskstats23:46:503
29805060,0irq/28-eth0-rx-22034-21kthreadcore21:26:523
29805060,0irq/28-eth0-rx-15091-21diskstats20:21:503
19160,0ktimersoftd/10-21swapper/121:46:191
149960,0migration/030989-21sh00:17:470
149960,0migration/024011-21unixbench_multi22:57:030
104949965,0cyclictest22573-21sh23:34:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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