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2026-05-31 - 22:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Sun May 31, 2026 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2116824233,0sleep20-21swapper/207:20:362
2140223425,0sleep10-21swapper/107:23:151
2128623430,0sleep00-21swapper/007:21:540
2114423127,0sleep30-21swapper/307:20:173
21544991212,0cyclictest3524-21snmpd11:01:511
339960,0migration/38592-21sh12:54:003
339960,0migration/35064-21sh11:15:333
339960,0migration/330853-21sh12:29:163
339960,0migration/328514-21sh11:09:523
339960,0migration/328047-21sh09:54:333
339960,0migration/324985-21sh11:46:573
339960,0migration/324768-21sh10:31:453
29815060,0irq/29-eth0-tx-25430-21munin-node07:49:230
27160,0ktimersoftd/20-21swapper/210:49:232
215449960,0cyclictest0-21swapper/110:35:491
215439966,0cyclictest0-21swapper/009:36:070
215439963,0cyclictest19387-21kworker/0:010:44:550
215439960,0cyclictest0-21swapper/010:40:550
149960,0migration/07407-21fschecks_time11:19:180
149960,0migration/02734-21sh09:42:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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