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2026-08-29 - 23:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Sat Aug 29, 2026 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2706824536,0sleep10-21swapper/107:28:241
2730023928,0sleep30-21swapper/307:31:063
2719323525,0sleep20-21swapper/207:29:492
2711523120,0sleep00-21swapper/007:28:550
273989999,0cyclictest6613-21sensors11:21:492
273989970,0cyclictest28129-21grep08:36:422
8305060,0irq/26-0000:00:2939-21grep08:41:443
8305060,0irq/26-0000:00:23526-21sh09:21:253
8305060,0irq/26-0000:00:10105-21if_eth1.307:41:433
35160,0ktimersoftd/30-21swapper/311:53:583
339960,0migration/330185-21sh12:33:363
339960,0migration/329095-21sh10:57:213
339960,0migration/312353-21munin-node09:31:513
29805060,0irq/28-eth0-rx-8567-21chrt12:59:253
29805060,0irq/28-eth0-rx-24989-21irqrtprio08:36:413
29805060,0irq/28-eth0-rx-24300-21iostat_ios09:41:413
29805060,0irq/28-eth0-rx-0-21swapper/311:06:433
273989960,0cyclictest0-21swapper/212:42:582
273989960,0cyclictest0-21swapper/212:36:492
273979965,0cyclictest0-21swapper/109:36:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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