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2025-12-02 - 04:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Tue Dec 02, 2025 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1217623829,0sleep10-21swapper/118:15:291
1224623728,0sleep20-21swapper/218:16:222
1212623727,0sleep30-21swapper/318:14:553
1214923423,0sleep00-21swapper/018:15:120
329980,0watchdog/30-21swapper/323:29:423
29925080,0irq/32-eth0-rx-0-21swapper/323:23:193
329970,0watchdog/328118-21cut19:34:383
329970,0watchdog/30-21swapper/321:14:183
29925070,0irq/32-eth0-rx-0-21swapper/322:34:173
29925070,0irq/32-eth0-rx-0-21swapper/319:24:373
339960,0migration/38001-21munin-node23:34:353
339960,0migration/325918-21missed_timers23:04:423
339960,0migration/31964-21sh20:40:583
339960,0migration/313918-21munin-node22:04:333
339960,0migration/311745-21fschecks_count22:59:313
339960,0migration/311294-21sh22:00:033
329960,0watchdog/390272chrt19:21:343
329960,0watchdog/31030-21ssh22:50:503
329960,0watchdog/30-21swapper/323:28:023
329960,0watchdog/30-21swapper/322:14:343
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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